Lines Matching full:p
152 static void kvm_mips_build_save_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_save_scratch() argument
156 UASM_i_MFC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_save_scratch()
157 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_save_scratch()
161 UASM_i_MFC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_save_scratch()
162 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_save_scratch()
166 static void kvm_mips_build_restore_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_restore_scratch() argument
173 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_restore_scratch()
174 UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_restore_scratch()
177 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_restore_scratch()
178 UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_restore_scratch()
184 * @p: Code buffer pointer.
190 static inline void build_set_exc_base(u32 **p, unsigned int reg) in build_set_exc_base() argument
194 uasm_i_ori(p, reg, reg, MIPS_EBASE_WG); in build_set_exc_base()
195 UASM_i_MTC0(p, reg, C0_EBASE); in build_set_exc_base()
197 uasm_i_mtc0(p, reg, C0_EBASE); in build_set_exc_base()
217 u32 *p = addr; in kvm_mips_build_vcpu_run() local
225 UASM_i_ADDIU(&p, K1, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_vcpu_run()
229 UASM_i_SW(&p, i, offsetof(struct pt_regs, regs[i]), K1); in kvm_mips_build_vcpu_run()
233 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_vcpu_run()
234 UASM_i_SW(&p, V0, offsetof(struct pt_regs, cp0_status), K1); in kvm_mips_build_vcpu_run()
237 kvm_mips_build_save_scratch(&p, V1, K1); in kvm_mips_build_vcpu_run()
240 UASM_i_MTC0(&p, A0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_vcpu_run()
243 UASM_i_ADDIU(&p, K1, A0, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_vcpu_run()
249 UASM_i_SW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_vcpu_run()
252 UASM_i_SW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1); in kvm_mips_build_vcpu_run()
258 UASM_i_LA(&p, K0, ST0_EXL | KSU_USER | ST0_BEV | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
259 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_vcpu_run()
260 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
263 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); in kvm_mips_build_vcpu_run()
264 build_set_exc_base(&p, K0); in kvm_mips_build_vcpu_run()
271 uasm_i_addiu(&p, K0, ZERO, ST0_EXL | KSU_USER | ST0_IE | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
272 uasm_i_andi(&p, V0, V0, ST0_IM); in kvm_mips_build_vcpu_run()
273 uasm_i_or(&p, K0, K0, V0); in kvm_mips_build_vcpu_run()
274 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_vcpu_run()
275 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
277 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_vcpu_run()
279 return p; in kvm_mips_build_vcpu_run()
294 u32 *p = addr; in kvm_mips_build_enter_guest() local
305 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1); in kvm_mips_build_enter_guest()
306 UASM_i_MTC0(&p, T0, C0_EPC); in kvm_mips_build_enter_guest()
310 UASM_i_MFC0(&p, K0, C0_PWBASE); in kvm_mips_build_enter_guest()
312 UASM_i_MFC0(&p, K0, c0_kscratch(), pgd_reg); in kvm_mips_build_enter_guest()
313 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_pgd), K1); in kvm_mips_build_enter_guest()
323 UASM_i_LW(&p, S0, (int)offsetof(struct kvm_vcpu, kvm) - in kvm_mips_build_enter_guest()
325 UASM_i_LW(&p, A0, offsetof(struct kvm, arch.gpa_mm.pgd), S0); in kvm_mips_build_enter_guest()
326 UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_enter_guest()
327 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_enter_guest()
330 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_enter_guest()
332 uasm_i_nop(&p); in kvm_mips_build_enter_guest()
335 uasm_i_addiu(&p, V1, ZERO, 1); in kvm_mips_build_enter_guest()
336 uasm_i_mfc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
337 uasm_i_ins(&p, K0, V1, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_enter_guest()
338 uasm_i_mtc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
347 uasm_i_mfc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
349 uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT, in kvm_mips_build_enter_guest()
351 uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_enter_guest()
353 uasm_i_mtc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
362 UASM_i_MFC0(&p, K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
363 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_enter_guest()
367 UASM_i_ADDIU(&p, T1, S0, in kvm_mips_build_enter_guest()
372 uasm_i_lw(&p, T2, offsetof(struct thread_info, cpu), GP); in kvm_mips_build_enter_guest()
374 uasm_i_sll(&p, T2, T2, ilog2(sizeof(long))); in kvm_mips_build_enter_guest()
375 UASM_i_ADDU(&p, T3, T1, T2); in kvm_mips_build_enter_guest()
376 UASM_i_LW(&p, K0, 0, T3); in kvm_mips_build_enter_guest()
382 uasm_i_addiu(&p, T3, ZERO, sizeof(struct cpuinfo_mips)/sizeof(long)); in kvm_mips_build_enter_guest()
383 uasm_i_mul(&p, T2, T2, T3); in kvm_mips_build_enter_guest()
385 UASM_i_LA_mostly(&p, AT, (long)&cpu_data[0].asid_mask); in kvm_mips_build_enter_guest()
386 UASM_i_ADDU(&p, AT, AT, T2); in kvm_mips_build_enter_guest()
387 UASM_i_LW(&p, T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), AT); in kvm_mips_build_enter_guest()
388 uasm_i_and(&p, K0, K0, T2); in kvm_mips_build_enter_guest()
390 uasm_i_andi(&p, K0, K0, MIPS_ENTRYHI_ASID); in kvm_mips_build_enter_guest()
394 uasm_i_mtc0(&p, K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
396 uasm_i_ehb(&p); in kvm_mips_build_enter_guest()
399 uasm_i_mtc0(&p, ZERO, C0_HWRENA); in kvm_mips_build_enter_guest()
406 UASM_i_LW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1); in kvm_mips_build_enter_guest()
411 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, hi), K1); in kvm_mips_build_enter_guest()
412 uasm_i_mthi(&p, K0); in kvm_mips_build_enter_guest()
414 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, lo), K1); in kvm_mips_build_enter_guest()
415 uasm_i_mtlo(&p, K0); in kvm_mips_build_enter_guest()
419 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1); in kvm_mips_build_enter_guest()
420 UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1); in kvm_mips_build_enter_guest()
423 uasm_i_eret(&p); in kvm_mips_build_enter_guest()
427 return p; in kvm_mips_build_enter_guest()
441 u32 *p = addr; in kvm_mips_build_tlb_refill_exception() local
453 UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
456 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
459 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1); in kvm_mips_build_tlb_refill_exception()
468 UASM_i_MFC0(&p, K1, C0_PGD); in kvm_mips_build_tlb_refill_exception()
469 uasm_i_lddir(&p, K0, K1, 3); /* global page dir */ in kvm_mips_build_tlb_refill_exception()
471 uasm_i_lddir(&p, K1, K0, 1); /* middle page dir */ in kvm_mips_build_tlb_refill_exception()
473 uasm_i_ldpte(&p, K1, 0); /* even */ in kvm_mips_build_tlb_refill_exception()
474 uasm_i_ldpte(&p, K1, 1); /* odd */ in kvm_mips_build_tlb_refill_exception()
475 uasm_i_tlbwr(&p); in kvm_mips_build_tlb_refill_exception()
489 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ in kvm_mips_build_tlb_refill_exception()
491 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ in kvm_mips_build_tlb_refill_exception()
496 build_get_ptep(&p, K0, K1); in kvm_mips_build_tlb_refill_exception()
497 build_update_entries(&p, K0, K1); in kvm_mips_build_tlb_refill_exception()
498 build_tlb_write_entry(&p, &l, &r, tlb_random); in kvm_mips_build_tlb_refill_exception()
504 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
507 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1); in kvm_mips_build_tlb_refill_exception()
508 uasm_i_ehb(&p); in kvm_mips_build_tlb_refill_exception()
509 UASM_i_MFC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
512 uasm_i_eret(&p); in kvm_mips_build_tlb_refill_exception()
514 return p; in kvm_mips_build_tlb_refill_exception()
529 u32 *p = addr; in kvm_mips_build_exception() local
539 UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exception()
542 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exception()
543 UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_exception()
546 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1); in kvm_mips_build_exception()
549 uasm_il_b(&p, &r, label_exit_common); in kvm_mips_build_exception()
550 uasm_i_nop(&p); in kvm_mips_build_exception()
555 return p; in kvm_mips_build_exception()
571 u32 *p = addr; in kvm_mips_build_exit() local
596 UASM_i_SW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1); in kvm_mips_build_exit()
601 uasm_i_mfhi(&p, T0); in kvm_mips_build_exit()
602 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, hi), K1); in kvm_mips_build_exit()
604 uasm_i_mflo(&p, T0); in kvm_mips_build_exit()
605 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, lo), K1); in kvm_mips_build_exit()
609 uasm_i_ehb(&p); in kvm_mips_build_exit()
610 UASM_i_MFC0(&p, T0, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exit()
611 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1); in kvm_mips_build_exit()
616 UASM_i_MFC0(&p, S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exit()
622 UASM_i_MFC0(&p, K0, C0_EPC); in kvm_mips_build_exit()
623 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, pc), K1); in kvm_mips_build_exit()
625 UASM_i_MFC0(&p, K0, C0_BADVADDR); in kvm_mips_build_exit()
626 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr), in kvm_mips_build_exit()
629 uasm_i_mfc0(&p, K0, C0_CAUSE); in kvm_mips_build_exit()
630 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_cause), K1); in kvm_mips_build_exit()
633 uasm_i_mfc0(&p, K0, C0_BADINSTR); in kvm_mips_build_exit()
634 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
639 uasm_i_mfc0(&p, K0, C0_BADINSTRP); in kvm_mips_build_exit()
640 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
648 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_exit()
650 uasm_i_lui(&p, AT, ST0_BEV >> 16); in kvm_mips_build_exit()
651 uasm_i_or(&p, K0, V0, AT); in kvm_mips_build_exit()
653 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_exit()
654 uasm_i_ehb(&p); in kvm_mips_build_exit()
656 UASM_i_LA_mostly(&p, K0, (long)&ebase); in kvm_mips_build_exit()
657 UASM_i_LW(&p, K0, uasm_rel_lo((long)&ebase), K0); in kvm_mips_build_exit()
658 build_set_exc_base(&p, K0); in kvm_mips_build_exit()
665 uasm_i_lui(&p, AT, ST0_CU1 >> 16); in kvm_mips_build_exit()
666 uasm_i_and(&p, V1, V0, AT); in kvm_mips_build_exit()
667 uasm_il_beqz(&p, &r, V1, label_fpu_1); in kvm_mips_build_exit()
668 uasm_i_nop(&p); in kvm_mips_build_exit()
669 uasm_i_cfc1(&p, T0, 31); in kvm_mips_build_exit()
670 uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31), in kvm_mips_build_exit()
672 uasm_i_ctc1(&p, ZERO, 31); in kvm_mips_build_exit()
673 uasm_l_fpu_1(&l, p); in kvm_mips_build_exit()
681 uasm_i_mfc0(&p, T0, C0_CONFIG5); in kvm_mips_build_exit()
682 uasm_i_ext(&p, T0, T0, 27, 1); /* MIPS_CONF5_MSAEN */ in kvm_mips_build_exit()
683 uasm_il_beqz(&p, &r, T0, label_msa_1); in kvm_mips_build_exit()
684 uasm_i_nop(&p); in kvm_mips_build_exit()
685 uasm_i_cfcmsa(&p, T0, MSA_CSR); in kvm_mips_build_exit()
686 uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.msacsr), in kvm_mips_build_exit()
688 uasm_i_ctcmsa(&p, MSA_CSR, ZERO); in kvm_mips_build_exit()
689 uasm_l_msa_1(&l, p); in kvm_mips_build_exit()
694 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_exit()
696 UASM_i_MTC0(&p, K0, C0_ENTRYHI); in kvm_mips_build_exit()
705 UASM_i_LW(&p, A0, in kvm_mips_build_exit()
707 UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_exit()
708 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
711 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_exit()
713 uasm_i_nop(&p); in kvm_mips_build_exit()
716 uasm_i_mfc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_exit()
717 uasm_i_ins(&p, K0, ZERO, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_exit()
718 uasm_i_mtc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_exit()
721 uasm_i_sw(&p, K0, in kvm_mips_build_exit()
729 uasm_i_mfc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_exit()
731 uasm_i_ins(&p, T0, ZERO, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_exit()
733 uasm_i_mtc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_exit()
737 uasm_i_addiu(&p, AT, ZERO, ~(ST0_EXL | KSU_USER | ST0_IE)); in kvm_mips_build_exit()
738 uasm_i_and(&p, V0, V0, AT); in kvm_mips_build_exit()
739 uasm_i_lui(&p, AT, ST0_CU0 >> 16); in kvm_mips_build_exit()
740 uasm_i_or(&p, V0, V0, AT); in kvm_mips_build_exit()
742 uasm_i_ori(&p, V0, V0, ST0_SX | ST0_UX); in kvm_mips_build_exit()
744 uasm_i_mtc0(&p, V0, C0_STATUS); in kvm_mips_build_exit()
745 uasm_i_ehb(&p); in kvm_mips_build_exit()
748 UASM_i_LW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1); in kvm_mips_build_exit()
751 UASM_i_LW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_exit()
754 UASM_i_ADDIU(&p, SP, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_exit()
762 kvm_mips_build_restore_scratch(&p, K0, SP); in kvm_mips_build_exit()
765 UASM_i_LA_mostly(&p, K0, (long)&hwrena); in kvm_mips_build_exit()
766 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); in kvm_mips_build_exit()
767 uasm_i_mtc0(&p, K0, C0_HWRENA); in kvm_mips_build_exit()
775 uasm_i_move(&p, A0, S0); in kvm_mips_build_exit()
776 UASM_i_LA(&p, T9, (unsigned long)kvm_mips_handle_exit); in kvm_mips_build_exit()
777 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
778 UASM_i_ADDIU(&p, SP, SP, -CALLFRAME_SIZ); in kvm_mips_build_exit()
782 p = kvm_mips_build_ret_from_exit(p); in kvm_mips_build_exit()
784 return p; in kvm_mips_build_exit()
798 u32 *p = addr; in kvm_mips_build_ret_from_exit() local
808 uasm_i_di(&p, ZERO); in kvm_mips_build_ret_from_exit()
809 uasm_i_ehb(&p); in kvm_mips_build_ret_from_exit()
817 uasm_i_move(&p, K1, S0); in kvm_mips_build_ret_from_exit()
818 UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_ret_from_exit()
824 uasm_i_andi(&p, T0, V0, RESUME_HOST); in kvm_mips_build_ret_from_exit()
825 uasm_il_bnez(&p, &r, T0, label_return_to_host); in kvm_mips_build_ret_from_exit()
826 uasm_i_nop(&p); in kvm_mips_build_ret_from_exit()
828 p = kvm_mips_build_ret_to_guest(p); in kvm_mips_build_ret_from_exit()
830 uasm_l_return_to_host(&l, p); in kvm_mips_build_ret_from_exit()
831 p = kvm_mips_build_ret_to_host(p); in kvm_mips_build_ret_from_exit()
835 return p; in kvm_mips_build_ret_from_exit()
849 u32 *p = addr; in kvm_mips_build_ret_to_guest() local
852 UASM_i_MTC0(&p, S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_ret_to_guest()
855 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); in kvm_mips_build_ret_to_guest()
858 uasm_i_mfc0(&p, V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
859 uasm_i_lui(&p, AT, ST0_BEV >> 16); in kvm_mips_build_ret_to_guest()
860 uasm_i_or(&p, K0, V1, AT); in kvm_mips_build_ret_to_guest()
861 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_ret_to_guest()
862 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
863 build_set_exc_base(&p, T0); in kvm_mips_build_ret_to_guest()
866 uasm_i_ori(&p, V1, V1, ST0_EXL | KSU_USER | ST0_IE); in kvm_mips_build_ret_to_guest()
867 UASM_i_LA(&p, AT, ~(ST0_CU0 | ST0_MX | ST0_SX | ST0_UX)); in kvm_mips_build_ret_to_guest()
868 uasm_i_and(&p, V1, V1, AT); in kvm_mips_build_ret_to_guest()
869 uasm_i_mtc0(&p, V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
870 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
872 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_ret_to_guest()
874 return p; in kvm_mips_build_ret_to_guest()
889 u32 *p = addr; in kvm_mips_build_ret_to_host() local
893 UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_ret_to_host()
894 UASM_i_ADDIU(&p, K1, K1, -(int)sizeof(struct pt_regs)); in kvm_mips_build_ret_to_host()
900 uasm_i_sra(&p, K0, V0, 2); in kvm_mips_build_ret_to_host()
901 uasm_i_move(&p, V0, K0); in kvm_mips_build_ret_to_host()
907 UASM_i_LW(&p, i, offsetof(struct pt_regs, regs[i]), K1); in kvm_mips_build_ret_to_host()
911 UASM_i_LA_mostly(&p, K0, (long)&hwrena); in kvm_mips_build_ret_to_host()
912 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); in kvm_mips_build_ret_to_host()
913 uasm_i_mtc0(&p, K0, C0_HWRENA); in kvm_mips_build_ret_to_host()
916 UASM_i_LW(&p, RA, offsetof(struct pt_regs, regs[RA]), K1); in kvm_mips_build_ret_to_host()
917 uasm_i_jr(&p, RA); in kvm_mips_build_ret_to_host()
918 uasm_i_nop(&p); in kvm_mips_build_ret_to_host()
920 return p; in kvm_mips_build_ret_to_host()