Lines Matching full:c
5 * Copyright (C) xxxx the Anonymous
6 * Copyright (C) 1994 - 2006 Ralf Baechle
7 * Copyright (C) 2003, 2004 Maciej W. Rozycki
8 * Copyright (C) 2001, 2004, 2011, 2012 MIPS Technologies, Inc.
87 static int set_ftlb_enable(struct cpuinfo_mips *c, enum ftlb_flags flags);
144 static inline void cpu_set_mt_per_tc_perf(struct cpuinfo_mips *c) in cpu_set_mt_per_tc_perf() argument
147 c->options |= MIPS_CPU_MT_PER_TC_PERF_COUNTERS; in cpu_set_mt_per_tc_perf()
152 struct cpuinfo_mips *c = ¤t_cpu_data; in check_errata() local
161 if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2) in check_errata()
209 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) in cpu_probe_vmbits() argument
214 c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL); in cpu_probe_vmbits()
218 static void set_isa(struct cpuinfo_mips *c, unsigned int isa) in set_isa() argument
222 c->isa_level |= MIPS_CPU_ISA_M32R5 | MIPS_CPU_ISA_M64R5; in set_isa()
226 c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2; in set_isa()
230 c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1; in set_isa()
234 c->isa_level |= MIPS_CPU_ISA_V; in set_isa()
238 c->isa_level |= MIPS_CPU_ISA_IV; in set_isa()
242 c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III; in set_isa()
248 c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6; in set_isa()
252 c->isa_level |= MIPS_CPU_ISA_M32R6; in set_isa()
257 c->isa_level |= MIPS_CPU_ISA_M32R5; in set_isa()
261 c->isa_level |= MIPS_CPU_ISA_M32R2; in set_isa()
265 c->isa_level |= MIPS_CPU_ISA_M32R1; in set_isa()
269 c->isa_level |= MIPS_CPU_ISA_II; in set_isa()
278 static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c) in calculate_ftlb_probability() argument
281 unsigned int probability = c->tlbsize / c->tlbsizevtlb; in calculate_ftlb_probability()
304 static int set_ftlb_enable(struct cpuinfo_mips *c, enum ftlb_flags flags) in set_ftlb_enable() argument
309 switch (c->cputype) { in set_ftlb_enable()
323 config |= calculate_ftlb_probability(c) in set_ftlb_enable()
356 static int mm_config(struct cpuinfo_mips *c) in mm_config() argument
370 switch (c->cputype) { in mm_config()
376 c->options |= MIPS_CPU_MM_FULL; in mm_config()
394 c->options |= MIPS_CPU_MM_SYSAD; in mm_config()
396 c->options |= MIPS_CPU_MM_FULL; in mm_config()
402 static inline unsigned int decode_config0(struct cpuinfo_mips *c) in decode_config0() argument
414 c->options |= MIPS_CPU_TLB; in decode_config0()
416 c->options |= MIPS_CPU_TLB | MIPS_CPU_FTLB; in decode_config0()
423 set_isa(c, MIPS_CPU_ISA_M32R1); in decode_config0()
426 set_isa(c, MIPS_CPU_ISA_M32R2); in decode_config0()
429 set_isa(c, MIPS_CPU_ISA_M32R6); in decode_config0()
438 set_isa(c, MIPS_CPU_ISA_M64R1); in decode_config0()
441 set_isa(c, MIPS_CPU_ISA_M64R2); in decode_config0()
444 set_isa(c, MIPS_CPU_ISA_M64R6); in decode_config0()
460 static inline unsigned int decode_config1(struct cpuinfo_mips *c) in decode_config1() argument
467 c->ases |= MIPS_ASE_MDMX; in decode_config1()
469 c->options |= MIPS_CPU_PERF; in decode_config1()
471 c->options |= MIPS_CPU_WATCH; in decode_config1()
473 c->ases |= MIPS_ASE_MIPS16; in decode_config1()
475 c->options |= MIPS_CPU_EJTAG; in decode_config1()
477 c->options |= MIPS_CPU_FPU; in decode_config1()
478 c->options |= MIPS_CPU_32FPR; in decode_config1()
481 c->tlbsize = ((config1 & MIPS_CONF1_TLBS) >> 25) + 1; in decode_config1()
482 c->tlbsizevtlb = c->tlbsize; in decode_config1()
483 c->tlbsizeftlbsets = 0; in decode_config1()
489 static inline unsigned int decode_config2(struct cpuinfo_mips *c) in decode_config2() argument
496 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; in decode_config2()
501 static inline unsigned int decode_config3(struct cpuinfo_mips *c) in decode_config3() argument
508 c->ases |= MIPS_ASE_SMARTMIPS; in decode_config3()
509 c->options |= MIPS_CPU_RIXI | MIPS_CPU_CTXTC; in decode_config3()
512 c->options |= MIPS_CPU_RIXI; in decode_config3()
514 c->options |= MIPS_CPU_CTXTC; in decode_config3()
516 c->ases |= MIPS_ASE_DSP; in decode_config3()
518 c->ases |= MIPS_ASE_DSP2P; in decode_config3()
520 c->ases |= MIPS_ASE_DSP3; in decode_config3()
523 c->options |= MIPS_CPU_VINT; in decode_config3()
525 c->options |= MIPS_CPU_VEIC; in decode_config3()
527 c->options |= MIPS_CPU_LPA; in decode_config3()
529 c->ases |= MIPS_ASE_MIPSMT; in decode_config3()
531 c->options |= MIPS_CPU_ULRI; in decode_config3()
533 c->options |= MIPS_CPU_MICROMIPS; in decode_config3()
535 c->ases |= MIPS_ASE_VZ; in decode_config3()
537 c->options |= MIPS_CPU_SEGMENTS; in decode_config3()
539 c->options |= MIPS_CPU_BADINSTR; in decode_config3()
541 c->options |= MIPS_CPU_BADINSTRP; in decode_config3()
543 c->ases |= MIPS_ASE_MSA; in decode_config3()
545 c->htw_seq = 0; in decode_config3()
546 c->options |= MIPS_CPU_HTW; in decode_config3()
549 c->options |= MIPS_CPU_CDMM; in decode_config3()
551 c->options |= MIPS_CPU_SP; in decode_config3()
556 static inline unsigned int decode_config4(struct cpuinfo_mips *c) in decode_config4() argument
568 c->options |= MIPS_CPU_TLBINV; in decode_config4()
584 c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40; in decode_config4()
585 c->tlbsizevtlb = c->tlbsize; in decode_config4()
588 c->tlbsizevtlb += in decode_config4()
591 c->tlbsize = c->tlbsizevtlb; in decode_config4()
607 set_ftlb_enable(c, 0); in decode_config4()
611 c->tlbsizeftlbsets = 1 << in decode_config4()
614 c->tlbsizeftlbways = ((config4 & MIPS_CONF4_FTLBWAYS) >> in decode_config4()
616 c->tlbsize += c->tlbsizeftlbways * c->tlbsizeftlbsets; in decode_config4()
622 c->kscratch_mask = (config4 & MIPS_CONF4_KSCREXIST) in decode_config4()
628 set_cpu_asid_mask(c, asid_mask); in decode_config4()
635 WARN_ON(asid_mask != cpu_asid_mask(c)); in decode_config4()
640 static inline unsigned int decode_config5(struct cpuinfo_mips *c) in decode_config5() argument
658 c->options |= MIPS_CPU_EVA; in decode_config5()
660 c->options |= MIPS_CPU_MAAR; in decode_config5()
662 c->options |= MIPS_CPU_RW_LLB; in decode_config5()
664 c->options |= MIPS_CPU_MVH; in decode_config5()
666 c->options |= MIPS_CPU_VP; in decode_config5()
668 c->ases |= MIPS_ASE_MIPS16E2; in decode_config5()
680 c->options |= MIPS_CPU_MMID; in decode_config5()
713 set_cpu_asid_mask(c, asid_mask); in decode_config5()
720 static void decode_configs(struct cpuinfo_mips *c) in decode_configs() argument
725 c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | in decode_configs()
728 c->scache.flags = MIPS_CACHE_NOT_PRESENT; in decode_configs()
731 set_ftlb_enable(c, mips_ftlb_disabled ? 0 : FTLB_EN); in decode_configs()
733 ok = decode_config0(c); /* Read Config registers. */ in decode_configs()
736 ok = decode_config1(c); in decode_configs()
738 ok = decode_config2(c); in decode_configs()
740 ok = decode_config3(c); in decode_configs()
742 ok = decode_config4(c); in decode_configs()
744 ok = decode_config5(c); in decode_configs()
756 c->options |= MIPS_CPU_EBASE_WG; in decode_configs()
775 c->options |= MIPS_CPU_EBASE_WG; in decode_configs()
782 set_ftlb_enable(c, (mips_ftlb_disabled ? 0 : FTLB_EN) | FTLB_SET_PROB); in decode_configs()
784 mips_probe_watch_registers(c); in decode_configs()
793 cpu_set_core(c, core); in decode_configs()
826 static inline unsigned int decode_guest_config0(struct cpuinfo_mips *c) in decode_guest_config0() argument
833 c->guest.conf |= BIT(1); in decode_guest_config0()
837 static inline unsigned int decode_guest_config1(struct cpuinfo_mips *c) in decode_guest_config1() argument
846 c->guest.options |= MIPS_CPU_FPU; in decode_guest_config1()
848 c->guest.options_dyn |= MIPS_CPU_FPU; in decode_guest_config1()
851 c->guest.options |= MIPS_CPU_WATCH; in decode_guest_config1()
853 c->guest.options_dyn |= MIPS_CPU_WATCH; in decode_guest_config1()
856 c->guest.options |= MIPS_CPU_PERF; in decode_guest_config1()
858 c->guest.options_dyn |= MIPS_CPU_PERF; in decode_guest_config1()
861 c->guest.conf |= BIT(2); in decode_guest_config1()
865 static inline unsigned int decode_guest_config2(struct cpuinfo_mips *c) in decode_guest_config2() argument
872 c->guest.conf |= BIT(3); in decode_guest_config2()
876 static inline unsigned int decode_guest_config3(struct cpuinfo_mips *c) in decode_guest_config3() argument
885 c->guest.options |= MIPS_CPU_CTXTC; in decode_guest_config3()
887 c->guest.options_dyn |= MIPS_CPU_CTXTC; in decode_guest_config3()
890 c->guest.options |= MIPS_CPU_HTW; in decode_guest_config3()
893 c->guest.options |= MIPS_CPU_ULRI; in decode_guest_config3()
896 c->guest.options |= MIPS_CPU_SEGMENTS; in decode_guest_config3()
899 c->guest.options |= MIPS_CPU_BADINSTR; in decode_guest_config3()
901 c->guest.options |= MIPS_CPU_BADINSTRP; in decode_guest_config3()
904 c->guest.ases |= MIPS_ASE_MSA; in decode_guest_config3()
906 c->guest.ases_dyn |= MIPS_ASE_MSA; in decode_guest_config3()
909 c->guest.conf |= BIT(4); in decode_guest_config3()
913 static inline unsigned int decode_guest_config4(struct cpuinfo_mips *c) in decode_guest_config4() argument
920 c->guest.kscratch_mask = (config4 & MIPS_CONF4_KSCREXIST) in decode_guest_config4()
924 c->guest.conf |= BIT(5); in decode_guest_config4()
928 static inline unsigned int decode_guest_config5(struct cpuinfo_mips *c) in decode_guest_config5() argument
936 c->guest.options |= MIPS_CPU_MAAR; in decode_guest_config5()
938 c->guest.options_dyn |= MIPS_CPU_MAAR; in decode_guest_config5()
941 c->guest.options |= MIPS_CPU_RW_LLB; in decode_guest_config5()
944 c->guest.options |= MIPS_CPU_MVH; in decode_guest_config5()
947 c->guest.conf |= BIT(6); in decode_guest_config5()
951 static inline void decode_guest_configs(struct cpuinfo_mips *c) in decode_guest_configs() argument
955 ok = decode_guest_config0(c); in decode_guest_configs()
957 ok = decode_guest_config1(c); in decode_guest_configs()
959 ok = decode_guest_config2(c); in decode_guest_configs()
961 ok = decode_guest_config3(c); in decode_guest_configs()
963 ok = decode_guest_config4(c); in decode_guest_configs()
965 decode_guest_config5(c); in decode_guest_configs()
968 static inline void cpu_probe_guestctl0(struct cpuinfo_mips *c) in cpu_probe_guestctl0() argument
975 c->options |= MIPS_CPU_GUESTCTL0EXT; in cpu_probe_guestctl0()
977 c->options |= MIPS_CPU_GUESTCTL1; in cpu_probe_guestctl0()
979 c->options |= MIPS_CPU_GUESTCTL2; in cpu_probe_guestctl0()
981 c->options |= MIPS_CPU_GUESTID; in cpu_probe_guestctl0()
997 c->options |= MIPS_CPU_DRG; in cpu_probe_guestctl0()
1002 static inline void cpu_probe_guestctl1(struct cpuinfo_mips *c) in cpu_probe_guestctl1() argument
1008 c->guestid_mask = (read_c0_guestctl1() & MIPS_GCTL1_ID) in cpu_probe_guestctl1()
1014 static inline void cpu_probe_gtoffset(struct cpuinfo_mips *c) in cpu_probe_gtoffset() argument
1019 c->gtoffset_mask = read_c0_gtoffset(); in cpu_probe_gtoffset()
1023 static inline void cpu_probe_vz(struct cpuinfo_mips *c) in cpu_probe_vz() argument
1025 cpu_probe_guestctl0(c); in cpu_probe_vz()
1027 cpu_probe_guestctl1(c); in cpu_probe_vz()
1029 cpu_probe_gtoffset(c); in cpu_probe_vz()
1031 decode_guest_configs(c); in cpu_probe_vz()
1037 static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_legacy() argument
1039 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_legacy()
1041 c->cputype = CPU_R2000; in cpu_probe_legacy()
1043 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
1044 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
1047 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
1048 c->tlbsize = 64; in cpu_probe_legacy()
1051 if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A) { in cpu_probe_legacy()
1053 c->cputype = CPU_R3081E; in cpu_probe_legacy()
1056 c->cputype = CPU_R3000A; in cpu_probe_legacy()
1060 c->cputype = CPU_R3000; in cpu_probe_legacy()
1063 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
1064 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
1067 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
1068 c->tlbsize = 64; in cpu_probe_legacy()
1072 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
1074 c->cputype = CPU_R4400PC; in cpu_probe_legacy()
1077 c->cputype = CPU_R4000PC; in cpu_probe_legacy()
1101 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
1103 c->cputype = mc ? CPU_R4400MC : CPU_R4400SC; in cpu_probe_legacy()
1106 c->cputype = mc ? CPU_R4000MC : CPU_R4000SC; in cpu_probe_legacy()
1111 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1112 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1113 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1116 c->tlbsize = 48; in cpu_probe_legacy()
1119 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1120 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1121 c->options = R4K_OPTS; in cpu_probe_legacy()
1122 c->tlbsize = 32; in cpu_probe_legacy()
1123 switch (c->processor_id & 0xf0) { in cpu_probe_legacy()
1125 c->cputype = CPU_VR4111; in cpu_probe_legacy()
1129 c->cputype = CPU_VR4121; in cpu_probe_legacy()
1133 if ((c->processor_id & 0xf) < 0x3) { in cpu_probe_legacy()
1134 c->cputype = CPU_VR4122; in cpu_probe_legacy()
1137 c->cputype = CPU_VR4181A; in cpu_probe_legacy()
1142 if ((c->processor_id & 0xf) < 0x4) { in cpu_probe_legacy()
1143 c->cputype = CPU_VR4131; in cpu_probe_legacy()
1146 c->cputype = CPU_VR4133; in cpu_probe_legacy()
1147 c->options |= MIPS_CPU_LLSC; in cpu_probe_legacy()
1153 c->cputype = CPU_VR41XX; in cpu_probe_legacy()
1159 c->cputype = CPU_R4300; in cpu_probe_legacy()
1161 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1162 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1163 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1165 c->tlbsize = 32; in cpu_probe_legacy()
1168 c->cputype = CPU_R4600; in cpu_probe_legacy()
1170 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1171 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1172 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1174 c->tlbsize = 48; in cpu_probe_legacy()
1184 c->cputype = CPU_R4650; in cpu_probe_legacy()
1186 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1187 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1188 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; in cpu_probe_legacy()
1189 c->tlbsize = 48; in cpu_probe_legacy()
1193 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
1194 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; in cpu_probe_legacy()
1196 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { in cpu_probe_legacy()
1197 c->cputype = CPU_TX3927; in cpu_probe_legacy()
1199 c->tlbsize = 64; in cpu_probe_legacy()
1201 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
1203 c->cputype = CPU_TX3912; in cpu_probe_legacy()
1205 c->tlbsize = 32; in cpu_probe_legacy()
1208 c->cputype = CPU_TX3922; in cpu_probe_legacy()
1210 c->tlbsize = 64; in cpu_probe_legacy()
1216 c->cputype = CPU_R4700; in cpu_probe_legacy()
1218 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1219 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1220 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1222 c->tlbsize = 48; in cpu_probe_legacy()
1225 c->cputype = CPU_TX49XX; in cpu_probe_legacy()
1227 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1228 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1229 c->options = R4K_OPTS | MIPS_CPU_LLSC; in cpu_probe_legacy()
1230 if (!(c->processor_id & 0x08)) in cpu_probe_legacy()
1231 c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR; in cpu_probe_legacy()
1232 c->tlbsize = 48; in cpu_probe_legacy()
1235 c->cputype = CPU_R5000; in cpu_probe_legacy()
1237 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
1238 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1240 c->tlbsize = 48; in cpu_probe_legacy()
1243 c->cputype = CPU_R5500; in cpu_probe_legacy()
1245 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
1246 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1248 c->tlbsize = 48; in cpu_probe_legacy()
1251 c->cputype = CPU_NEVADA; in cpu_probe_legacy()
1253 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
1254 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1256 c->tlbsize = 48; in cpu_probe_legacy()
1259 c->cputype = CPU_RM7000; in cpu_probe_legacy()
1261 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
1262 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
1272 c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48; in cpu_probe_legacy()
1275 c->cputype = CPU_R10000; in cpu_probe_legacy()
1277 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
1278 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
1282 c->tlbsize = 64; in cpu_probe_legacy()
1285 c->cputype = CPU_R12000; in cpu_probe_legacy()
1287 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
1288 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
1292 c->tlbsize = 64; in cpu_probe_legacy()
1296 if (((c->processor_id >> 4) & 0x0f) > 2) { in cpu_probe_legacy()
1297 c->cputype = CPU_R16000; in cpu_probe_legacy()
1300 c->cputype = CPU_R14000; in cpu_probe_legacy()
1303 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
1304 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
1308 c->tlbsize = 64; in cpu_probe_legacy()
1312 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
1314 c->cputype = CPU_LOONGSON2EF; in cpu_probe_legacy()
1317 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1318 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1321 c->cputype = CPU_LOONGSON2EF; in cpu_probe_legacy()
1324 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1325 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1328 c->cputype = CPU_LOONGSON64; in cpu_probe_legacy()
1331 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
1332 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM | in cpu_probe_legacy()
1337 c->cputype = CPU_LOONGSON64; in cpu_probe_legacy()
1340 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
1341 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM | in cpu_probe_legacy()
1346 c->options = R4K_OPTS | in cpu_probe_legacy()
1349 c->tlbsize = 64; in cpu_probe_legacy()
1350 set_cpu_asid_mask(c, MIPS_ENTRYHI_ASID); in cpu_probe_legacy()
1351 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_legacy()
1354 decode_configs(c); in cpu_probe_legacy()
1356 c->cputype = CPU_LOONGSON32; in cpu_probe_legacy()
1358 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
1368 static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_mips() argument
1370 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_mips()
1371 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_mips()
1373 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1374 c->cputype = CPU_QEMU_GENERIC; in cpu_probe_mips()
1378 c->cputype = CPU_4KC; in cpu_probe_mips()
1379 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1384 c->cputype = CPU_4KEC; in cpu_probe_mips()
1385 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1390 c->cputype = CPU_4KSC; in cpu_probe_mips()
1391 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1395 c->cputype = CPU_5KC; in cpu_probe_mips()
1396 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1400 c->cputype = CPU_5KE; in cpu_probe_mips()
1401 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1405 c->cputype = CPU_20KC; in cpu_probe_mips()
1406 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1410 c->cputype = CPU_24K; in cpu_probe_mips()
1411 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1415 c->cputype = CPU_24K; in cpu_probe_mips()
1416 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1420 c->cputype = CPU_25KF; in cpu_probe_mips()
1421 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1425 c->cputype = CPU_34K; in cpu_probe_mips()
1426 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1428 cpu_set_mt_per_tc_perf(c); in cpu_probe_mips()
1431 c->cputype = CPU_74K; in cpu_probe_mips()
1432 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1436 c->cputype = CPU_M14KC; in cpu_probe_mips()
1437 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1441 c->cputype = CPU_M14KEC; in cpu_probe_mips()
1442 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1446 c->cputype = CPU_1004K; in cpu_probe_mips()
1447 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1449 cpu_set_mt_per_tc_perf(c); in cpu_probe_mips()
1452 c->cputype = CPU_1074K; in cpu_probe_mips()
1453 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1457 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1459 cpu_set_mt_per_tc_perf(c); in cpu_probe_mips()
1462 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1464 cpu_set_mt_per_tc_perf(c); in cpu_probe_mips()
1467 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1471 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1475 c->cputype = CPU_P5600; in cpu_probe_mips()
1479 c->cputype = CPU_P6600; in cpu_probe_mips()
1483 c->cputype = CPU_I6400; in cpu_probe_mips()
1487 c->cputype = CPU_I6500; in cpu_probe_mips()
1491 c->cputype = CPU_M5150; in cpu_probe_mips()
1495 c->cputype = CPU_M6250; in cpu_probe_mips()
1500 decode_configs(c); in cpu_probe_mips()
1504 mm_config(c); in cpu_probe_mips()
1506 switch (__get_cpu_type(c->cputype)) { in cpu_probe_mips()
1509 set_isa(c, MIPS_CPU_ISA_M32R5); in cpu_probe_mips()
1512 c->options |= MIPS_CPU_SHARED_FTLB_ENTRIES; in cpu_probe_mips()
1515 c->options |= MIPS_CPU_SHARED_FTLB_RAM; in cpu_probe_mips()
1524 switch (__get_cpu_type(c->cputype)) { in cpu_probe_mips()
1530 c->options |= MIPS_CPU_FTLBPAREX; in cpu_probe_mips()
1535 static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_alchemy() argument
1537 decode_configs(c); in cpu_probe_alchemy()
1538 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_alchemy()
1541 c->cputype = CPU_ALCHEMY; in cpu_probe_alchemy()
1542 switch ((c->processor_id >> 24) & 0xff) { in cpu_probe_alchemy()
1557 if ((c->processor_id & PRID_REV_MASK) == 2) in cpu_probe_alchemy()
1571 static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sibyte() argument
1573 decode_configs(c); in cpu_probe_sibyte()
1575 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_sibyte()
1576 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sibyte()
1578 c->cputype = CPU_SB1; in cpu_probe_sibyte()
1581 if ((c->processor_id & PRID_REV_MASK) < 0x02) in cpu_probe_sibyte()
1582 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); in cpu_probe_sibyte()
1585 c->cputype = CPU_SB1A; in cpu_probe_sibyte()
1591 static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sandcraft() argument
1593 decode_configs(c); in cpu_probe_sandcraft()
1594 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sandcraft()
1596 c->cputype = CPU_SR71000; in cpu_probe_sandcraft()
1598 c->scache.ways = 8; in cpu_probe_sandcraft()
1599 c->tlbsize = 64; in cpu_probe_sandcraft()
1604 static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_nxp() argument
1606 decode_configs(c); in cpu_probe_nxp()
1607 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_nxp()
1609 c->cputype = CPU_PR4450; in cpu_probe_nxp()
1611 set_isa(c, MIPS_CPU_ISA_M32R1); in cpu_probe_nxp()
1616 static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_broadcom() argument
1618 decode_configs(c); in cpu_probe_broadcom()
1619 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_broadcom()
1622 c->cputype = CPU_BMIPS32; in cpu_probe_broadcom()
1629 c->cputype = CPU_BMIPS3300; in cpu_probe_broadcom()
1635 int rev = c->processor_id & PRID_REV_MASK; in cpu_probe_broadcom()
1639 c->cputype = CPU_BMIPS4380; in cpu_probe_broadcom()
1642 c->options |= MIPS_CPU_RIXI; in cpu_probe_broadcom()
1645 c->cputype = CPU_BMIPS4350; in cpu_probe_broadcom()
1653 c->cputype = CPU_BMIPS5000; in cpu_probe_broadcom()
1654 if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_BMIPS5200) in cpu_probe_broadcom()
1659 c->options |= MIPS_CPU_ULRI | MIPS_CPU_RIXI; in cpu_probe_broadcom()
1665 static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_cavium() argument
1667 decode_configs(c); in cpu_probe_cavium()
1668 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_cavium()
1672 c->cputype = CPU_CAVIUM_OCTEON; in cpu_probe_cavium()
1679 c->cputype = CPU_CAVIUM_OCTEON_PLUS; in cpu_probe_cavium()
1689 c->cputype = CPU_CAVIUM_OCTEON2; in cpu_probe_cavium()
1697 c->cputype = CPU_CAVIUM_OCTEON3; in cpu_probe_cavium()
1703 c->cputype = CPU_UNKNOWN; in cpu_probe_cavium()
1711 static inline void decode_cpucfg(struct cpuinfo_mips *c) in decode_cpucfg() argument
1718 c->ases |= MIPS_ASE_LOONGSON_MMI; in decode_cpucfg()
1721 c->ases |= MIPS_ASE_LOONGSON_EXT; in decode_cpucfg()
1724 c->ases |= MIPS_ASE_LOONGSON_EXT2; in decode_cpucfg()
1727 c->options |= MIPS_CPU_LDPTE; in decode_cpucfg()
1728 c->guest.options |= MIPS_CPU_LDPTE; in decode_cpucfg()
1732 c->ases |= MIPS_ASE_LOONGSON_CAM; in decode_cpucfg()
1735 static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_loongson() argument
1737 decode_configs(c); in cpu_probe_loongson()
1740 c->options |= MIPS_CPU_GSEXCEX; in cpu_probe_loongson()
1742 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_loongson()
1744 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_loongson()
1749 c->cputype = CPU_LOONGSON64; in cpu_probe_loongson()
1752 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_loongson()
1755 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT | in cpu_probe_loongson()
1759 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_loongson()
1762 c->cputype = CPU_LOONGSON64; in cpu_probe_loongson()
1765 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_loongson()
1769 c->cputype = CPU_LOONGSON64; in cpu_probe_loongson()
1772 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_loongson()
1783 c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; in cpu_probe_loongson()
1784 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM | in cpu_probe_loongson()
1786 c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */ in cpu_probe_loongson()
1789 c->cputype = CPU_LOONGSON64; in cpu_probe_loongson()
1792 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_loongson()
1793 decode_cpucfg(c); in cpu_probe_loongson()
1801 static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) { } in cpu_probe_loongson() argument
1804 static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_ingenic() argument
1806 decode_configs(c); in cpu_probe_ingenic()
1812 decode_config3(c); in cpu_probe_ingenic()
1815 c->options &= ~MIPS_CPU_COUNTER; in cpu_probe_ingenic()
1819 c->icache.flags |= MIPS_CACHE_VTAG; in cpu_probe_ingenic()
1821 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_ingenic()
1834 switch (c->processor_id & PRID_COMP_MASK) { in cpu_probe_ingenic()
1842 c->isa_level &= ~MIPS_CPU_ISA_M32R2; in cpu_probe_ingenic()
1845 if (c->processor_id == 0x2ed0024f) in cpu_probe_ingenic()
1846 c->options |= MIPS_CPU_FPU; in cpu_probe_ingenic()
1872 c->writecombine = _CACHE_CACHABLE_WA; in cpu_probe_ingenic()
1873 c->cputype = CPU_XBURST; in cpu_probe_ingenic()
1879 c->cputype = CPU_XBURST; in cpu_probe_ingenic()
1889 static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) in cpu_probe_netlogic() argument
1891 decode_configs(c); in cpu_probe_netlogic()
1893 if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_NETLOGIC_AU13XX) { in cpu_probe_netlogic()
1894 c->cputype = CPU_ALCHEMY; in cpu_probe_netlogic()
1900 c->options = (MIPS_CPU_TLB | in cpu_probe_netlogic()
1908 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_netlogic()
1912 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1918 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1930 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1947 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1953 c->processor_id); in cpu_probe_netlogic()
1954 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1958 if (c->cputype == CPU_XLP) { in cpu_probe_netlogic()
1959 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_netlogic()
1960 c->options |= (MIPS_CPU_FPU | MIPS_CPU_ULRI | MIPS_CPU_MCHECK); in cpu_probe_netlogic()
1962 c->tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; in cpu_probe_netlogic()
1964 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_netlogic()
1965 c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1; in cpu_probe_netlogic()
1967 c->kscratch_mask = 0xf; in cpu_probe_netlogic()
1982 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_probe() local
1991 c->processor_id = PRID_IMP_UNKNOWN; in cpu_probe()
1992 c->fpu_id = FPIR_IMP_NONE; in cpu_probe()
1993 c->cputype = CPU_UNKNOWN; in cpu_probe()
1994 c->writecombine = _CACHE_UNCACHED; in cpu_probe()
1996 c->fpu_csr31 = FPU_CSR_RN; in cpu_probe()
1997 c->fpu_msk31 = FPU_CSR_RSVD | FPU_CSR_ABS2008 | FPU_CSR_NAN2008; in cpu_probe()
1999 c->processor_id = read_c0_prid(); in cpu_probe()
2000 switch (c->processor_id & PRID_COMP_MASK) { in cpu_probe()
2002 cpu_probe_legacy(c, cpu); in cpu_probe()
2005 cpu_probe_mips(c, cpu); in cpu_probe()
2008 cpu_probe_alchemy(c, cpu); in cpu_probe()
2011 cpu_probe_sibyte(c, cpu); in cpu_probe()
2014 cpu_probe_broadcom(c, cpu); in cpu_probe()
2017 cpu_probe_sandcraft(c, cpu); in cpu_probe()
2020 cpu_probe_nxp(c, cpu); in cpu_probe()
2023 cpu_probe_cavium(c, cpu); in cpu_probe()
2026 cpu_probe_loongson(c, cpu); in cpu_probe()
2032 cpu_probe_ingenic(c, cpu); in cpu_probe()
2035 cpu_probe_netlogic(c, cpu); in cpu_probe()
2040 BUG_ON(c->cputype == CPU_UNKNOWN); in cpu_probe()
2047 BUG_ON(current_cpu_type() != c->cputype); in cpu_probe()
2055 c->options |= MIPS_CPU_RIXIEX; in cpu_probe()
2059 c->options &= ~MIPS_CPU_FPU; in cpu_probe()
2062 c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P); in cpu_probe()
2065 c->options &= ~MIPS_CPU_HTW; in cpu_probe()
2070 if (c->options & MIPS_CPU_FPU) in cpu_probe()
2071 cpu_set_fpu_opts(c); in cpu_probe()
2073 cpu_set_nofpu_opts(c); in cpu_probe()
2076 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; in cpu_probe()
2078 c->options |= MIPS_CPU_PCI; in cpu_probe()
2081 c->srsets = 1; in cpu_probe()
2087 c->msa_id = cpu_get_msa_id(); in cpu_probe()
2088 WARN(c->msa_id & MSA_IR_WRPF, in cpu_probe()
2127 cpu_probe_vz(c); in cpu_probe()
2129 cpu_probe_vmbits(c); in cpu_probe()
2136 loongson3_cpucfg_synthesize_data(c); in cpu_probe()
2148 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_report() local
2151 smp_processor_id(), c->processor_id, cpu_name_string()); in cpu_report()
2152 if (c->options & MIPS_CPU_FPU) in cpu_report()
2153 printk(KERN_INFO "FPU revision is: %08x\n", c->fpu_id); in cpu_report()
2155 pr_info("MSA revision is: %08x\n", c->msa_id); in cpu_report()