Lines Matching +full:0 +full:x06000000
17 #define TX4939_REG_BASE 0xffffffffff1f0000UL /* == TX4938_REG_BASE */
19 #define TX4939_REG_BASE 0xff1f0000UL /* == TX4938_REG_BASE */
21 #define TX4939_REG_SIZE 0x00010000 /* == TX4938_REG_SIZE */
23 #define TX4939_ATA_REG(ch) (TX4939_REG_BASE + 0x3000 + (ch) * 0x1000)
24 #define TX4939_NDFMC_REG (TX4939_REG_BASE + 0x5000)
25 #define TX4939_SRAMC_REG (TX4939_REG_BASE + 0x6000)
26 #define TX4939_CRYPTO_REG (TX4939_REG_BASE + 0x6800)
27 #define TX4939_PCIC1_REG (TX4939_REG_BASE + 0x7000)
28 #define TX4939_DDRC_REG (TX4939_REG_BASE + 0x8000)
29 #define TX4939_EBUSC_REG (TX4939_REG_BASE + 0x9000)
30 #define TX4939_VPC_REG (TX4939_REG_BASE + 0xa000)
31 #define TX4939_DMA_REG(ch) (TX4939_REG_BASE + 0xb000 + (ch) * 0x800)
32 #define TX4939_PCIC_REG (TX4939_REG_BASE + 0xd000)
33 #define TX4939_CCFG_REG (TX4939_REG_BASE + 0xe000)
34 #define TX4939_IRC_REG (TX4939_REG_BASE + 0xe800)
35 #define TX4939_NR_TMR 6 /* 0xf000,0xf100,0xf200,0xfd00,0xfe00,0xff00 */
37 (TX4939_REG_BASE + 0xf000 + ((ch) + ((ch) >= 3) * 10) * 0x100)
38 #define TX4939_NR_SIO 4 /* 0xf300, 0xf400, 0xf380, 0xf480 */
40 (TX4939_REG_BASE + 0xf300 + (((ch) & 1) << 8) + (((ch) & 2) << 6))
41 #define TX4939_ACLC_REG (TX4939_REG_BASE + 0xf700)
42 #define TX4939_SPI_REG (TX4939_REG_BASE + 0xf800)
43 #define TX4939_I2C_REG (TX4939_REG_BASE + 0xf900)
44 #define TX4939_I2S_REG (TX4939_REG_BASE + 0xfa00)
45 #define TX4939_RTC_REG (TX4939_REG_BASE + 0xfb00)
46 #define TX4939_CIR_REG (TX4939_REG_BASE + 0xfc00)
48 #define TX4939_RNG_REG (TX4939_CRYPTO_REG + 0xb0)
178 #define TX4939_IR_NONE 0
222 #define TX4939_CCFG_PCIBOOT 0x0000040000000000ULL
223 #define TX4939_CCFG_WDRST 0x0000020000000000ULL
224 #define TX4939_CCFG_WDREXEN 0x0000010000000000ULL
225 #define TX4939_CCFG_BCFG_MASK 0x000000ff00000000ULL
226 #define TX4939_CCFG_GTOT_MASK 0x06000000
227 #define TX4939_CCFG_GTOT_4096 0x06000000
228 #define TX4939_CCFG_GTOT_2048 0x04000000
229 #define TX4939_CCFG_GTOT_1024 0x02000000
230 #define TX4939_CCFG_GTOT_512 0x00000000
231 #define TX4939_CCFG_TINTDIS 0x01000000
232 #define TX4939_CCFG_PCI66 0x00800000
233 #define TX4939_CCFG_PCIMODE 0x00400000
234 #define TX4939_CCFG_SSCG 0x00100000
235 #define TX4939_CCFG_MULCLK_MASK 0x000e0000
236 #define TX4939_CCFG_MULCLK_8 (0x7 << 17)
237 #define TX4939_CCFG_MULCLK_9 (0x0 << 17)
238 #define TX4939_CCFG_MULCLK_10 (0x1 << 17)
239 #define TX4939_CCFG_MULCLK_11 (0x2 << 17)
240 #define TX4939_CCFG_MULCLK_12 (0x3 << 17)
241 #define TX4939_CCFG_MULCLK_13 (0x4 << 17)
242 #define TX4939_CCFG_MULCLK_14 (0x5 << 17)
243 #define TX4939_CCFG_MULCLK_15 (0x6 << 17)
244 #define TX4939_CCFG_BEOW 0x00010000
245 #define TX4939_CCFG_WR 0x00008000
246 #define TX4939_CCFG_TOE 0x00004000
247 #define TX4939_CCFG_PCIARB 0x00002000
248 #define TX4939_CCFG_YDIVMODE_MASK 0x00001c00
249 #define TX4939_CCFG_YDIVMODE_2 (0x0 << 10)
250 #define TX4939_CCFG_YDIVMODE_3 (0x1 << 10)
251 #define TX4939_CCFG_YDIVMODE_5 (0x6 << 10)
252 #define TX4939_CCFG_YDIVMODE_6 (0x7 << 10)
253 #define TX4939_CCFG_PTSEL 0x00000200
254 #define TX4939_CCFG_BESEL 0x00000100
255 #define TX4939_CCFG_SYSSP_MASK 0x000000c0
256 #define TX4939_CCFG_ACKSEL 0x00000020
257 #define TX4939_CCFG_ROMW 0x00000010
258 #define TX4939_CCFG_ENDIAN 0x00000004
259 #define TX4939_CCFG_ARMODE 0x00000002
260 #define TX4939_CCFG_ACEHOLD 0x00000001
263 #define TX4939_PCFG_SIO2MODE_MASK 0xc000000000000000ULL
264 #define TX4939_PCFG_SIO2MODE_GPIO 0x8000000000000000ULL
265 #define TX4939_PCFG_SIO2MODE_SIO2 0x4000000000000000ULL
266 #define TX4939_PCFG_SIO2MODE_SIO0 0x0000000000000000ULL
267 #define TX4939_PCFG_SPIMODE 0x2000000000000000ULL
268 #define TX4939_PCFG_I2CMODE 0x1000000000000000ULL
269 #define TX4939_PCFG_I2SMODE_MASK 0x0c00000000000000ULL
270 #define TX4939_PCFG_I2SMODE_GPIO 0x0c00000000000000ULL
271 #define TX4939_PCFG_I2SMODE_I2S 0x0800000000000000ULL
272 #define TX4939_PCFG_I2SMODE_I2S_ALT 0x0400000000000000ULL
273 #define TX4939_PCFG_I2SMODE_ACLC 0x0000000000000000ULL
274 #define TX4939_PCFG_SIO3MODE 0x0200000000000000ULL
275 #define TX4939_PCFG_DMASEL3 0x0004000000000000ULL
276 #define TX4939_PCFG_DMASEL3_SIO0 0x0004000000000000ULL
277 #define TX4939_PCFG_DMASEL3_NDFC 0x0000000000000000ULL
278 #define TX4939_PCFG_VSSMODE 0x0000200000000000ULL
279 #define TX4939_PCFG_VPSMODE 0x0000100000000000ULL
280 #define TX4939_PCFG_ET1MODE 0x0000080000000000ULL
281 #define TX4939_PCFG_ET0MODE 0x0000040000000000ULL
282 #define TX4939_PCFG_ATA1MODE 0x0000020000000000ULL
283 #define TX4939_PCFG_ATA0MODE 0x0000010000000000ULL
284 #define TX4939_PCFG_BP_PLL 0x0000000100000000ULL
286 #define TX4939_PCFG_SYSCLKEN 0x08000000
287 #define TX4939_PCFG_PCICLKEN_ALL 0x000f0000
288 #define TX4939_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
289 #define TX4939_PCFG_SPEED1 0x00002000
290 #define TX4939_PCFG_SPEED0 0x00001000
291 #define TX4939_PCFG_ITMODE 0x00000300
292 #define TX4939_PCFG_DMASEL_ALL (0x00000007 | TX4939_PCFG_DMASEL3)
293 #define TX4939_PCFG_DMASEL2 0x00000004
294 #define TX4939_PCFG_DMASEL2_DRQ2 0x00000000
295 #define TX4939_PCFG_DMASEL2_SIO0 0x00000004
296 #define TX4939_PCFG_DMASEL1 0x00000002
297 #define TX4939_PCFG_DMASEL1_DRQ1 0x00000000
298 #define TX4939_PCFG_DMASEL0 0x00000001
299 #define TX4939_PCFG_DMASEL0_DRQ0 0x00000000
302 #define TX4939_CLKCTR_IOSCKD 0x8000000000000000ULL
303 #define TX4939_CLKCTR_SYSCKD 0x4000000000000000ULL
304 #define TX4939_CLKCTR_TM5CKD 0x2000000000000000ULL
305 #define TX4939_CLKCTR_TM4CKD 0x1000000000000000ULL
306 #define TX4939_CLKCTR_TM3CKD 0x0800000000000000ULL
307 #define TX4939_CLKCTR_CIRCKD 0x0400000000000000ULL
308 #define TX4939_CLKCTR_SIO3CKD 0x0200000000000000ULL
309 #define TX4939_CLKCTR_SIO2CKD 0x0100000000000000ULL
310 #define TX4939_CLKCTR_SIO1CKD 0x0080000000000000ULL
311 #define TX4939_CLKCTR_VPCCKD 0x0040000000000000ULL
312 #define TX4939_CLKCTR_EPCICKD 0x0020000000000000ULL
313 #define TX4939_CLKCTR_ETH1CKD 0x0008000000000000ULL
314 #define TX4939_CLKCTR_ATA1CKD 0x0004000000000000ULL
315 #define TX4939_CLKCTR_BROMCKD 0x0002000000000000ULL
316 #define TX4939_CLKCTR_NDCCKD 0x0001000000000000ULL
317 #define TX4939_CLKCTR_I2CCKD 0x0000800000000000ULL
318 #define TX4939_CLKCTR_ETH0CKD 0x0000400000000000ULL
319 #define TX4939_CLKCTR_SPICKD 0x0000200000000000ULL
320 #define TX4939_CLKCTR_SRAMCKD 0x0000100000000000ULL
321 #define TX4939_CLKCTR_PCI1CKD 0x0000080000000000ULL
322 #define TX4939_CLKCTR_DMA1CKD 0x0000040000000000ULL
323 #define TX4939_CLKCTR_ACLCKD 0x0000020000000000ULL
324 #define TX4939_CLKCTR_ATA0CKD 0x0000010000000000ULL
325 #define TX4939_CLKCTR_DMA0CKD 0x0000008000000000ULL
326 #define TX4939_CLKCTR_PCICCKD 0x0000004000000000ULL
327 #define TX4939_CLKCTR_I2SCKD 0x0000002000000000ULL
328 #define TX4939_CLKCTR_TM0CKD 0x0000001000000000ULL
329 #define TX4939_CLKCTR_TM1CKD 0x0000000800000000ULL
330 #define TX4939_CLKCTR_TM2CKD 0x0000000400000000ULL
331 #define TX4939_CLKCTR_SIO0CKD 0x0000000200000000ULL
332 #define TX4939_CLKCTR_CYPCKD 0x0000000100000000ULL
333 #define TX4939_CLKCTR_IOSRST 0x80000000
334 #define TX4939_CLKCTR_SYSRST 0x40000000
335 #define TX4939_CLKCTR_TM5RST 0x20000000
336 #define TX4939_CLKCTR_TM4RST 0x10000000
337 #define TX4939_CLKCTR_TM3RST 0x08000000
338 #define TX4939_CLKCTR_CIRRST 0x04000000
339 #define TX4939_CLKCTR_SIO3RST 0x02000000
340 #define TX4939_CLKCTR_SIO2RST 0x01000000
341 #define TX4939_CLKCTR_SIO1RST 0x00800000
342 #define TX4939_CLKCTR_VPCRST 0x00400000
343 #define TX4939_CLKCTR_EPCIRST 0x00200000
344 #define TX4939_CLKCTR_ETH1RST 0x00080000
345 #define TX4939_CLKCTR_ATA1RST 0x00040000
346 #define TX4939_CLKCTR_BROMRST 0x00020000
347 #define TX4939_CLKCTR_NDCRST 0x00010000
348 #define TX4939_CLKCTR_I2CRST 0x00008000
349 #define TX4939_CLKCTR_ETH0RST 0x00004000
350 #define TX4939_CLKCTR_SPIRST 0x00002000
351 #define TX4939_CLKCTR_SRAMRST 0x00001000
352 #define TX4939_CLKCTR_PCI1RST 0x00000800
353 #define TX4939_CLKCTR_DMA1RST 0x00000400
354 #define TX4939_CLKCTR_ACLRST 0x00000200
355 #define TX4939_CLKCTR_ATA0RST 0x00000100
356 #define TX4939_CLKCTR_DMA0RST 0x00000080
357 #define TX4939_CLKCTR_PCICRST 0x00000040
358 #define TX4939_CLKCTR_I2SRST 0x00000020
359 #define TX4939_CLKCTR_TM0RST 0x00000010
360 #define TX4939_CLKCTR_TM1RST 0x00000008
361 #define TX4939_CLKCTR_TM2RST 0x00000004
362 #define TX4939_CLKCTR_SIO0RST 0x00000002
363 #define TX4939_CLKCTR_CYPRST 0x00000001
368 #define TX4939_CRYPTO_CSR_SAESO 0x08000000
369 #define TX4939_CRYPTO_CSR_SAESI 0x04000000
370 #define TX4939_CRYPTO_CSR_SDESO 0x02000000
371 #define TX4939_CRYPTO_CSR_SDESI 0x01000000
372 #define TX4939_CRYPTO_CSR_INDXBST_MASK 0x00700000
374 #define TX4939_CRYPTO_CSR_TOINT 0x00080000
375 #define TX4939_CRYPTO_CSR_DCINT 0x00040000
376 #define TX4939_CRYPTO_CSR_GBINT 0x00010000
377 #define TX4939_CRYPTO_CSR_INDXAST_MASK 0x0000e000
379 #define TX4939_CRYPTO_CSR_CSWAP_MASK 0x00001800
380 #define TX4939_CRYPTO_CSR_CSWAP_NONE 0x00000000
381 #define TX4939_CRYPTO_CSR_CSWAP_IN 0x00000800
382 #define TX4939_CRYPTO_CSR_CSWAP_OUT 0x00001000
383 #define TX4939_CRYPTO_CSR_CSWAP_BOTH 0x00001800
384 #define TX4939_CRYPTO_CSR_CDIV_MASK 0x00000600
385 #define TX4939_CRYPTO_CSR_CDIV_DIV2 0x00000000
386 #define TX4939_CRYPTO_CSR_CDIV_DIV1 0x00000200
387 #define TX4939_CRYPTO_CSR_CDIV_DIV2ALT 0x00000400
388 #define TX4939_CRYPTO_CSR_CDIV_DIV1ALT 0x00000600
389 #define TX4939_CRYPTO_CSR_PDINT_MASK 0x000000c0
390 #define TX4939_CRYPTO_CSR_PDINT_ALL 0x00000000
391 #define TX4939_CRYPTO_CSR_PDINT_END 0x00000040
392 #define TX4939_CRYPTO_CSR_PDINT_NEXT 0x00000080
393 #define TX4939_CRYPTO_CSR_PDINT_NONE 0x000000c0
394 #define TX4939_CRYPTO_CSR_GINTE 0x00000008
395 #define TX4939_CRYPTO_CSR_RSTD 0x00000004
396 #define TX4939_CRYPTO_CSR_RSTC 0x00000002
397 #define TX4939_CRYPTO_CSR_ENCR 0x00000001
400 #define TX4939_CRYPTO_CTX_ENGINE_MASK 0x00000003
401 #define TX4939_CRYPTO_CTX_ENGINE_DES 0x00000000
402 #define TX4939_CRYPTO_CTX_ENGINE_AES 0x00000001
403 #define TX4939_CRYPTO_CTX_ENGINE_MD5 0x00000002
404 #define TX4939_CRYPTO_CTX_ENGINE_SHA1 0x00000003
405 #define TX4939_CRYPTO_CTX_TDMS 0x00000010
406 #define TX4939_CRYPTO_CTX_CMS 0x00000020
407 #define TX4939_CRYPTO_CTX_DMS 0x00000040
408 #define TX4939_CRYPTO_CTX_UPDATE 0x00000080
411 #define TX4939_CRYPTO_DESC_OB_CNT_MASK 0xffe00000
413 #define TX4939_CRYPTO_DESC_IB_CNT_MASK 0x001ffc00
415 #define TX4939_CRYPTO_DESC_START 0x00000200
416 #define TX4939_CRYPTO_DESC_END 0x00000100
417 #define TX4939_CRYPTO_DESC_XOR 0x00000010
418 #define TX4939_CRYPTO_DESC_LAST 0x00000008
419 #define TX4939_CRYPTO_DESC_ERR_MASK 0x00000006
420 #define TX4939_CRYPTO_DESC_ERR_NONE 0x00000000
421 #define TX4939_CRYPTO_DESC_ERR_TOUT 0x00000002
422 #define TX4939_CRYPTO_DESC_ERR_DIGEST 0x00000004
423 #define TX4939_CRYPTO_DESC_OWN 0x00000001
426 #define TX4939_CRYPTO_DESC_HASH_IDX_MASK 0x00000070
428 #define TX4939_CRYPTO_DESC_ENCRYPT_IDX_MASK 0x00000007
429 #define TX4939_CRYPTO_DESC_ENCRYPT_IDX(idx) ((idx) << 0)
433 #define TX4939_CRYPTO_RCSR_INTE 0x00000008
434 #define TX4939_CRYPTO_RCSR_RST 0x00000004
435 #define TX4939_CRYPTO_RCSR_FIN 0x00000002
436 #define TX4939_CRYPTO_RCSR_ST 0x00000001
441 #define TX4939_VPC_CSR_GBINT 0x00010000
442 #define TX4939_VPC_CSR_SWAPO 0x00000020
443 #define TX4939_VPC_CSR_SWAPI 0x00000010
444 #define TX4939_VPC_CSR_GINTE 0x00000008
445 #define TX4939_VPC_CSR_RSTD 0x00000004
446 #define TX4939_VPC_CSR_RSTVPC 0x00000002
448 #define TX4939_VPC_CTRLA_VDPSN 0x00000200
449 #define TX4939_VPC_CTRLA_PBUSY 0x00000100
450 #define TX4939_VPC_CTRLA_DCINT 0x00000080
451 #define TX4939_VPC_CTRLA_UOINT 0x00000040
452 #define TX4939_VPC_CTRLA_PDINT_MASK 0x00000030
453 #define TX4939_VPC_CTRLA_PDINT_ALL 0x00000000
454 #define TX4939_VPC_CTRLA_PDINT_NEXT 0x00000010
455 #define TX4939_VPC_CTRLA_PDINT_NONE 0x00000030
456 #define TX4939_VPC_CTRLA_VDVLDP 0x00000008
457 #define TX4939_VPC_CTRLA_VDMODE 0x00000004
458 #define TX4939_VPC_CTRLA_VDFOR 0x00000002
459 #define TX4939_VPC_CTRLA_ENVPC 0x00000001
462 #define TX4939_VPC_DESC_CTRL1_ERR_MASK 0x00000006
463 #define TX4939_VPC_DESC_CTRL1_OWN 0x00000001
479 ((__u32)__raw_readq(&tx4939_ccfgptr->crir) & 0x00ff)
494 (16 >> ((__u32)(TX4939_EBUSC_CR(ch) >> 20) & 0x1))