1 # SPDX-License-Identifier: GPL-2.0
5 	select ARCH_32BIT_OFF_T if !64BIT
7 	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
11 	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
20 	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
32 	select GENERIC_ATOMIC64 if !64BIT
60 	select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
68 	select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
92 	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
96 	select MODULES_USE_ELF_RELA if MODULES && 64BIT
135 	bool "Generic board-agnostic MIPS kernel"
223 	  Support for the Texas Instruments AR7 System-on-a-Chip
295 	  Build a generic DT-based kernel image that boots on select
296 	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
368 	select CPU_DADDI_WORKAROUNDS if 64BIT
369 	select CPU_R4000_WORKAROUNDS if 64BIT
370 	select CPU_R4400_WORKAROUNDS if 64BIT
385 	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
386 	  DECstation porting pages on <http://decstation.unix-ag.org/>.
426 	  Olivetti M700-10 workstations.
461 	bool "Loongson 32-bit family of machines"
464 	  This enables support for the Loongson-1 family of machines.
466 	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
471 	bool "Loongson-2E/F family of machines"
474 	  This enables the support of early Loongson-2E/F family of machines.
477 	bool "Loongson 64-bit family of machines"
511 	  This enables the support of Loongson-2/3 family of machines.
513 	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
514 	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
515 	  and Loongson-2F which will be removed), developed by the Institute
571 	select ZONE_DMA32 if 64BIT
581 	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
593 	bool "Nintendo 64 console"
803 	bool "Sibyte BCM91120C-CRhine"
812 	bool "Sibyte BCM91120x-Carmel"
821 	bool "Sibyte BCM91125C-CRhone"
831 	bool "Sibyte BCM91125E-Rhone"
840 	bool "Sibyte BCM91250A-SWARM"
849 	select ZONE_DMA32 if 64BIT
853 	bool "Sibyte BCM91250C2-LittleSur"
862 	select ZONE_DMA32 if 64BIT
865 	bool "Sibyte BCM91250E-Sentosa"
875 	bool "Sibyte BCM91480B-BigSur"
884 	select ZONE_DMA32 if 64BIT
924 	  The SNI RM200/300/400 are MIPS-based machines manufactured by
1014 	select ZONE_DMA32 if 64BIT
1041 	select ZONE_DMA32 if 64BIT
1065 source "arch/mips/sgi-ip27/Kconfig"
1069 source "arch/mips/cavium-octeon/Kconfig"
1366 	bool "Loongson 64-bit CPU"
1388 		including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1390 		Loongson-2E/2F is not covered here and will be removed in future.
1393 	bool "New Loongson-3 CPU Enhancements"
1397 	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1398 	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1399 	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1400 	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1405 	  please say 'N' here. If you want a high-performance kernel to run on
1406 	  new Loongson-3 machines only, please say 'Y' here.
1409 	bool "Old Loongson-3 LLSC Workarounds"
1413 	  Loongson-3 processors have the llsc issues which require workarounds.
1416 	  Newer Loongson-3 will fix these issues and no workarounds are needed.
1428 	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1431 	  cores, back to Loongson-3A1000.
1455 	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1465 	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1475 	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1487 	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1506 	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1552 	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1573 	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1587 	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1605 	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1628 	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1630 	  cache, IOCU/IOMMU (though might be unused depending on the system-
1673 	  MIPS Technologies R4300-series processors.
1682 	  MIPS Technologies R4000-series processors other than 4300, including
1700 	  MIPS Technologies R5000-series processors other than the Nevada.
1709 	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1719 	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1730 	  MIPS Technologies R10000-series processors.
1861 	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1880 	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1961 	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
2067 # CPU may reorder R->R, R->W, W->R, W->W
2075 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2156 	depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2159 	depends on 64BIT
2175 	  actually benefits from 64-bit processing or if your machine has
2177 	  menu if your system does not support both 32-bit and 64-bit kernels.
2179 config 32BIT
2180 	bool "32-bit kernel"
2184 	  Select this option if you want to build a 32-bit kernel.
2186 config 64BIT  config in Kernel type""choice2d01d8010404
2187 	bool "64-bit kernel"
2190 	  Select this option if you want to build a 64-bit kernel.
2196 	depends on 64BIT
2216 	  R3000-family processors this is the only available page size.  Using
2236 	  all non-R3000 family processors.  Note that you will need a suitable
2250 	bool "64kB"
2253 	  Using 64kB page size will result in higher performance kernel at
2255 	  all non-R3000 family processor.  Not that at the time of this
2262 	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2264 	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2266 	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2268 	range 0 64
2292 # Support for a MIPS32 / MIPS64 style S-caches
2371 	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
2392 	bool "Dynamic FPU affinity for FP-intensive threads"
2397 	bool "MIPS R2-to-R6 emulator"
2402 	  Choose this option if you want to run non-R6 MIPS userland code.
2405 	  The only reason this is a build-time option is to save ~14K from the
2536 	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2548 	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2550 	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2581 	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2602 # CPU non-features
2616 	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2637 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2689 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2691 # I-cache line worth of instructions being fetched may case spurious
2697 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2706 # - Highmem only makes sense for the 32-bit kernel.
2707 # - The current highmem code will only work properly on physically indexed
2714 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2720 	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2738 	  This option must be set if a kernel might be executed on a MIPS16-
2740 	  words, it makes the kernel MIPS16-tolerant.
2758 	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2824 	range 0x0 0x40000000 if EVA || 64BIT
2833 	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2834 	  EVA or 64-bit. The default is 16Mb.
2861 	bool "Multi-Processing support"
2868 	  If you say N here, the kernel will run on uni- and multiprocessor
2877 	  See also the SMP-HOWTO available at
2883 	bool "Support for hot-pluggable CPUs"
2920 	int "Maximum number of CPUs (2-256)"
2927 	default "64" if NR_CPUS_DEFAULT_64
2930 	  kernel will support.  The maximum supported value is 32 for 32-bit
2931 	  kernel and 64 for 64-bit kernels; the minimum value which makes
2935 	  This is purely to save memory - each supported CPU adds
3059 	  which are loaded in the main kernel with kexec-tools into
3074 	  passed to the panic-ed kernel).
3077 	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3078 	depends on 32BIT || MIPS32_O32
3080 	  When this is enabled, the kernel will support use of 64-bit floating
3082 	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3083 	  32-bit MIPS systems this support is at the cost of increasing the
3086 	  will require 64-bit floating point, you may wish to reduce the size
3128 		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3188 	default 3 if 64BIT && !PAGE_SIZE_64KB
3222 	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3224 	  <http://www.linux-mips.org/wiki/DECstation>
3231 	default 12 if 64BIT
3235 	default 18 if 64BIT
3265 	depends on 64BIT
3272 	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3279 	depends on 64BIT
3286 	  64-bit binaries using 32-bit quantities for addressing and certain
3287 	  data that would normally be 64-bit.  They are used in special