176 static bool is_addsub_imm(u32 imm)  in is_addsub_imm()  argument
179 	return !(imm & ~0xfff) || !(imm & ~0xfff000);  in is_addsub_imm()
435 	const s32 imm = insn->imm;  in build_insn()  local
445 #define check_imm(bits, imm) do {				\  in build_insn()  argument
446 	if ((((imm) > 0) && ((imm) >> (bits))) ||		\  in build_insn()
447 	    (((imm) < 0) && (~(imm) >> (bits)))) {		\  in build_insn()
449 			i, imm, imm);				\  in build_insn()
453 #define check_imm19(imm) check_imm(19, imm)  in build_insn()  argument
454 #define check_imm26(imm) check_imm(26, imm)  in build_insn()  argument
523 		switch (imm) {  in build_insn()
539 		switch (imm) {  in build_insn()
556 		emit_a64_mov_i(is64, dst, imm, ctx);  in build_insn()
561 		if (is_addsub_imm(imm)) {  in build_insn()
562 			emit(A64_ADD_I(is64, dst, dst, imm), ctx);  in build_insn()
563 		} else if (is_addsub_imm(-imm)) {  in build_insn()
564 			emit(A64_SUB_I(is64, dst, dst, -imm), ctx);  in build_insn()
566 			emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
572 		if (is_addsub_imm(imm)) {  in build_insn()
573 			emit(A64_SUB_I(is64, dst, dst, imm), ctx);  in build_insn()
574 		} else if (is_addsub_imm(-imm)) {  in build_insn()
575 			emit(A64_ADD_I(is64, dst, dst, -imm), ctx);  in build_insn()
577 			emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
583 		a64_insn = A64_AND_I(is64, dst, dst, imm);  in build_insn()
587 			emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
593 		a64_insn = A64_ORR_I(is64, dst, dst, imm);  in build_insn()
597 			emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
603 		a64_insn = A64_EOR_I(is64, dst, dst, imm);  in build_insn()
607 			emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
613 		emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
618 		emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
623 		emit_a64_mov_i(is64, tmp2, imm, ctx);  in build_insn()
629 		emit(A64_LSL(is64, dst, dst, imm), ctx);  in build_insn()
633 		emit(A64_LSR(is64, dst, dst, imm), ctx);  in build_insn()
637 		emit(A64_ASR(is64, dst, dst, imm), ctx);  in build_insn()
733 		if (is_addsub_imm(imm)) {  in build_insn()
734 			emit(A64_CMP_I(is64, dst, imm), ctx);  in build_insn()
735 		} else if (is_addsub_imm(-imm)) {  in build_insn()
736 			emit(A64_CMN_I(is64, dst, -imm), ctx);  in build_insn()
738 			emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
744 		a64_insn = A64_TST_I(is64, dst, imm);  in build_insn()
748 			emit_a64_mov_i(is64, tmp, imm, ctx);  in build_insn()
790 		imm64 = (u64)insn1.imm << 32 | (u32)imm;  in build_insn()
846 		emit_a64_mov_i(1, tmp, imm, ctx);  in build_insn()
887 		if (insn->imm != BPF_ADD) {  in build_insn()
888 			pr_err_once("unknown atomic op code %02x\n", insn->imm);  in build_insn()