Lines Matching +full:num +full:- +full:ss +full:- +full:bits
1 // SPDX-License-Identifier: GPL-2.0-only
35 #include <asm/debug-monitors.h>
97 * regs_query_register_offset() - query register offset from its name
101 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
107 for (roff = regoffset_table; roff->name != NULL; roff++) in regs_query_register_offset()
108 if (!strcmp(roff->name, name)) in regs_query_register_offset()
109 return roff->offset; in regs_query_register_offset()
110 return -EINVAL; in regs_query_register_offset()
114 * regs_within_kernel_stack() - check the address in the stack
123 return ((addr & ~(THREAD_SIZE - 1)) == in regs_within_kernel_stack()
124 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) || in regs_within_kernel_stack()
129 * regs_get_kernel_stack_nth() - get Nth entry of the stack
160 * grown its fair share of arch-specific worts and changing it in ptrace_disable()
168 * Handle hitting a HW-breakpoint.
183 if (current->thread.debug.hbp_break[i] == bp) { in ptrace_hbptriggered()
190 if (current->thread.debug.hbp_watch[i] == bp) { in ptrace_hbptriggered()
191 si_errno = -((i << 1) + 1); in ptrace_hbptriggered()
195 arm64_force_sig_ptrace_errno_trap(si_errno, bkpt->trigger, in ptrace_hbptriggered()
200 arm64_force_sig_fault(SIGTRAP, TRAP_HWBKPT, bkpt->trigger, desc); in ptrace_hbptriggered()
210 struct thread_struct *t = &tsk->thread; in flush_ptrace_hw_breakpoint()
213 if (t->debug.hbp_break[i]) { in flush_ptrace_hw_breakpoint()
214 unregister_hw_breakpoint(t->debug.hbp_break[i]); in flush_ptrace_hw_breakpoint()
215 t->debug.hbp_break[i] = NULL; in flush_ptrace_hw_breakpoint()
220 if (t->debug.hbp_watch[i]) { in flush_ptrace_hw_breakpoint()
221 unregister_hw_breakpoint(t->debug.hbp_watch[i]); in flush_ptrace_hw_breakpoint()
222 t->debug.hbp_watch[i] = NULL; in flush_ptrace_hw_breakpoint()
229 memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); in ptrace_hw_copy_thread()
236 struct perf_event *bp = ERR_PTR(-EINVAL); in ptrace_hbp_get_event()
243 bp = tsk->thread.debug.hbp_break[idx]; in ptrace_hbp_get_event()
249 bp = tsk->thread.debug.hbp_watch[idx]; in ptrace_hbp_get_event()
262 int err = -EINVAL; in ptrace_hbp_set_event()
269 tsk->thread.debug.hbp_break[idx] = bp; in ptrace_hbp_set_event()
276 tsk->thread.debug.hbp_watch[idx] = bp; in ptrace_hbp_set_event()
301 return ERR_PTR(-EINVAL); in ptrace_hbp_create()
332 attr->disabled = disabled; in ptrace_hbp_fill_attr_ctrl()
343 return -EINVAL; in ptrace_hbp_fill_attr_ctrl()
347 return -EINVAL; in ptrace_hbp_fill_attr_ctrl()
350 return -EINVAL; in ptrace_hbp_fill_attr_ctrl()
353 attr->bp_len = len; in ptrace_hbp_fill_attr_ctrl()
354 attr->bp_type = type; in ptrace_hbp_fill_attr_ctrl()
355 attr->bp_addr += offset; in ptrace_hbp_fill_attr_ctrl()
362 u8 num; in ptrace_hbp_get_resource_info() local
367 num = hw_breakpoint_slots(TYPE_INST); in ptrace_hbp_get_resource_info()
370 num = hw_breakpoint_slots(TYPE_DATA); in ptrace_hbp_get_resource_info()
373 return -EINVAL; in ptrace_hbp_get_resource_info()
378 reg |= num; in ptrace_hbp_get_resource_info()
394 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0; in ptrace_hbp_get_ctrl()
408 *addr = bp ? counter_arch_bp(bp)->address : 0; in ptrace_hbp_get_addr()
440 attr = bp->attr; in ptrace_hbp_set_ctrl()
464 attr = bp->attr; in ptrace_hbp_set_addr()
478 unsigned int note_type = regset->core_note_type; in hw_break_get()
511 unsigned int note_type = regset->core_note_type; in hw_break_set()
523 limit = regset->n * regset->size; in hw_break_set()
526 return -EINVAL; in hw_break_set()
564 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs; in gpr_get()
573 struct user_pt_regs newregs = task_pt_regs(target)->user_regs; in gpr_set()
575 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1); in gpr_set()
580 return -EINVAL; in gpr_set()
582 task_pt_regs(target)->user_regs = newregs; in gpr_set()
589 return -ENODEV; in fpr_active()
590 return regset->n; in fpr_active()
604 uregs = &target->thread.uw.fpsimd_state; in __fpr_get()
613 return -EINVAL; in fpr_get()
631 * Ensure target->thread.uw.fpsimd_state is up to date, so that a in __fpr_set()
636 newstate = target->thread.uw.fpsimd_state; in __fpr_set()
643 target->thread.uw.fpsimd_state = newstate; in __fpr_set()
655 return -EINVAL; in fpr_set()
673 return membuf_store(&to, target->thread.uw.tp_value); in tls_get()
681 unsigned long tls = target->thread.uw.tp_value; in tls_set()
683 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1); in tls_set()
687 target->thread.uw.tp_value = tls; in tls_set()
695 return membuf_store(&to, task_pt_regs(target)->syscallno); in system_call_get()
703 int syscallno = task_pt_regs(target)->syscallno; in system_call_set()
706 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1); in system_call_set()
710 task_pt_regs(target)->syscallno = syscallno; in system_call_set()
723 header->flags = test_tsk_thread_flag(target, TIF_SVE) ? in sve_init_header_from_task()
726 header->flags |= SVE_PT_VL_INHERIT; in sve_init_header_from_task()
728 header->vl = target->thread.sve_vl; in sve_init_header_from_task()
729 vq = sve_vq_from_vl(header->vl); in sve_init_header_from_task()
731 header->max_vl = sve_max_vl; in sve_init_header_from_task()
732 header->size = SVE_PT_SIZE(vq, header->flags); in sve_init_header_from_task()
733 header->max_size = SVE_PT_SIZE(sve_vq_from_vl(header->max_vl), in sve_init_header_from_task()
739 return ALIGN(header->size, SVE_VQ_BYTES); in sve_size_from_header()
751 return -EINVAL; in sve_get()
762 /* Registers: FPSIMD-only case */ in sve_get()
773 membuf_write(&to, target->thread.sve_state, end - start); in sve_get()
777 membuf_zero(&to, end - start); in sve_get()
785 membuf_write(&to, &target->thread.uw.fpsimd_state.fpsr, end - start); in sve_get()
789 return membuf_zero(&to, end - start); in sve_get()
803 return -EINVAL; in sve_set()
807 return -EINVAL; in sve_set()
823 vq = sve_vq_from_vl(target->thread.sve_vl); in sve_set()
825 /* Registers: FPSIMD-only case */ in sve_set()
843 ret = -EIO; in sve_set()
848 if (!target->thread.sve_state) { in sve_set()
849 ret = -ENOMEM; in sve_set()
855 * Ensure target->thread.sve_state is up to date with target's in sve_set()
866 target->thread.sve_state, in sve_set()
885 &target->thread.uw.fpsimd_state.fpsr, in sve_set()
901 * The PAC bits can differ across data and instruction pointers in pac_mask_get()
912 return -EINVAL; in pac_mask_get()
952 return (__uint128_t)key->hi << 64 | key->lo; in pac_key_to_user()
968 ukeys->apiakey = pac_key_to_user(&keys->apia); in pac_address_keys_to_user()
969 ukeys->apibkey = pac_key_to_user(&keys->apib); in pac_address_keys_to_user()
970 ukeys->apdakey = pac_key_to_user(&keys->apda); in pac_address_keys_to_user()
971 ukeys->apdbkey = pac_key_to_user(&keys->apdb); in pac_address_keys_to_user()
977 keys->apia = pac_key_from_user(ukeys->apiakey); in pac_address_keys_from_user()
978 keys->apib = pac_key_from_user(ukeys->apibkey); in pac_address_keys_from_user()
979 keys->apda = pac_key_from_user(ukeys->apdakey); in pac_address_keys_from_user()
980 keys->apdb = pac_key_from_user(ukeys->apdbkey); in pac_address_keys_from_user()
987 struct ptrauth_keys_user *keys = &target->thread.keys_user; in pac_address_keys_get()
991 return -EINVAL; in pac_address_keys_get()
1003 struct ptrauth_keys_user *keys = &target->thread.keys_user; in pac_address_keys_set()
1008 return -EINVAL; in pac_address_keys_set()
1012 &user_keys, 0, -1); in pac_address_keys_set()
1023 ukeys->apgakey = pac_key_to_user(&keys->apga); in pac_generic_keys_to_user()
1029 keys->apga = pac_key_from_user(ukeys->apgakey); in pac_generic_keys_from_user()
1036 struct ptrauth_keys_user *keys = &target->thread.keys_user; in pac_generic_keys_get()
1040 return -EINVAL; in pac_generic_keys_get()
1052 struct ptrauth_keys_user *keys = &target->thread.keys_user; in pac_generic_keys_set()
1057 return -EINVAL; in pac_generic_keys_set()
1061 &user_keys, 0, -1); in pac_generic_keys_set()
1092 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); in tagged_addr_ctrl_set()
1138 * We pretend we have 32-bit registers because the fpsr and
1139 * fpcr are 32-bits wide.
1257 return regs->pc; in compat_get_user_reg()
1259 return pstate_to_compat_psr(regs->pstate); in compat_get_user_reg()
1261 return regs->orig_x0; in compat_get_user_reg()
1263 return regs->regs[idx]; in compat_get_user_reg()
1288 num_regs = count / regset->size; in compat_gpr_set()
1291 start = pos / regset->size; in compat_gpr_set()
1293 if (start + num_regs > regset->n) in compat_gpr_set()
1294 return -EIO; in compat_gpr_set()
1308 ret = -EFAULT; in compat_gpr_set()
1335 ret = -EINVAL; in compat_gpr_set()
1348 return -EINVAL; in compat_vfp_get()
1350 uregs = &target->thread.uw.fpsimd_state; in compat_vfp_get()
1359 membuf_write(&to, uregs, VFP_STATE_SIZE - sizeof(compat_ulong_t)); in compat_vfp_get()
1360 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) | in compat_vfp_get()
1361 (uregs->fpcr & VFP_FPSCR_CTRL_MASK); in compat_vfp_get()
1375 return -EINVAL; in compat_vfp_set()
1377 uregs = &target->thread.uw.fpsimd_state; in compat_vfp_set()
1379 vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t); in compat_vfp_set()
1387 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK; in compat_vfp_set()
1388 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK; in compat_vfp_set()
1400 return membuf_store(&to, (compat_ulong_t)target->thread.uw.tp_value); in compat_tls_get()
1409 compat_ulong_t tls = target->thread.uw.tp_value; in compat_tls_set()
1411 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1); in compat_tls_set()
1415 target->thread.uw.tp_value = tls; in compat_tls_set()
1508 return -EIO; in compat_ptrace_read_user()
1511 tmp = tsk->mm->start_code; in compat_ptrace_read_user()
1513 tmp = tsk->mm->start_data; in compat_ptrace_read_user()
1515 tmp = tsk->mm->end_code; in compat_ptrace_read_user()
1519 return -EIO; in compat_ptrace_read_user()
1533 return -EIO; in compat_ptrace_write_user()
1553 return -EINVAL; in compat_ptrace_write_user()
1568 static int compat_ptrace_hbp_num_to_idx(compat_long_t num) in compat_ptrace_hbp_num_to_idx() argument
1570 return (abs(num) - 1) >> 1; in compat_ptrace_hbp_num_to_idx()
1597 compat_long_t num, in compat_ptrace_hbp_get() argument
1603 int err, idx = compat_ptrace_hbp_num_to_idx(num); in compat_ptrace_hbp_get()
1605 if (num & 1) { in compat_ptrace_hbp_get()
1618 compat_long_t num, in compat_ptrace_hbp_set() argument
1624 int err, idx = compat_ptrace_hbp_num_to_idx(num); in compat_ptrace_hbp_set()
1626 if (num & 1) { in compat_ptrace_hbp_set()
1637 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num, in compat_ptrace_gethbpregs() argument
1644 if (num < 0) { in compat_ptrace_gethbpregs()
1645 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata); in compat_ptrace_gethbpregs()
1647 } else if (num == 0) { in compat_ptrace_gethbpregs()
1651 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata); in compat_ptrace_gethbpregs()
1660 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num, in compat_ptrace_sethbpregs() argument
1666 if (num == 0) in compat_ptrace_sethbpregs()
1673 if (num < 0) in compat_ptrace_sethbpregs()
1674 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata); in compat_ptrace_sethbpregs()
1676 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata); in compat_ptrace_sethbpregs()
1716 ret = put_user((compat_ulong_t)child->thread.uw.tp_value, in compat_arch_ptrace()
1721 task_pt_regs(child)->syscallno = data; in compat_arch_ptrace()
1765 * Core dumping of 32-bit tasks or compat ptrace requests must use the in task_user_regset_view()
1767 * 32-bit children use an extended user_aarch32_ptrace_view to allow in task_user_regset_view()
1808 * - Any writes by the tracer to this register during the stop are in tracehook_report_syscall()
1811 * - The actual value of the register is not available during the stop, in tracehook_report_syscall()
1814 * - Syscall stops behave differently to seccomp and pseudo-step traps in tracehook_report_syscall()
1818 saved_reg = regs->regs[regno]; in tracehook_report_syscall()
1819 regs->regs[regno] = dir; in tracehook_report_syscall()
1824 regs->regs[regno] = saved_reg; in tracehook_report_syscall()
1827 regs->regs[regno] = saved_reg; in tracehook_report_syscall()
1829 regs->regs[regno] = saved_reg; in tracehook_report_syscall()
1832 * Signal a pseudo-step exception since we are stepping but in tracehook_report_syscall()
1842 unsigned long flags = READ_ONCE(current_thread_info()->flags); in syscall_trace_enter()
1851 if (secure_computing() == -1) in syscall_trace_enter()
1855 trace_sys_enter(regs, regs->syscallno); in syscall_trace_enter()
1857 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1], in syscall_trace_enter()
1858 regs->regs[2], regs->regs[3]); in syscall_trace_enter()
1860 return regs->syscallno; in syscall_trace_enter()
1865 unsigned long flags = READ_ONCE(current_thread_info()->flags); in syscall_trace_exit()
1879 * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a.
1882 * We treat PAN and UAO as RES0 bits, as they are meaningless at EL0, and may
1886 * We also reserve IL for the kernel; SS is handled dynamically.
1896 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS; in valid_compat_regs()
1900 regs->pstate |= PSR_AA32_E_BIT; in valid_compat_regs()
1902 regs->pstate &= ~PSR_AA32_E_BIT; in valid_compat_regs()
1905 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) && in valid_compat_regs()
1906 (regs->pstate & PSR_AA32_A_BIT) == 0 && in valid_compat_regs()
1907 (regs->pstate & PSR_AA32_I_BIT) == 0 && in valid_compat_regs()
1908 (regs->pstate & PSR_AA32_F_BIT) == 0) { in valid_compat_regs()
1913 * Force PSR to a valid 32-bit EL0t, preserving the same bits as in valid_compat_regs()
1916 regs->pstate &= PSR_AA32_N_BIT | PSR_AA32_Z_BIT | in valid_compat_regs()
1921 regs->pstate |= PSR_MODE32_BIT; in valid_compat_regs()
1928 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS; in valid_native_regs()
1930 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) && in valid_native_regs()
1931 (regs->pstate & PSR_D_BIT) == 0 && in valid_native_regs()
1932 (regs->pstate & PSR_A_BIT) == 0 && in valid_native_regs()
1933 (regs->pstate & PSR_I_BIT) == 0 && in valid_native_regs()
1934 (regs->pstate & PSR_F_BIT) == 0) { in valid_native_regs()
1938 /* Force PSR to a valid 64-bit EL0t */ in valid_native_regs()
1939 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT; in valid_native_regs()
1950 /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */ in valid_user_regs()