Lines Matching +full:cortex +full:- +full:a57
1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/arm-smccc.h>
24 if (!is_midr_in_range(midr, &entry->midr_range)) in is_affected_midr_range()
29 for (fix = entry->fixed_revs; fix && fix->revidr_mask; fix++) in is_affected_midr_range()
30 if (midr == fix->midr_rv && (revidr & fix->revidr_mask)) in is_affected_midr_range()
41 return is_midr_in_range_list(read_cpuid_id(), entry->midr_range_list); in is_affected_midr_range_list()
55 return model == entry->midr_range.model; in is_kryo_midr()
102 if (cap->capability == ARM64_WORKAROUND_1542419) in cpu_enable_trap_ctr_access()
219 /* Cavium ThunderX, T88 pass 1.x - 2.1 */
229 /* Cavium ThunderX, T88 pass 1.x - 2.2 */
231 /* Cavium ThunderX, T81 pass 1.0 - 1.2 */
257 /* Cortex-A53 r0p[012]: ARM errata 826319, 827319, 824069 */
261 /* Cortex-A53 r0p[01] : ARM errata 819472 */
270 * - 1188873 affects r0p0 to r2p0
271 * - 1418040 affects r0p0 to r3p1
274 /* Cortex-A76 r0p0 to r3p1 */
276 /* Neoverse-N1 r0p0 to r3p1 */
286 /* Cortex-A53 r0p[01234] */
288 /* Brahma-B53 r0p[0] */
299 /* Cortex-A53 r0p[01234] */
305 /* Brahma-B53 r0p[0] */
316 /* Cortex A76 r0p0 to r2p0 */
324 /* Cortex A55 r0p0 to r2p0 */
335 /* Cortex-A76 r0p0 - r3p1 */
354 /* Cortex-A57 r0p0 - r1p2 */
364 /* Cortex-A57 r0p0 - r1p2 */
437 /* Cortex-A73 all versions */
444 .desc = "Spectre-v2",
452 /* Must come after the Spectre-v2 entry */
453 .desc = "Spectre-v3a",
461 .desc = "Spectre-v4",
474 * also need the non-affected CPUs to be able to come