Lines Matching +full:0 +full:x64
26 * instruction on x86/x64.
28 #define HV_REGISTER_HYPERVISOR_VERSION 0x00000100 /*CPUID 0x40000002 */
29 #define HV_REGISTER_FEATURES 0x00000200 /*CPUID 0x40000003 */
30 #define HV_REGISTER_ENLIGHTENMENTS 0x00000201 /*CPUID 0x40000004 */
44 * Synthetic register definitions equivalent to MSRs on x86/x64
46 #define HV_REGISTER_CRASH_P0 0x00000210
47 #define HV_REGISTER_CRASH_P1 0x00000211
48 #define HV_REGISTER_CRASH_P2 0x00000212
49 #define HV_REGISTER_CRASH_P3 0x00000213
50 #define HV_REGISTER_CRASH_P4 0x00000214
51 #define HV_REGISTER_CRASH_CTL 0x00000215
53 #define HV_REGISTER_GUEST_OSID 0x00090002
54 #define HV_REGISTER_VP_INDEX 0x00090003
55 #define HV_REGISTER_TIME_REF_COUNT 0x00090004
56 #define HV_REGISTER_REFERENCE_TSC 0x00090017
58 #define HV_REGISTER_SINT0 0x000A0000
59 #define HV_REGISTER_SCONTROL 0x000A0010
60 #define HV_REGISTER_SIEFP 0x000A0012
61 #define HV_REGISTER_SIMP 0x000A0013
62 #define HV_REGISTER_EOM 0x000A0014
64 #define HV_REGISTER_STIMER0_CONFIG 0x000B0000
65 #define HV_REGISTER_STIMER0_COUNT 0x000B0001