Lines Matching refs:tmp2
417 .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup
418 dcache_line_size \tmp1, \tmp2
419 sub \tmp2, \tmp1, #1
420 bic \start, \start, \tmp2
455 .macro invalidate_icache_by_line start, end, tmp1, tmp2, fixup
456 icache_line_size \tmp1, \tmp2
457 sub \tmp2, \tmp1, #1
458 bic \tmp2, \start, \tmp2
460 ic ivau, \tmp2 // invalidate I line PoU
461 add \tmp2, \tmp2, \tmp1
462 cmp \tmp2, \end
640 .macro tcr_clear_errata_bits, tcr, tmp1, tmp2
644 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001_MASK
645 and \tmp1, \tmp1, \tmp2
646 mov_q \tmp2, MIDR_FUJITSU_ERRATUM_010001
647 cmp \tmp1, \tmp2
650 mov_q \tmp2, TCR_CLEAR_FUJITSU_ERRATUM_010001
651 bic \tcr, \tcr, \tmp2
763 .macro cond_yield, lbl:req, tmp:req, tmp2:req
777 get_this_cpu_offset \tmp2
778 ldr w\tmp, [\tmp, \tmp2]