Lines Matching +full:spi +full:- +full:num +full:- +full:cs

1 // SPDX-License-Identifier: GPL-2.0+
3  * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5  * (C) Copyright 2015 - 2019, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
17 	model = "ZynqMP zc1751-xm016-dc2 RevA";
18 	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
34 		stdout-path = "serial0:115200n8";
85 	phy-handle = <&phy0>;
86 	phy-mode = "rgmii-id";
87 	phy0: ethernet-phy@5 {
89 		ti,rx-internal-delay = <0x8>;
90 		ti,tx-internal-delay = <0xa>;
91 		ti,fifo-depth = <0x1>;
92 		ti,dp83867-rxctrl-strap-quirk;
102 	clock-frequency = <400000>;
107 		gpio-controller;
108 		#gpio-cells = <2>;
124 	num-cs = <1>;
127 		#address-cells = <1>;
128 		#size-cells = <1>;
129 		compatible = "sst,sst25wf080", "jedec,spi-nor";
130 		spi-max-frequency = <50000000>;
142 	num-cs = <1>;
145 		#address-cells = <1>;
146 		#size-cells = <1>;
148 		spi-max-frequency = <20000000>;