Lines Matching +full:num +full:- +full:cs
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * (C) Copyright 2018 - 2020, Toshiba Corporation.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 /memreserve/ 0x81000000 0x00300000; /* cpu-release-addr */
17 #address-cells = <2>;
18 #size-cells = <2>;
21 #address-cells = <1>;
22 #size-cells = <0>;
24 cpu-map {
57 compatible = "arm,cortex-a53";
59 enable-method = "spin-table";
60 cpu-release-addr = <0x0 0x81100000>;
65 compatible = "arm,cortex-a53";
67 enable-method = "spin-table";
68 cpu-release-addr = <0x0 0x81100000>;
73 compatible = "arm,cortex-a53";
75 enable-method = "spin-table";
76 cpu-release-addr = <0x0 0x81100000>;
81 compatible = "arm,cortex-a53";
83 enable-method = "spin-table";
84 cpu-release-addr = <0x0 0x81100000>;
89 compatible = "arm,cortex-a53";
91 enable-method = "spin-table";
92 cpu-release-addr = <0x0 0x81100000>;
97 compatible = "arm,cortex-a53";
99 enable-method = "spin-table";
100 cpu-release-addr = <0x0 0x81100000>;
105 compatible = "arm,cortex-a53";
107 enable-method = "spin-table";
108 cpu-release-addr = <0x0 0x81100000>;
113 compatible = "arm,cortex-a53";
115 enable-method = "spin-table";
116 cpu-release-addr = <0x0 0x81100000>;
122 compatible = "arm,armv8-timer";
123 interrupt-parent = <&gic>;
131 uart_clk: uart-clk {
132 compatible = "fixed-clock";
133 clock-frequency = <150000000>;
134 #clock-cells = <0>;
138 compatible = "fixed-clock";
139 clock-frequency = <125000000>;
140 #clock-cells = <0>;
141 clock-output-names = "clk125mhz";
145 compatible = "fixed-clock";
146 clock-frequency = <300000000>;
147 #clock-cells = <0>;
148 clock-output-names = "clk300mhz";
151 wdt_clk: wdt-clk {
152 compatible = "fixed-clock";
153 clock-frequency = <150000000>;
154 #clock-cells = <0>;
158 #address-cells = <2>;
159 #size-cells = <2>;
160 compatible = "simple-bus";
161 interrupt-parent = <&gic>;
164 gic: interrupt-controller@24001000 {
165 compatible = "arm,gic-400";
166 interrupt-controller;
167 #interrupt-cells = <3>;
176 compatible = "toshiba,tmpv7708-pinctrl";
181 compatible = "toshiba,gpio-tmpv7708";
183 #gpio-cells = <0x2>;
184 gpio-ranges = <&pmux 0 0 32>;
185 gpio-controller;
186 interrupt-controller;
187 #interrupt-cells = <2>;
188 interrupt-parent = <&gic>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&uart0_pins>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&uart1_pins>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&uart2_pins>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&uart3_pins>;
228 compatible = "snps,designware-i2c";
231 pinctrl-names = "default";
232 pinctrl-0 = <&i2c0_pins>;
233 clock-frequency = <400000>;
234 #address-cells = <1>;
235 #size-cells = <0>;
240 compatible = "snps,designware-i2c";
243 pinctrl-names = "default";
244 pinctrl-0 = <&i2c1_pins>;
245 clock-frequency = <400000>;
246 #address-cells = <1>;
247 #size-cells = <0>;
252 compatible = "snps,designware-i2c";
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c2_pins>;
257 clock-frequency = <400000>;
258 #address-cells = <1>;
259 #size-cells = <0>;
264 compatible = "snps,designware-i2c";
267 pinctrl-names = "default";
268 pinctrl-0 = <&i2c3_pins>;
269 clock-frequency = <400000>;
270 #address-cells = <1>;
271 #size-cells = <0>;
276 compatible = "snps,designware-i2c";
279 pinctrl-names = "default";
280 pinctrl-0 = <&i2c4_pins>;
281 clock-frequency = <400000>;
282 #address-cells = <1>;
283 #size-cells = <0>;
288 compatible = "snps,designware-i2c";
291 pinctrl-names = "default";
292 pinctrl-0 = <&i2c5_pins>;
293 clock-frequency = <400000>;
294 #address-cells = <1>;
295 #size-cells = <0>;
300 compatible = "snps,designware-i2c";
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c6_pins>;
305 clock-frequency = <400000>;
306 #address-cells = <1>;
307 #size-cells = <0>;
312 compatible = "snps,designware-i2c";
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c7_pins>;
317 clock-frequency = <400000>;
318 #address-cells = <1>;
319 #size-cells = <0>;
324 compatible = "snps,designware-i2c";
327 pinctrl-names = "default";
328 pinctrl-0 = <&i2c8_pins>;
329 clock-frequency = <400000>;
330 #address-cells = <1>;
331 #size-cells = <0>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&spi0_pins>;
341 num-cs = <1>;
342 #address-cells = <1>;
343 #size-cells = <0>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&spi1_pins>;
353 num-cs = <1>;
354 #address-cells = <1>;
355 #size-cells = <0>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&spi2_pins>;
365 num-cs = <1>;
366 #address-cells = <1>;
367 #size-cells = <0>;
375 pinctrl-names = "default";
376 pinctrl-0 = <&spi3_pins>;
377 num-cs = <1>;
378 #address-cells = <1>;
379 #size-cells = <0>;
387 pinctrl-names = "default";
388 pinctrl-0 = <&spi4_pins>;
389 num-cs = <1>;
390 #address-cells = <1>;
391 #size-cells = <0>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&spi5_pins>;
401 num-cs = <1>;
402 #address-cells = <1>;
403 #size-cells = <0>;
411 pinctrl-names = "default";
412 pinctrl-0 = <&spi6_pins>;
413 num-cs = <1>;
414 #address-cells = <1>;
415 #size-cells = <0>;
420 compatible = "toshiba,visconti-dwmac", "snps,dwmac-4.20a";
423 interrupt-names = "macirq";
431 compatible = "toshiba,visconti-wdt";
437 compatible = "toshiba,visconti-pwm";
439 pinctrl-names = "default";
440 pinctrl-0 = <&pwm_mux>;
441 #pwm-cells = <2>;