Lines Matching +full:mbox +full:- +full:num +full:- +full:users
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
31 compatible = "arm,gic-v3";
32 #address-cells = <2>;
33 #size-cells = <2>;
35 #interrupt-cells = <3>;
36 interrupt-controller;
45 gic_its: msi-controller@1820000 {
46 compatible = "arm,gic-v3-its";
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
49 msi-controller;
50 #msi-cells = <1>;
55 compatible = "ti,phy-am654-serdes";
57 reg-names = "serdes";
58 #phy-cells = <2>;
59 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
61 clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
62 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
63 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
64 ti,serdes-clk = <&serdes0_clk>;
65 #clock-cells = <1>;
66 mux-controls = <&serdes_mux 0>;
70 compatible = "ti,phy-am654-serdes";
72 reg-names = "serdes";
73 #phy-cells = <2>;
74 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
76 clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
77 assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
78 assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>;
79 ti,serdes-clk = <&serdes1_clk>;
80 #clock-cells = <1>;
81 mux-controls = <&serdes_mux 1>;
85 compatible = "ti,am654-uart";
88 clock-frequency = <48000000>;
89 current-speed = <115200>;
90 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
94 compatible = "ti,am654-uart";
97 clock-frequency = <48000000>;
98 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
102 compatible = "ti,am654-uart";
105 clock-frequency = <48000000>;
106 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
110 compatible = "ti,am654-sa2ul";
112 power-domains = <&k3_pds 136 TI_SCI_PD_EXCLUSIVE>;
113 #address-cells = <2>;
114 #size-cells = <2>;
119 dma-names = "tx", "rx1", "rx2";
120 dma-coherent;
123 compatible = "inside-secure,safexcel-eip76";
131 compatible = "pinctrl-single";
133 #pinctrl-cells = <1>;
134 pinctrl-single,register-width = <32>;
135 pinctrl-single,function-mask = <0xffffffff>;
139 compatible = "pinctrl-single";
141 #pinctrl-cells = <1>;
142 pinctrl-single,register-width = <32>;
143 pinctrl-single,function-mask = <0xffffffff>;
147 compatible = "ti,am654-i2c", "ti,omap4-i2c";
150 #address-cells = <1>;
151 #size-cells = <0>;
152 clock-names = "fck";
154 power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
158 compatible = "ti,am654-i2c", "ti,omap4-i2c";
161 #address-cells = <1>;
162 #size-cells = <0>;
163 clock-names = "fck";
165 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
169 compatible = "ti,am654-i2c", "ti,omap4-i2c";
172 #address-cells = <1>;
173 #size-cells = <0>;
174 clock-names = "fck";
176 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
180 compatible = "ti,am654-i2c", "ti,omap4-i2c";
183 #address-cells = <1>;
184 #size-cells = <0>;
185 clock-names = "fck";
187 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
191 compatible = "ti,am654-ecap", "ti,am3352-ecap";
192 #pwm-cells = <3>;
194 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
196 clock-names = "fck";
200 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
204 power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
205 #address-cells = <1>;
206 #size-cells = <0>;
208 dma-names = "tx0", "rx0";
212 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
216 power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 assigned-clocks = <&k3_clks 137 1>;
220 assigned-clock-rates = <48000000>;
224 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
228 power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
229 #address-cells = <1>;
230 #size-cells = <0>;
234 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
238 power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
239 #address-cells = <1>;
240 #size-cells = <0>;
244 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
248 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
249 #address-cells = <1>;
250 #size-cells = <0>;
254 compatible = "ti,am654-sdhci-5.1";
256 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
258 clock-names = "clk_ahb", "clk_xin";
260 mmc-ddr-1_8v;
261 mmc-hs200-1_8v;
262 ti,otap-del-sel-legacy = <0x0>;
263 ti,otap-del-sel-mmc-hs = <0x0>;
264 ti,otap-del-sel-sd-hs = <0x0>;
265 ti,otap-del-sel-sdr12 = <0x0>;
266 ti,otap-del-sel-sdr25 = <0x0>;
267 ti,otap-del-sel-sdr50 = <0x8>;
268 ti,otap-del-sel-sdr104 = <0x7>;
269 ti,otap-del-sel-ddr50 = <0x5>;
270 ti,otap-del-sel-ddr52 = <0x5>;
271 ti,otap-del-sel-hs200 = <0x5>;
272 ti,otap-del-sel-hs400 = <0x0>;
273 ti,trm-icp = <0x8>;
274 dma-coherent;
278 compatible = "ti,am654-sdhci-5.1";
280 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
282 clock-names = "clk_ahb", "clk_xin";
284 ti,otap-del-sel-legacy = <0x0>;
285 ti,otap-del-sel-mmc-hs = <0x0>;
286 ti,otap-del-sel-sd-hs = <0x0>;
287 ti,otap-del-sel-sdr12 = <0x0>;
288 ti,otap-del-sel-sdr25 = <0x0>;
289 ti,otap-del-sel-sdr50 = <0x8>;
290 ti,otap-del-sel-sdr104 = <0x7>;
291 ti,otap-del-sel-ddr50 = <0x4>;
292 ti,otap-del-sel-ddr52 = <0x4>;
293 ti,otap-del-sel-hs200 = <0x7>;
294 ti,clkbuf-sel = <0x7>;
295 ti,otap-del-sel = <0x2>;
296 ti,trm-icp = <0x8>;
297 dma-coherent;
300 scm_conf: scm-conf@100000 {
301 compatible = "syscon", "simple-mfd";
303 #address-cells = <1>;
304 #size-cells = <1>;
307 pcie0_mode: pcie-mode@4060 {
312 pcie1_mode: pcie-mode@4070 {
317 pcie_devid: pcie-devid@210 {
332 serdes_mux: mux-controller {
333 compatible = "mmio-mux";
334 #mux-control-cells = <1>;
335 mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */
339 dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
345 compatible = "ti,am654-ehrpwm-tbclk", "syscon";
347 #clock-cells = <1>;
352 compatible = "ti,am654-dwc3";
354 #address-cells = <1>;
355 #size-cells = <1>;
358 dma-coherent;
359 power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
361 assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
362 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
371 interrupt-names = "peripheral",
374 maximum-speed = "high-speed";
377 phy-names = "usb2-phy";
383 compatible = "ti,am654-usb2", "ti,omap-usb2";
385 syscon-phy-power = <&scm_conf 0x4000>;
387 clock-names = "wkupclk", "refclk";
388 #phy-cells = <0>;
392 compatible = "ti,am654-dwc3";
394 #address-cells = <1>;
395 #size-cells = <1>;
398 dma-coherent;
399 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
401 assigned-clocks = <&k3_clks 152 2>;
402 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
410 interrupt-names = "peripheral",
413 maximum-speed = "high-speed";
416 phy-names = "usb2-phy";
421 compatible = "ti,am654-usb2", "ti,omap-usb2";
423 syscon-phy-power = <&scm_conf 0x4020>;
425 clock-names = "wkupclk", "refclk";
426 #phy-cells = <0>;
429 intr_main_gpio: interrupt-controller@a00000 {
430 compatible = "ti,sci-intr";
432 ti,intr-trigger-type = <1>;
433 interrupt-controller;
434 interrupt-parent = <&gic500>;
435 #interrupt-cells = <1>;
437 ti,sci-dev-id = <100>;
438 ti,interrupt-ranges = <0 392 32>;
442 compatible = "simple-mfd";
443 #address-cells = <2>;
444 #size-cells = <2>;
446 dma-coherent;
447 dma-ranges;
449 ti,sci-dev-id = <118>;
451 intr_main_navss: interrupt-controller@310e0000 {
452 compatible = "ti,sci-intr";
454 ti,intr-trigger-type = <4>;
455 interrupt-controller;
456 interrupt-parent = <&gic500>;
457 #interrupt-cells = <1>;
459 ti,sci-dev-id = <182>;
460 ti,interrupt-ranges = <0 64 64>,
464 inta_main_udmass: interrupt-controller@33d00000 {
465 compatible = "ti,sci-inta";
467 interrupt-controller;
468 interrupt-parent = <&intr_main_navss>;
469 msi-controller;
470 #interrupt-cells = <0>;
472 ti,sci-dev-id = <179>;
473 ti,interrupt-ranges = <0 0 256>;
477 compatible = "ti,am654-secure-proxy";
478 #mbox-cells = <1>;
479 reg-names = "target_data", "rt", "scfg";
483 interrupt-names = "rx_011";
488 compatible = "ti,am654-hwspinlock";
490 #hwlock-cells = <1>;
494 compatible = "ti,am654-mailbox";
496 #mbox-cells = <1>;
497 ti,mbox-num-users = <4>;
498 ti,mbox-num-fifos = <16>;
499 interrupt-parent = <&intr_main_navss>;
503 compatible = "ti,am654-mailbox";
505 #mbox-cells = <1>;
506 ti,mbox-num-users = <4>;
507 ti,mbox-num-fifos = <16>;
508 interrupt-parent = <&intr_main_navss>;
512 compatible = "ti,am654-mailbox";
514 #mbox-cells = <1>;
515 ti,mbox-num-users = <4>;
516 ti,mbox-num-fifos = <16>;
517 interrupt-parent = <&intr_main_navss>;
521 compatible = "ti,am654-mailbox";
523 #mbox-cells = <1>;
524 ti,mbox-num-users = <4>;
525 ti,mbox-num-fifos = <16>;
526 interrupt-parent = <&intr_main_navss>;
530 compatible = "ti,am654-mailbox";
532 #mbox-cells = <1>;
533 ti,mbox-num-users = <4>;
534 ti,mbox-num-fifos = <16>;
535 interrupt-parent = <&intr_main_navss>;
539 compatible = "ti,am654-mailbox";
541 #mbox-cells = <1>;
542 ti,mbox-num-users = <4>;
543 ti,mbox-num-fifos = <16>;
544 interrupt-parent = <&intr_main_navss>;
548 compatible = "ti,am654-mailbox";
550 #mbox-cells = <1>;
551 ti,mbox-num-users = <4>;
552 ti,mbox-num-fifos = <16>;
553 interrupt-parent = <&intr_main_navss>;
557 compatible = "ti,am654-mailbox";
559 #mbox-cells = <1>;
560 ti,mbox-num-users = <4>;
561 ti,mbox-num-fifos = <16>;
562 interrupt-parent = <&intr_main_navss>;
566 compatible = "ti,am654-mailbox";
568 #mbox-cells = <1>;
569 ti,mbox-num-users = <4>;
570 ti,mbox-num-fifos = <16>;
571 interrupt-parent = <&intr_main_navss>;
575 compatible = "ti,am654-mailbox";
577 #mbox-cells = <1>;
578 ti,mbox-num-users = <4>;
579 ti,mbox-num-fifos = <16>;
580 interrupt-parent = <&intr_main_navss>;
584 compatible = "ti,am654-mailbox";
586 #mbox-cells = <1>;
587 ti,mbox-num-users = <4>;
588 ti,mbox-num-fifos = <16>;
589 interrupt-parent = <&intr_main_navss>;
593 compatible = "ti,am654-mailbox";
595 #mbox-cells = <1>;
596 ti,mbox-num-users = <4>;
597 ti,mbox-num-fifos = <16>;
598 interrupt-parent = <&intr_main_navss>;
602 compatible = "ti,am654-navss-ringacc";
607 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
608 ti,num-rings = <818>;
609 ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
611 ti,sci-dev-id = <187>;
612 msi-parent = <&inta_main_udmass>;
615 main_udmap: dma-controller@31150000 {
616 compatible = "ti,am654-navss-main-udmap";
620 reg-names = "gcfg", "rchanrt", "tchanrt";
621 msi-parent = <&inta_main_udmass>;
622 #dma-cells = <1>;
625 ti,sci-dev-id = <188>;
628 ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
630 ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
632 ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
636 compatible = "ti,am65-cpts";
638 reg-names = "cpts";
640 clock-names = "cpts";
641 interrupts-extended = <&intr_main_navss 391>;
642 interrupt-names = "cpts";
643 ti,cpts-periodic-outputs = <6>;
644 ti,cpts-ext-ts-inputs = <8>;
646 main_cpts_mux: refclk-mux {
647 #clock-cells = <0>;
652 assigned-clocks = <&main_cpts_mux>;
653 assigned-clock-parents = <&k3_clks 118 5>;
659 compatible = "ti,am654-gpio", "ti,keystone-gpio";
661 gpio-controller;
662 #gpio-cells = <2>;
663 interrupt-parent = <&intr_main_gpio>;
665 interrupt-controller;
666 #interrupt-cells = <2>;
668 ti,davinci-gpio-unbanked = <0>;
670 clock-names = "gpio";
674 compatible = "ti,am654-gpio", "ti,keystone-gpio";
676 gpio-controller;
677 #gpio-cells = <2>;
678 interrupt-parent = <&intr_main_gpio>;
680 interrupt-controller;
681 #interrupt-cells = <2>;
683 ti,davinci-gpio-unbanked = <0>;
685 clock-names = "gpio";
689 compatible = "ti,am654-pcie-rc";
691 reg-names = "app", "dbics", "config", "atu";
692 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
693 #address-cells = <3>;
694 #size-cells = <2>;
697 ti,syscon-pcie-id = <&pcie_devid>;
698 ti,syscon-pcie-mode = <&pcie0_mode>;
699 bus-range = <0x0 0xff>;
700 num-viewport = <16>;
701 max-link-speed = <2>;
702 dma-coherent;
704 msi-map = <0x0 &gic_its 0x0 0x10000>;
708 pcie0_ep: pcie-ep@5500000 {
709 compatible = "ti,am654-pcie-ep";
711 reg-names = "app", "dbics", "addr_space", "atu";
712 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
713 ti,syscon-pcie-mode = <&pcie0_mode>;
714 num-ib-windows = <16>;
715 num-ob-windows = <16>;
716 max-link-speed = <2>;
717 dma-coherent;
722 compatible = "ti,am654-pcie-rc";
724 reg-names = "app", "dbics", "config", "atu";
725 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
726 #address-cells = <3>;
727 #size-cells = <2>;
730 ti,syscon-pcie-id = <&pcie_devid>;
731 ti,syscon-pcie-mode = <&pcie1_mode>;
732 bus-range = <0x0 0xff>;
733 num-viewport = <16>;
734 max-link-speed = <2>;
735 dma-coherent;
737 msi-map = <0x0 &gic_its 0x10000 0x10000>;
741 pcie1_ep: pcie-ep@5600000 {
742 compatible = "ti,am654-pcie-ep";
744 reg-names = "app", "dbics", "addr_space", "atu";
745 power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
746 ti,syscon-pcie-mode = <&pcie1_mode>;
747 num-ib-windows = <16>;
748 num-ob-windows = <16>;
749 max-link-speed = <2>;
750 dma-coherent;
755 compatible = "ti,am33xx-mcasp-audio";
758 reg-names = "mpu","dat";
761 interrupt-names = "tx", "rx";
764 dma-names = "tx", "rx";
767 clock-names = "fck";
768 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
772 compatible = "ti,am33xx-mcasp-audio";
775 reg-names = "mpu","dat";
778 interrupt-names = "tx", "rx";
781 dma-names = "tx", "rx";
784 clock-names = "fck";
785 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
789 compatible = "ti,am33xx-mcasp-audio";
792 reg-names = "mpu","dat";
795 interrupt-names = "tx", "rx";
798 dma-names = "tx", "rx";
801 clock-names = "fck";
802 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
806 compatible = "ti,am654-cal";
809 reg-names = "cal_top",
812 ti,camerrx-control = <&scm_conf 0x40c0>;
813 clock-names = "fck";
815 power-domains = <&k3_pds 2 TI_SCI_PD_EXCLUSIVE>;
818 #address-cells = <1>;
819 #size-cells = <0>;
828 compatible = "ti,am65x-dss";
836 reg-names = "common", "vidl1", "vid",
839 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
841 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
846 clock-names = "fck", "vp1", "vp2";
850 * DIV1. See "Figure 12-3365. DSS Integration"
853 assigned-clocks = <&k3_clks 67 2>;
854 assigned-clock-parents = <&k3_clks 67 5>;
858 dma-coherent;
861 #address-cells = <1>;
862 #size-cells = <0>;
867 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
868 #pwm-cells = <3>;
870 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
872 clock-names = "tbclk", "fck";
876 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
877 #pwm-cells = <3>;
879 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
881 clock-names = "tbclk", "fck";
885 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
886 #pwm-cells = <3>;
888 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
890 clock-names = "tbclk", "fck";
894 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
895 #pwm-cells = <3>;
897 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
899 clock-names = "tbclk", "fck";
903 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
904 #pwm-cells = <3>;
906 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
908 clock-names = "tbclk", "fck";
912 compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
913 #pwm-cells = <3>;
915 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
917 clock-names = "tbclk", "fck";
921 compatible = "ti,am654-icssg";
923 power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
924 #address-cells = <1>;
925 #size-cells = <1>;
932 reg-names = "dram0", "dram1",
937 compatible = "ti,pruss-cfg", "syscon";
939 #address-cells = <1>;
940 #size-cells = <1>;
944 #address-cells = <1>;
945 #size-cells = <0>;
947 icssg0_coreclk_mux: coreclk-mux@3c {
949 #clock-cells = <0>;
952 assigned-clocks = <&icssg0_coreclk_mux>;
953 assigned-clock-parents = <&k3_clks 62 3>;
956 icssg0_iepclk_mux: iepclk-mux@30 {
958 #clock-cells = <0>;
961 assigned-clocks = <&icssg0_iepclk_mux>;
962 assigned-clock-parents = <&icssg0_coreclk_mux>;
967 icssg0_mii_rt: mii-rt@32000 {
968 compatible = "ti,pruss-mii", "syscon";
972 icssg0_mii_g_rt: mii-g-rt@33000 {
973 compatible = "ti,pruss-mii-g", "syscon";
977 icssg0_intc: interrupt-controller@20000 {
978 compatible = "ti,icssg-intc";
980 interrupt-controller;
981 #interrupt-cells = <3>;
990 interrupt-names = "host_intr0", "host_intr1",
997 compatible = "ti,am654-pru";
1001 reg-names = "iram", "control", "debug";
1002 firmware-name = "am65x-pru0_0-fw";
1006 compatible = "ti,am654-rtu";
1010 reg-names = "iram", "control", "debug";
1011 firmware-name = "am65x-rtu0_0-fw";
1015 compatible = "ti,am654-tx-pru";
1019 reg-names = "iram", "control", "debug";
1020 firmware-name = "am65x-txpru0_0-fw";
1024 compatible = "ti,am654-pru";
1028 reg-names = "iram", "control", "debug";
1029 firmware-name = "am65x-pru0_1-fw";
1033 compatible = "ti,am654-rtu";
1037 reg-names = "iram", "control", "debug";
1038 firmware-name = "am65x-rtu0_1-fw";
1042 compatible = "ti,am654-tx-pru";
1046 reg-names = "iram", "control", "debug";
1047 firmware-name = "am65x-txpru0_1-fw";
1054 clock-names = "fck";
1055 #address-cells = <1>;
1056 #size-cells = <0>;
1062 compatible = "ti,am654-icssg";
1064 power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
1065 #address-cells = <1>;
1066 #size-cells = <1>;
1073 reg-names = "dram0", "dram1",
1078 compatible = "ti,pruss-cfg", "syscon";
1080 #address-cells = <1>;
1081 #size-cells = <1>;
1085 #address-cells = <1>;
1086 #size-cells = <0>;
1088 icssg1_coreclk_mux: coreclk-mux@3c {
1090 #clock-cells = <0>;
1093 assigned-clocks = <&icssg1_coreclk_mux>;
1094 assigned-clock-parents = <&k3_clks 63 3>;
1097 icssg1_iepclk_mux: iepclk-mux@30 {
1099 #clock-cells = <0>;
1102 assigned-clocks = <&icssg1_iepclk_mux>;
1103 assigned-clock-parents = <&icssg1_coreclk_mux>;
1108 icssg1_mii_rt: mii-rt@32000 {
1109 compatible = "ti,pruss-mii", "syscon";
1113 icssg1_mii_g_rt: mii-g-rt@33000 {
1114 compatible = "ti,pruss-mii-g", "syscon";
1118 icssg1_intc: interrupt-controller@20000 {
1119 compatible = "ti,icssg-intc";
1121 interrupt-controller;
1122 #interrupt-cells = <3>;
1131 interrupt-names = "host_intr0", "host_intr1",
1138 compatible = "ti,am654-pru";
1142 reg-names = "iram", "control", "debug";
1143 firmware-name = "am65x-pru1_0-fw";
1147 compatible = "ti,am654-rtu";
1151 reg-names = "iram", "control", "debug";
1152 firmware-name = "am65x-rtu1_0-fw";
1156 compatible = "ti,am654-tx-pru";
1160 reg-names = "iram", "control", "debug";
1161 firmware-name = "am65x-txpru1_0-fw";
1165 compatible = "ti,am654-pru";
1169 reg-names = "iram", "control", "debug";
1170 firmware-name = "am65x-pru1_1-fw";
1174 compatible = "ti,am654-rtu";
1178 reg-names = "iram", "control", "debug";
1179 firmware-name = "am65x-rtu1_1-fw";
1183 compatible = "ti,am654-tx-pru";
1187 reg-names = "iram", "control", "debug";
1188 firmware-name = "am65x-txpru1_1-fw";
1195 clock-names = "fck";
1196 #address-cells = <1>;
1197 #size-cells = <0>;
1203 compatible = "ti,am654-icssg";
1205 power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
1206 #address-cells = <1>;
1207 #size-cells = <1>;
1214 reg-names = "dram0", "dram1",
1219 compatible = "ti,pruss-cfg", "syscon";
1221 #address-cells = <1>;
1222 #size-cells = <1>;
1226 #address-cells = <1>;
1227 #size-cells = <0>;
1229 icssg2_coreclk_mux: coreclk-mux@3c {
1231 #clock-cells = <0>;
1234 assigned-clocks = <&icssg2_coreclk_mux>;
1235 assigned-clock-parents = <&k3_clks 64 3>;
1238 icssg2_iepclk_mux: iepclk-mux@30 {
1240 #clock-cells = <0>;
1243 assigned-clocks = <&icssg2_iepclk_mux>;
1244 assigned-clock-parents = <&icssg2_coreclk_mux>;
1249 icssg2_mii_rt: mii-rt@32000 {
1250 compatible = "ti,pruss-mii", "syscon";
1254 icssg2_mii_g_rt: mii-g-rt@33000 {
1255 compatible = "ti,pruss-mii-g", "syscon";
1259 icssg2_intc: interrupt-controller@20000 {
1260 compatible = "ti,icssg-intc";
1262 interrupt-controller;
1263 #interrupt-cells = <3>;
1272 interrupt-names = "host_intr0", "host_intr1",
1279 compatible = "ti,am654-pru";
1283 reg-names = "iram", "control", "debug";
1284 firmware-name = "am65x-pru2_0-fw";
1288 compatible = "ti,am654-rtu";
1292 reg-names = "iram", "control", "debug";
1293 firmware-name = "am65x-rtu2_0-fw";
1297 compatible = "ti,am654-tx-pru";
1301 reg-names = "iram", "control", "debug";
1302 firmware-name = "am65x-txpru2_0-fw";
1306 compatible = "ti,am654-pru";
1310 reg-names = "iram", "control", "debug";
1311 firmware-name = "am65x-pru2_1-fw";
1315 compatible = "ti,am654-rtu";
1319 reg-names = "iram", "control", "debug";
1320 firmware-name = "am65x-rtu2_1-fw";
1324 compatible = "ti,am654-tx-pru";
1328 reg-names = "iram", "control", "debug";
1329 firmware-name = "am65x-txpru2_1-fw";
1336 clock-names = "fck";
1337 #address-cells = <1>;
1338 #size-cells = <0>;