Lines Matching +full:am654 +full:- +full:secure +full:- +full:proxy
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 tfa-sram@1c0000 {
31 dmsc-sram@1e0000 {
35 sproxy-sram@1fc000 {
41 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
43 #address-cells = <1>;
44 #size-cells = <1>;
47 serdes_ln_ctrl: mux-controller {
48 compatible = "mmio-mux";
49 #mux-control-cells = <1>;
50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
54 gic500: interrupt-controller@1800000 {
55 compatible = "arm,gic-v3";
56 #address-cells = <2>;
57 #size-cells = <2>;
59 #interrupt-cells = <3>;
60 interrupt-controller;
69 gic_its: msi-controller@1820000 {
70 compatible = "arm,gic-v3-its";
72 socionext,synquacer-pre-its = <0x1000000 0x400000>;
73 msi-controller;
74 #msi-cells = <1>;
79 compatible = "simple-mfd";
80 #address-cells = <2>;
81 #size-cells = <2>;
82 dma-ranges;
85 ti,sci-dev-id = <25>;
88 compatible = "ti,am654-secure-proxy";
89 #mbox-cells = <1>;
90 reg-names = "target_data", "rt", "scfg";
94 interrupt-names = "rx_012";
98 inta_main_dmss: interrupt-controller@48000000 {
99 compatible = "ti,sci-inta";
101 #interrupt-cells = <0>;
102 interrupt-controller;
103 interrupt-parent = <&gic500>;
104 msi-controller;
106 ti,sci-dev-id = <28>;
107 ti,interrupt-ranges = <4 68 36>;
108 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
111 main_bcdma: dma-controller@485c0100 {
112 compatible = "ti,am64-dmss-bcdma";
118 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
119 msi-parent = <&inta_main_dmss>;
120 #dma-cells = <3>;
123 ti,sci-dev-id = <26>;
124 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
125 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
126 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
129 main_pktdma: dma-controller@485c0000 {
130 compatible = "ti,am64-dmss-pktdma";
135 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
136 msi-parent = <&inta_main_dmss>;
137 #dma-cells = <2>;
140 ti,sci-dev-id = <30>;
141 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
147 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
153 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
161 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
170 dmsc: system-controller@44043000 {
171 compatible = "ti,k2g-sci";
172 ti,host-id = <12>;
173 mbox-names = "rx", "tx";
176 reg-names = "debug_messages";
179 k3_pds: power-controller {
180 compatible = "ti,sci-pm-domain";
181 #power-domain-cells = <2>;
184 k3_clks: clock-controller {
185 compatible = "ti,k2g-sci-clk";
186 #clock-cells = <2>;
189 k3_reset: reset-controller {
190 compatible = "ti,sci-reset";
191 #reset-cells = <2>;
196 compatible = "pinctrl-single";
198 #pinctrl-cells = <1>;
199 pinctrl-single,register-width = <32>;
200 pinctrl-single,function-mask = <0xffffffff>;
204 compatible = "syscon", "simple-mfd";
206 #address-cells = <1>;
207 #size-cells = <1>;
211 compatible = "ti,am654-chipid";
216 compatible = "ti,am654-phy-gmii-sel";
218 #phy-cells = <1>;
222 compatible = "ti,am64-epwm-tbclk", "syscon";
224 #clock-cells = <1>;
229 compatible = "ti,am64-uart", "ti,am654-uart";
232 clock-frequency = <48000000>;
233 current-speed = <115200>;
234 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
236 clock-names = "fclk";
240 compatible = "ti,am64-uart", "ti,am654-uart";
243 clock-frequency = <48000000>;
244 current-speed = <115200>;
245 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
247 clock-names = "fclk";
251 compatible = "ti,am64-uart", "ti,am654-uart";
254 clock-frequency = <48000000>;
255 current-speed = <115200>;
256 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
258 clock-names = "fclk";
262 compatible = "ti,am64-uart", "ti,am654-uart";
265 clock-frequency = <48000000>;
266 current-speed = <115200>;
267 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
269 clock-names = "fclk";
273 compatible = "ti,am64-uart", "ti,am654-uart";
276 clock-frequency = <48000000>;
277 current-speed = <115200>;
278 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
280 clock-names = "fclk";
284 compatible = "ti,am64-uart", "ti,am654-uart";
287 clock-frequency = <48000000>;
288 current-speed = <115200>;
289 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
291 clock-names = "fclk";
295 compatible = "ti,am64-uart", "ti,am654-uart";
298 clock-frequency = <48000000>;
299 current-speed = <115200>;
300 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
302 clock-names = "fclk";
306 compatible = "ti,am64-i2c", "ti,omap4-i2c";
309 #address-cells = <1>;
310 #size-cells = <0>;
311 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
313 clock-names = "fck";
317 compatible = "ti,am64-i2c", "ti,omap4-i2c";
320 #address-cells = <1>;
321 #size-cells = <0>;
322 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
324 clock-names = "fck";
328 compatible = "ti,am64-i2c", "ti,omap4-i2c";
331 #address-cells = <1>;
332 #size-cells = <0>;
333 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
335 clock-names = "fck";
339 compatible = "ti,am64-i2c", "ti,omap4-i2c";
342 #address-cells = <1>;
343 #size-cells = <0>;
344 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
346 clock-names = "fck";
350 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
353 #address-cells = <1>;
354 #size-cells = <0>;
355 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
358 dma-names = "tx0", "rx0";
362 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
365 #address-cells = <1>;
366 #size-cells = <0>;
367 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
372 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
375 #address-cells = <1>;
376 #size-cells = <0>;
377 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
382 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
385 #address-cells = <1>;
386 #size-cells = <0>;
387 power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
392 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
395 #address-cells = <1>;
396 #size-cells = <0>;
397 power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
401 main_gpio_intr: interrupt-controller@a00000 {
402 compatible = "ti,sci-intr";
404 ti,intr-trigger-type = <1>;
405 interrupt-controller;
406 interrupt-parent = <&gic500>;
407 #interrupt-cells = <1>;
409 ti,sci-dev-id = <3>;
410 ti,interrupt-ranges = <0 32 16>;
414 compatible = "ti,am64-gpio", "ti,keystone-gpio";
416 gpio-controller;
417 #gpio-cells = <2>;
418 interrupt-parent = <&main_gpio_intr>;
421 interrupt-controller;
422 #interrupt-cells = <2>;
424 ti,davinci-gpio-unbanked = <0>;
425 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
427 clock-names = "gpio";
431 compatible = "ti,am64-gpio", "ti,keystone-gpio";
433 gpio-controller;
434 #gpio-cells = <2>;
435 interrupt-parent = <&main_gpio_intr>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
441 ti,davinci-gpio-unbanked = <0>;
442 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
444 clock-names = "gpio";
448 compatible = "ti,am64-sdhci-8bit";
451 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
453 clock-names = "clk_ahb", "clk_xin";
454 mmc-ddr-1_8v;
455 mmc-hs200-1_8v;
456 mmc-hs400-1_8v;
457 ti,trm-icp = <0x2>;
458 ti,otap-del-sel-legacy = <0x0>;
459 ti,otap-del-sel-mmc-hs = <0x0>;
460 ti,otap-del-sel-ddr52 = <0x6>;
461 ti,otap-del-sel-hs200 = <0x7>;
462 ti,otap-del-sel-hs400 = <0x4>;
466 compatible = "ti,am64-sdhci-4bit";
469 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
471 clock-names = "clk_ahb", "clk_xin";
472 ti,trm-icp = <0x2>;
473 ti,otap-del-sel-legacy = <0x0>;
474 ti,otap-del-sel-sd-hs = <0xf>;
475 ti,otap-del-sel-sdr12 = <0xf>;
476 ti,otap-del-sel-sdr25 = <0xf>;
477 ti,otap-del-sel-sdr50 = <0xc>;
478 ti,otap-del-sel-sdr104 = <0x6>;
479 ti,otap-del-sel-ddr50 = <0x9>;
480 ti,clkbuf-sel = <0x7>;
484 compatible = "ti,am642-cpsw-nuss";
485 #address-cells = <2>;
486 #size-cells = <2>;
488 reg-names = "cpsw_nuss";
491 assigned-clocks = <&k3_clks 13 1>;
492 assigned-clock-parents = <&k3_clks 13 9>;
493 clock-names = "fck";
494 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
505 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
508 ethernet-ports {
509 #address-cells = <1>;
510 #size-cells = <0>;
514 ti,mac-only;
517 mac-address = [00 00 00 00 00 00];
518 ti,syscon-efuse = <&main_conf 0x200>;
523 ti,mac-only;
526 mac-address = [00 00 00 00 00 00];
531 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
533 #address-cells = <1>;
534 #size-cells = <0>;
536 clock-names = "fck";
541 compatible = "ti,j721e-cpts";
544 clock-names = "cpts";
545 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
546 interrupt-names = "cpts";
547 ti,cpts-ext-ts-inputs = <4>;
548 ti,cpts-periodic-outputs = <2>;
553 compatible = "ti,j721e-cpts";
555 reg-names = "cpts";
556 power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
558 clock-names = "cpts";
559 assigned-clocks = <&k3_clks 84 0>;
560 assigned-clock-parents = <&k3_clks 84 8>;
562 interrupt-names = "cpts";
563 ti,cpts-periodic-outputs = <6>;
564 ti,cpts-ext-ts-inputs = <8>;
567 usbss0: cdns-usb@f900000{
568 compatible = "ti,am64-usb";
570 power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
572 clock-names = "ref", "lpm";
573 assigned-clocks = <&k3_clks 161 9>; /* USB2_REFCLK */
574 assigned-clock-parents = <&k3_clks 161 10>; /* HF0SC0 */
575 #address-cells = <2>;
576 #size-cells = <2>;
583 reg-names = "otg",
589 interrupt-names = "host",
592 maximum-speed = "super-speed";
598 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
601 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
603 assigned-clocks = <&k3_clks 0 0>;
604 assigned-clock-parents = <&k3_clks 0 3>;
605 assigned-clock-rates = <60000000>;
606 clock-names = "adc_tsc_fck";
609 #io-channel-cells = <1>;
610 compatible = "ti,am654-adc", "ti,am3359-adc";
615 compatible = "simple-bus";
617 #address-cells = <2>;
618 #size-cells = <2>;
622 compatible = "ti,am654-ospi", "cdns,qspi-nor";
626 cdns,fifo-depth = <256>;
627 cdns,fifo-width = <4>;
628 cdns,trigger-address = <0x0>;
629 #address-cells = <0x1>;
630 #size-cells = <0x0>;
632 assigned-clocks = <&k3_clks 75 6>;
633 assigned-clock-parents = <&k3_clks 75 7>;
634 assigned-clock-rates = <166666666>;
635 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
640 compatible = "ti,am64-hwspinlock";
642 #hwlock-cells = <1>;
646 compatible = "ti,am64-mailbox";
650 #mbox-cells = <1>;
651 ti,mbox-num-users = <4>;
652 ti,mbox-num-fifos = <16>;
656 compatible = "ti,am64-mailbox";
660 #mbox-cells = <1>;
661 ti,mbox-num-users = <4>;
662 ti,mbox-num-fifos = <16>;
666 compatible = "ti,am64-mailbox";
670 #mbox-cells = <1>;
671 ti,mbox-num-users = <4>;
672 ti,mbox-num-fifos = <16>;
676 compatible = "ti,am64-mailbox";
680 #mbox-cells = <1>;
681 ti,mbox-num-users = <4>;
682 ti,mbox-num-fifos = <16>;
686 compatible = "ti,am64-mailbox";
689 #mbox-cells = <1>;
690 ti,mbox-num-users = <4>;
691 ti,mbox-num-fifos = <16>;
695 compatible = "ti,am64-mailbox";
698 #mbox-cells = <1>;
699 ti,mbox-num-users = <4>;
700 ti,mbox-num-fifos = <16>;
704 compatible = "ti,am64-r5fss";
705 ti,cluster-mode = <0>;
706 #address-cells = <1>;
707 #size-cells = <1>;
712 power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
715 compatible = "ti,am64-r5f";
718 reg-names = "atcm", "btcm";
720 ti,sci-dev-id = <121>;
721 ti,sci-proc-ids = <0x01 0xff>;
723 firmware-name = "am64-main-r5f0_0-fw";
724 ti,atcm-enable = <1>;
725 ti,btcm-enable = <1>;
730 compatible = "ti,am64-r5f";
733 reg-names = "atcm", "btcm";
735 ti,sci-dev-id = <122>;
736 ti,sci-proc-ids = <0x02 0xff>;
738 firmware-name = "am64-main-r5f0_1-fw";
739 ti,atcm-enable = <1>;
740 ti,btcm-enable = <1>;
746 compatible = "ti,am64-r5fss";
747 ti,cluster-mode = <0>;
748 #address-cells = <1>;
749 #size-cells = <1>;
754 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
757 compatible = "ti,am64-r5f";
760 reg-names = "atcm", "btcm";
762 ti,sci-dev-id = <123>;
763 ti,sci-proc-ids = <0x06 0xff>;
765 firmware-name = "am64-main-r5f1_0-fw";
766 ti,atcm-enable = <1>;
767 ti,btcm-enable = <1>;
772 compatible = "ti,am64-r5f";
775 reg-names = "atcm", "btcm";
777 ti,sci-dev-id = <124>;
778 ti,sci-proc-ids = <0x07 0xff>;
780 firmware-name = "am64-main-r5f1_1-fw";
781 ti,atcm-enable = <1>;
782 ti,btcm-enable = <1>;
788 compatible = "ti,am64-wiz-10g";
789 #address-cells = <1>;
790 #size-cells = <1>;
791 power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
793 clock-names = "fck", "core_ref_clk", "ext_ref_clk";
794 num-lanes = <1>;
795 #reset-cells = <1>;
796 #clock-cells = <1>;
799 assigned-clocks = <&k3_clks 162 1>;
800 assigned-clock-parents = <&k3_clks 162 5>;
803 compatible = "ti,j721e-serdes-10g";
805 reg-names = "torrent_phy";
807 reset-names = "torrent_reset";
810 clock-names = "refclk", "phy_en_refclk";
811 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
814 assigned-clock-parents = <&k3_clks 162 1>,
817 #address-cells = <1>;
818 #size-cells = <0>;
819 #clock-cells = <1>;
824 compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
829 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
830 interrupt-names = "link_state";
833 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
834 max-link-speed = <2>;
835 num-lanes = <1>;
836 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
838 clock-names = "fck", "pcie_refclk";
839 #address-cells = <3>;
840 #size-cells = <2>;
841 bus-range = <0x0 0xff>;
842 cdns,no-bar-match-nbits = <64>;
843 vendor-id = <0x104c>;
844 device-id = <0xb010>;
845 msi-map = <0x0 &gic_its 0x0 0x10000>;
848 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
851 pcie0_ep: pcie-ep@f102000 {
852 compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
857 reg-names = "intd_cfg", "user_cfg", "reg", "mem";
858 interrupt-names = "link_state";
860 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
861 max-link-speed = <2>;
862 num-lanes = <1>;
863 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
865 clock-names = "fck";
866 max-functions = /bits/ 8 <1>;
870 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
871 #pwm-cells = <3>;
873 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
875 clock-names = "tbclk", "fck";
879 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
880 #pwm-cells = <3>;
882 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
884 clock-names = "tbclk", "fck";
888 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
889 #pwm-cells = <3>;
891 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
893 clock-names = "tbclk", "fck";
897 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
898 #pwm-cells = <3>;
900 power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
902 clock-names = "tbclk", "fck";
906 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
907 #pwm-cells = <3>;
909 power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
911 clock-names = "tbclk", "fck";
915 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
916 #pwm-cells = <3>;
918 power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
920 clock-names = "tbclk", "fck";
924 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
925 #pwm-cells = <3>;
927 power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
929 clock-names = "tbclk", "fck";
933 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
934 #pwm-cells = <3>;
936 power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
938 clock-names = "tbclk", "fck";
942 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
943 #pwm-cells = <3>;
945 power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
947 clock-names = "tbclk", "fck";
951 compatible = "ti,am64-ecap", "ti,am3352-ecap";
952 #pwm-cells = <3>;
954 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
956 clock-names = "fck";
960 compatible = "ti,am64-ecap", "ti,am3352-ecap";
961 #pwm-cells = <3>;
963 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
965 clock-names = "fck";
969 compatible = "ti,am64-ecap", "ti,am3352-ecap";
970 #pwm-cells = <3>;
972 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
974 clock-names = "fck";