Lines Matching +full:ch3 +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC
8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779a0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
28 #address-cells = <1>;
29 #size-cells = <0>;
31 a76_0: cpu@0 {
32 compatible = "arm,cortex-a76";
33 reg = <0>;
35 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>;
36 next-level-cache = <&L3_CA76_0>;
39 L3_CA76_0: cache-controller-0 {
41 power-domains = <&sysc R8A779A0_PD_A2E0D0>;
42 cache-unified;
43 cache-level = <3>;
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
51 clock-frequency = <0>;
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
58 clock-frequency = <0>;
62 compatible = "arm,cortex-a76-pmu";
63 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
66 /* External SCIF clock - to be overridden by boards that provide it */
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <0>;
74 compatible = "simple-bus";
75 interrupt-parent = <&gic>;
76 #address-cells = <2>;
77 #size-cells = <2>;
81 compatible = "renesas,r8a779a0-wdt",
82 "renesas,rcar-gen3-wdt";
83 reg = <0 0xe6020000 0 0x0c>;
85 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
90 pfc: pin-controller@e6050000 {
91 compatible = "renesas,pfc-r8a779a0";
92 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
93 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
94 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
95 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>,
96 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>;
100 compatible = "renesas,gpio-r8a779a0";
101 reg = <0 0xe6058180 0 0x54>;
104 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
106 gpio-controller;
107 #gpio-cells = <2>;
108 gpio-ranges = <&pfc 0 0 28>;
109 interrupt-controller;
110 #interrupt-cells = <2>;
114 compatible = "renesas,gpio-r8a779a0";
115 reg = <0 0xe6050180 0 0x54>;
118 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
120 gpio-controller;
121 #gpio-cells = <2>;
122 gpio-ranges = <&pfc 0 32 31>;
123 interrupt-controller;
124 #interrupt-cells = <2>;
128 compatible = "renesas,gpio-r8a779a0";
129 reg = <0 0xe6050980 0 0x54>;
132 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
134 gpio-controller;
135 #gpio-cells = <2>;
136 gpio-ranges = <&pfc 0 64 25>;
137 interrupt-controller;
138 #interrupt-cells = <2>;
142 compatible = "renesas,gpio-r8a779a0";
143 reg = <0 0xe6058980 0 0x54>;
146 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
148 gpio-controller;
149 #gpio-cells = <2>;
150 gpio-ranges = <&pfc 0 96 17>;
151 interrupt-controller;
152 #interrupt-cells = <2>;
156 compatible = "renesas,gpio-r8a779a0";
157 reg = <0 0xe6060180 0 0x54>;
160 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
162 gpio-controller;
163 #gpio-cells = <2>;
164 gpio-ranges = <&pfc 0 128 27>;
165 interrupt-controller;
166 #interrupt-cells = <2>;
170 compatible = "renesas,gpio-r8a779a0";
171 reg = <0 0xe6060980 0 0x54>;
174 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
176 gpio-controller;
177 #gpio-cells = <2>;
178 gpio-ranges = <&pfc 0 160 21>;
179 interrupt-controller;
180 #interrupt-cells = <2>;
184 compatible = "renesas,gpio-r8a779a0";
185 reg = <0 0xe6068180 0 0x54>;
188 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
190 gpio-controller;
191 #gpio-cells = <2>;
192 gpio-ranges = <&pfc 0 192 21>;
193 interrupt-controller;
194 #interrupt-cells = <2>;
198 compatible = "renesas,gpio-r8a779a0";
199 reg = <0 0xe6068980 0 0x54>;
202 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
204 gpio-controller;
205 #gpio-cells = <2>;
206 gpio-ranges = <&pfc 0 224 21>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
212 compatible = "renesas,gpio-r8a779a0";
213 reg = <0 0xe6069180 0 0x54>;
216 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
218 gpio-controller;
219 #gpio-cells = <2>;
220 gpio-ranges = <&pfc 0 256 21>;
221 interrupt-controller;
222 #interrupt-cells = <2>;
226 compatible = "renesas,gpio-r8a779a0";
227 reg = <0 0xe6069980 0 0x54>;
230 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
232 gpio-controller;
233 #gpio-cells = <2>;
234 gpio-ranges = <&pfc 0 288 21>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
240 compatible = "renesas,r8a779a0-cmt0",
241 "renesas,rcar-gen3-cmt0";
242 reg = <0 0xe60f0000 0 0x1004>;
246 clock-names = "fck";
247 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
253 compatible = "renesas,r8a779a0-cmt1",
254 "renesas,rcar-gen3-cmt1";
255 reg = <0 0xe6130000 0 0x1004>;
265 clock-names = "fck";
266 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
272 compatible = "renesas,r8a779a0-cmt1",
273 "renesas,rcar-gen3-cmt1";
274 reg = <0 0xe6140000 0 0x1004>;
284 clock-names = "fck";
285 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
291 compatible = "renesas,r8a779a0-cmt1",
292 "renesas,rcar-gen3-cmt1";
293 reg = <0 0xe6148000 0 0x1004>;
303 clock-names = "fck";
304 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
309 cpg: clock-controller@e6150000 {
310 compatible = "renesas,r8a779a0-cpg-mssr";
311 reg = <0 0xe6150000 0 0x4000>;
313 clock-names = "extal", "extalr";
314 #clock-cells = <2>;
315 #power-domain-cells = <0>;
316 #reset-cells = <1>;
319 rst: reset-controller@e6160000 {
320 compatible = "renesas,r8a779a0-rst";
321 reg = <0 0xe6160000 0 0x4000>;
324 sysc: system-controller@e6180000 {
325 compatible = "renesas,r8a779a0-sysc";
326 reg = <0 0xe6180000 0 0x4000>;
327 #power-domain-cells = <1>;
331 compatible = "renesas,r8a779a0-thermal";
332 reg = <0 0xe6190000 0 0x200>,
333 <0 0xe6198000 0 0x200>,
334 <0 0xe61a0000 0 0x200>,
335 <0 0xe61a8000 0 0x200>,
336 <0 0xe61b0000 0 0x200>;
338 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
340 #thermal-sensor-cells = <1>;
344 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
345 reg = <0 0xe61e0000 0 0x30>;
350 clock-names = "fck";
351 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
357 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
358 reg = <0 0xe6fc0000 0 0x30>;
363 clock-names = "fck";
364 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
370 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
371 reg = <0 0xe6fd0000 0 0x30>;
376 clock-names = "fck";
377 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
383 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
384 reg = <0 0xe6fe0000 0 0x30>;
389 clock-names = "fck";
390 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
396 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
397 reg = <0 0xffc00000 0 0x30>;
402 clock-names = "fck";
403 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
409 compatible = "renesas,i2c-r8a779a0",
410 "renesas,rcar-gen3-i2c";
411 reg = <0 0xe6500000 0 0x40>;
414 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
416 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
417 dma-names = "tx", "rx";
418 i2c-scl-internal-delay-ns = <110>;
419 #address-cells = <1>;
420 #size-cells = <0>;
425 compatible = "renesas,i2c-r8a779a0",
426 "renesas,rcar-gen3-i2c";
427 reg = <0 0xe6508000 0 0x40>;
430 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
432 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
433 dma-names = "tx", "rx";
434 i2c-scl-internal-delay-ns = <110>;
435 #address-cells = <1>;
436 #size-cells = <0>;
441 compatible = "renesas,i2c-r8a779a0",
442 "renesas,rcar-gen3-i2c";
443 reg = <0 0xe6510000 0 0x40>;
446 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
448 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
449 dma-names = "tx", "rx";
450 i2c-scl-internal-delay-ns = <110>;
451 #address-cells = <1>;
452 #size-cells = <0>;
457 compatible = "renesas,i2c-r8a779a0",
458 "renesas,rcar-gen3-i2c";
459 reg = <0 0xe66d0000 0 0x40>;
462 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
464 dmas = <&dmac1 0x97>, <&dmac1 0x96>;
465 dma-names = "tx", "rx";
466 i2c-scl-internal-delay-ns = <110>;
467 #address-cells = <1>;
468 #size-cells = <0>;
473 compatible = "renesas,i2c-r8a779a0",
474 "renesas,rcar-gen3-i2c";
475 reg = <0 0xe66d8000 0 0x40>;
478 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
480 dmas = <&dmac1 0x99>, <&dmac1 0x98>;
481 dma-names = "tx", "rx";
482 i2c-scl-internal-delay-ns = <110>;
483 #address-cells = <1>;
484 #size-cells = <0>;
489 compatible = "renesas,i2c-r8a779a0",
490 "renesas,rcar-gen3-i2c";
491 reg = <0 0xe66e0000 0 0x40>;
494 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
496 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>;
497 dma-names = "tx", "rx";
498 i2c-scl-internal-delay-ns = <110>;
499 #address-cells = <1>;
500 #size-cells = <0>;
505 compatible = "renesas,i2c-r8a779a0",
506 "renesas,rcar-gen3-i2c";
507 reg = <0 0xe66e8000 0 0x40>;
510 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
512 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>;
513 dma-names = "tx", "rx";
514 i2c-scl-internal-delay-ns = <110>;
515 #address-cells = <1>;
516 #size-cells = <0>;
521 compatible = "renesas,hscif-r8a779a0",
522 "renesas,rcar-gen3-hscif", "renesas,hscif";
523 reg = <0 0xe6540000 0 0x60>;
528 clock-names = "fck", "brg_int", "scif_clk";
529 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
530 dma-names = "tx", "rx";
531 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
537 compatible = "renesas,hscif-r8a779a0",
538 "renesas,rcar-gen3-hscif", "renesas,hscif";
539 reg = <0 0xe6550000 0 0x60>;
544 clock-names = "fck", "brg_int", "scif_clk";
545 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
546 dma-names = "tx", "rx";
547 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
553 compatible = "renesas,hscif-r8a779a0",
554 "renesas,rcar-gen3-hscif", "renesas,hscif";
555 reg = <0 0xe6560000 0 0x60>;
560 clock-names = "fck", "brg_int", "scif_clk";
561 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
562 dma-names = "tx", "rx";
563 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
569 compatible = "renesas,hscif-r8a779a0",
570 "renesas,rcar-gen3-hscif", "renesas,hscif";
571 reg = <0 0xe66a0000 0 0x60>;
576 clock-names = "fck", "brg_int", "scif_clk";
577 dmas = <&dmac1 0x37>, <&dmac1 0x36>;
578 dma-names = "tx", "rx";
579 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
585 compatible = "renesas,etheravb-r8a779a0",
586 "renesas,etheravb-rcar-gen3";
587 reg = <0 0xe6800000 0 0x800>;
613 interrupt-names = "ch0", "ch1", "ch2", "ch3",
621 clock-names = "fck";
622 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
624 phy-mode = "rgmii";
625 rx-internal-delay-ps = <0>;
626 tx-internal-delay-ps = <0>;
627 #address-cells = <1>;
628 #size-cells = <0>;
633 compatible = "renesas,etheravb-r8a779a0",
634 "renesas,etheravb-rcar-gen3";
635 reg = <0 0xe6810000 0 0x800>;
661 interrupt-names = "ch0", "ch1", "ch2", "ch3",
669 clock-names = "fck";
670 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
672 phy-mode = "rgmii";
673 rx-internal-delay-ps = <0>;
674 tx-internal-delay-ps = <0>;
675 #address-cells = <1>;
676 #size-cells = <0>;
681 compatible = "renesas,etheravb-r8a779a0",
682 "renesas,etheravb-rcar-gen3";
683 reg = <0 0xe6820000 0 0x1000>;
709 interrupt-names = "ch0", "ch1", "ch2", "ch3",
717 clock-names = "fck";
718 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
720 phy-mode = "rgmii";
721 rx-internal-delay-ps = <0>;
722 tx-internal-delay-ps = <0>;
723 #address-cells = <1>;
724 #size-cells = <0>;
729 compatible = "renesas,etheravb-r8a779a0",
730 "renesas,etheravb-rcar-gen3";
731 reg = <0 0xe6830000 0 0x1000>;
757 interrupt-names = "ch0", "ch1", "ch2", "ch3",
765 clock-names = "fck";
766 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
768 phy-mode = "rgmii";
769 rx-internal-delay-ps = <0>;
770 tx-internal-delay-ps = <0>;
771 #address-cells = <1>;
772 #size-cells = <0>;
777 compatible = "renesas,etheravb-r8a779a0",
778 "renesas,etheravb-rcar-gen3";
779 reg = <0 0xe6840000 0 0x1000>;
805 interrupt-names = "ch0", "ch1", "ch2", "ch3",
813 clock-names = "fck";
814 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
816 phy-mode = "rgmii";
817 rx-internal-delay-ps = <0>;
818 tx-internal-delay-ps = <0>;
819 #address-cells = <1>;
820 #size-cells = <0>;
825 compatible = "renesas,etheravb-r8a779a0",
826 "renesas,etheravb-rcar-gen3";
827 reg = <0 0xe6850000 0 0x1000>;
853 interrupt-names = "ch0", "ch1", "ch2", "ch3",
861 clock-names = "fck";
862 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
864 phy-mode = "rgmii";
865 rx-internal-delay-ps = <0>;
866 tx-internal-delay-ps = <0>;
867 #address-cells = <1>;
868 #size-cells = <0>;
873 compatible = "renesas,scif-r8a779a0",
874 "renesas,rcar-gen3-scif", "renesas,scif";
875 reg = <0 0xe6e60000 0 64>;
880 clock-names = "fck", "brg_int", "scif_clk";
881 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
882 dma-names = "tx", "rx";
883 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
889 compatible = "renesas,scif-r8a779a0",
890 "renesas,rcar-gen3-scif", "renesas,scif";
891 reg = <0 0xe6e68000 0 64>;
896 clock-names = "fck", "brg_int", "scif_clk";
897 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
898 dma-names = "tx", "rx";
899 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
905 compatible = "renesas,scif-r8a779a0",
906 "renesas,rcar-gen3-scif", "renesas,scif";
907 reg = <0 0xe6c50000 0 64>;
912 clock-names = "fck", "brg_int", "scif_clk";
913 dmas = <&dmac1 0x57>, <&dmac1 0x56>;
914 dma-names = "tx", "rx";
915 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
921 compatible = "renesas,scif-r8a779a0",
922 "renesas,rcar-gen3-scif", "renesas,scif";
923 reg = <0 0xe6c40000 0 64>;
928 clock-names = "fck", "brg_int", "scif_clk";
929 dmas = <&dmac1 0x59>, <&dmac1 0x58>;
930 dma-names = "tx", "rx";
931 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
937 compatible = "renesas,msiof-r8a779a0",
938 "renesas,rcar-gen3-msiof";
939 reg = <0 0xe6e90000 0 0x0064>;
942 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
944 dmas = <&dmac1 0x41>, <&dmac1 0x40>;
945 dma-names = "tx", "rx";
946 #address-cells = <1>;
947 #size-cells = <0>;
952 compatible = "renesas,msiof-r8a779a0",
953 "renesas,rcar-gen3-msiof";
954 reg = <0 0xe6ea0000 0 0x0064>;
957 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
959 dmas = <&dmac1 0x43>, <&dmac1 0x42>;
960 dma-names = "tx", "rx";
961 #address-cells = <1>;
962 #size-cells = <0>;
967 compatible = "renesas,msiof-r8a779a0",
968 "renesas,rcar-gen3-msiof";
969 reg = <0 0xe6c00000 0 0x0064>;
972 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
974 dmas = <&dmac1 0x45>, <&dmac1 0x44>;
975 dma-names = "tx", "rx";
976 #address-cells = <1>;
977 #size-cells = <0>;
982 compatible = "renesas,msiof-r8a779a0",
983 "renesas,rcar-gen3-msiof";
984 reg = <0 0xe6c10000 0 0x0064>;
987 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
989 dmas = <&dmac1 0x47>, <&dmac1 0x46>;
990 dma-names = "tx", "rx";
991 #address-cells = <1>;
992 #size-cells = <0>;
997 compatible = "renesas,msiof-r8a779a0",
998 "renesas,rcar-gen3-msiof";
999 reg = <0 0xe6c20000 0 0x0064>;
1002 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1004 dmas = <&dmac1 0x49>, <&dmac1 0x48>;
1005 dma-names = "tx", "rx";
1006 #address-cells = <1>;
1007 #size-cells = <0>;
1012 compatible = "renesas,msiof-r8a779a0",
1013 "renesas,rcar-gen3-msiof";
1014 reg = <0 0xe6c28000 0 0x0064>;
1017 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1019 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>;
1020 dma-names = "tx", "rx";
1021 #address-cells = <1>;
1022 #size-cells = <0>;
1026 dmac1: dma-controller@e7350000 {
1027 compatible = "renesas,dmac-r8a779a0";
1028 reg = <0 0xe7350000 0 0x1000>,
1029 <0 0xe7300000 0 0x10000>;
1047 interrupt-names = "error",
1048 "ch0", "ch1", "ch2", "ch3", "ch4",
1053 clock-names = "fck";
1054 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1056 #dma-cells = <1>;
1057 dma-channels = <16>;
1060 dmac2: dma-controller@e7351000 {
1061 compatible = "renesas,dmac-r8a779a0";
1062 reg = <0 0xe7351000 0 0x1000>,
1063 <0 0xe7310000 0 0x10000>;
1073 interrupt-names = "error",
1074 "ch0", "ch1", "ch2", "ch3", "ch4",
1077 clock-names = "fck";
1078 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1080 #dma-cells = <1>;
1081 dma-channels = <8>;
1085 compatible = "renesas,sdhi-r8a779a0",
1086 "renesas,rcar-gen3-sdhi";
1087 reg = <0 0xee140000 0 0x2000>;
1090 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1092 max-frequency = <200000000>;
1096 gic: interrupt-controller@f1000000 {
1097 compatible = "arm,gic-v3";
1098 #interrupt-cells = <3>;
1099 #address-cells = <0>;
1100 interrupt-controller;
1101 reg = <0x0 0xf1000000 0 0x20000>,
1102 <0x0 0xf1060000 0 0x110000>;
1109 reg = <0 0xfea10000 0 0x200>;
1111 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1117 reg = <0 0xfea11000 0 0x200>;
1119 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1125 reg = <0 0xfea20000 0 0x5000>;
1128 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1136 reg = <0 0xfea28000 0 0x5000>;
1139 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1147 reg = <0 0xfff00044 0 4>;
1151 thermal-zones {
1152 sensor_thermal1: sensor-thermal1 {
1153 polling-delay-passive = <250>;
1154 polling-delay = <1000>;
1155 thermal-sensors = <&tsc 0>;
1158 sensor1_crit: sensor1-crit {
1166 sensor_thermal2: sensor-thermal2 {
1167 polling-delay-passive = <250>;
1168 polling-delay = <1000>;
1169 thermal-sensors = <&tsc 1>;
1172 sensor2_crit: sensor2-crit {
1180 sensor_thermal3: sensor-thermal3 {
1181 polling-delay-passive = <250>;
1182 polling-delay = <1000>;
1183 thermal-sensors = <&tsc 2>;
1186 sensor3_crit: sensor3-crit {
1194 sensor_thermal4: sensor-thermal4 {
1195 polling-delay-passive = <250>;
1196 polling-delay = <1000>;
1197 thermal-sensors = <&tsc 3>;
1200 sensor4_crit: sensor4-crit {
1208 sensor_thermal5: sensor-thermal5 {
1209 polling-delay-passive = <250>;
1210 polling-delay = <1000>;
1211 thermal-sensors = <&tsc 4>;
1214 sensor5_crit: sensor5-crit {
1224 compatible = "arm,armv8-timer";
1225 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,