Lines Matching +full:pwm +full:- +full:rcar
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a77970-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
27 /* External CAN clock - to be overridden by boards that provide it */
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a53";
43 power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
44 next-level-cache = <&L2_CA53>;
45 enable-method = "psci";
50 compatible = "arm,cortex-a53";
53 power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
54 next-level-cache = <&L2_CA53>;
55 enable-method = "psci";
58 L2_CA53: cache-controller {
60 power-domains = <&sysc R8A77970_PD_CA53_SCU>;
61 cache-unified;
62 cache-level = <2>;
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
70 clock-frequency = <0>;
74 compatible = "fixed-clock";
75 #clock-cells = <0>;
77 clock-frequency = <0>;
81 compatible = "arm,cortex-a53-pmu";
82 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
84 interrupt-affinity = <&a53_0>, <&a53_1>;
88 compatible = "arm,psci-1.0", "arm,psci-0.2";
92 /* External SCIF clock - to be overridden by boards that provide it */
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 clock-frequency = <0>;
100 compatible = "simple-bus";
101 interrupt-parent = <&gic>;
103 #address-cells = <2>;
104 #size-cells = <2>;
108 compatible = "renesas,r8a77970-wdt",
109 "renesas,rcar-gen3-wdt";
112 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
118 compatible = "renesas,gpio-r8a77970",
119 "renesas,rcar-gen3-gpio";
122 #gpio-cells = <2>;
123 gpio-controller;
124 gpio-ranges = <&pfc 0 0 22>;
125 #interrupt-cells = <2>;
126 interrupt-controller;
128 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
133 compatible = "renesas,gpio-r8a77970",
134 "renesas,rcar-gen3-gpio";
137 #gpio-cells = <2>;
138 gpio-controller;
139 gpio-ranges = <&pfc 0 32 28>;
140 #interrupt-cells = <2>;
141 interrupt-controller;
143 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
148 compatible = "renesas,gpio-r8a77970",
149 "renesas,rcar-gen3-gpio";
152 #gpio-cells = <2>;
153 gpio-controller;
154 gpio-ranges = <&pfc 0 64 17>;
155 #interrupt-cells = <2>;
156 interrupt-controller;
158 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
163 compatible = "renesas,gpio-r8a77970",
164 "renesas,rcar-gen3-gpio";
167 #gpio-cells = <2>;
168 gpio-controller;
169 gpio-ranges = <&pfc 0 96 17>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
173 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
178 compatible = "renesas,gpio-r8a77970",
179 "renesas,rcar-gen3-gpio";
182 #gpio-cells = <2>;
183 gpio-controller;
184 gpio-ranges = <&pfc 0 128 6>;
185 #interrupt-cells = <2>;
186 interrupt-controller;
188 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
193 compatible = "renesas,gpio-r8a77970",
194 "renesas,rcar-gen3-gpio";
197 #gpio-cells = <2>;
198 gpio-controller;
199 gpio-ranges = <&pfc 0 160 15>;
200 #interrupt-cells = <2>;
201 interrupt-controller;
203 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
208 compatible = "renesas,pfc-r8a77970";
213 compatible = "renesas,r8a77970-cmt0",
214 "renesas,rcar-gen3-cmt0";
219 clock-names = "fck";
220 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
226 compatible = "renesas,r8a77970-cmt1",
227 "renesas,rcar-gen3-cmt1";
238 clock-names = "fck";
239 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
245 compatible = "renesas,r8a77970-cmt1",
246 "renesas,rcar-gen3-cmt1";
257 clock-names = "fck";
258 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
264 compatible = "renesas,r8a77970-cmt1",
265 "renesas,rcar-gen3-cmt1";
276 clock-names = "fck";
277 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
282 cpg: clock-controller@e6150000 {
283 compatible = "renesas,r8a77970-cpg-mssr";
286 clock-names = "extal", "extalr";
287 #clock-cells = <2>;
288 #power-domain-cells = <0>;
289 #reset-cells = <1>;
292 rst: reset-controller@e6160000 {
293 compatible = "renesas,r8a77970-rst";
297 sysc: system-controller@e6180000 {
298 compatible = "renesas,r8a77970-sysc";
300 #power-domain-cells = <1>;
304 compatible = "renesas,thermal-r8a77970";
311 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
313 #thermal-sensor-cells = <0>;
316 intc_ex: interrupt-controller@e61c0000 {
317 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
318 #interrupt-cells = <2>;
319 interrupt-controller;
328 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
333 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
339 clock-names = "fck";
340 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
346 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
352 clock-names = "fck";
353 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
359 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
365 clock-names = "fck";
366 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
372 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
378 clock-names = "fck";
379 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
385 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
391 clock-names = "fck";
392 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
398 compatible = "renesas,i2c-r8a77970",
399 "renesas,rcar-gen3-i2c";
403 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
407 dma-names = "tx", "rx", "tx", "rx";
408 i2c-scl-internal-delay-ns = <6>;
409 #address-cells = <1>;
410 #size-cells = <0>;
415 compatible = "renesas,i2c-r8a77970",
416 "renesas,rcar-gen3-i2c";
420 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
424 dma-names = "tx", "rx", "tx", "rx";
425 i2c-scl-internal-delay-ns = <6>;
426 #address-cells = <1>;
427 #size-cells = <0>;
432 compatible = "renesas,i2c-r8a77970",
433 "renesas,rcar-gen3-i2c";
437 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
441 dma-names = "tx", "rx", "tx", "rx";
442 i2c-scl-internal-delay-ns = <6>;
443 #address-cells = <1>;
444 #size-cells = <0>;
449 compatible = "renesas,i2c-r8a77970",
450 "renesas,rcar-gen3-i2c";
454 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
458 dma-names = "tx", "rx", "tx", "rx";
459 i2c-scl-internal-delay-ns = <6>;
460 #address-cells = <1>;
461 #size-cells = <0>;
466 compatible = "renesas,i2c-r8a77970",
467 "renesas,rcar-gen3-i2c";
471 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
475 dma-names = "tx", "rx", "tx", "rx";
476 i2c-scl-internal-delay-ns = <6>;
477 #address-cells = <1>;
478 #size-cells = <0>;
483 compatible = "renesas,hscif-r8a77970",
484 "renesas,rcar-gen3-hscif",
491 clock-names = "fck", "brg_int", "scif_clk";
494 dma-names = "tx", "rx", "tx", "rx";
495 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
501 compatible = "renesas,hscif-r8a77970",
502 "renesas,rcar-gen3-hscif",
509 clock-names = "fck", "brg_int", "scif_clk";
512 dma-names = "tx", "rx", "tx", "rx";
513 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
519 compatible = "renesas,hscif-r8a77970",
520 "renesas,rcar-gen3-hscif",
527 clock-names = "fck", "brg_int", "scif_clk";
530 dma-names = "tx", "rx", "tx", "rx";
531 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
537 compatible = "renesas,hscif-r8a77970",
538 "renesas,rcar-gen3-hscif", "renesas,hscif";
544 clock-names = "fck", "brg_int", "scif_clk";
547 dma-names = "tx", "rx", "tx", "rx";
548 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
554 compatible = "renesas,r8a77970-canfd",
555 "renesas,rcar-gen3-canfd";
562 clock-names = "fck", "canfd", "can_clk";
563 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
564 assigned-clock-rates = <40000000>;
565 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
579 compatible = "renesas,etheravb-r8a77970",
580 "renesas,etheravb-rcar-gen3";
607 interrupt-names = "ch0", "ch1", "ch2", "ch3",
615 clock-names = "fck";
616 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
618 phy-mode = "rgmii";
619 rx-internal-delay-ps = <0>;
620 tx-internal-delay-ps = <0>;
622 #address-cells = <1>;
623 #size-cells = <0>;
627 pwm0: pwm@e6e30000 {
628 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
630 #pwm-cells = <2>;
632 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
637 pwm1: pwm@e6e31000 {
638 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
640 #pwm-cells = <2>;
642 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
647 pwm2: pwm@e6e32000 {
648 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
650 #pwm-cells = <2>;
652 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
657 pwm3: pwm@e6e33000 {
658 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
660 #pwm-cells = <2>;
662 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
667 pwm4: pwm@e6e34000 {
668 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
670 #pwm-cells = <2>;
672 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
678 compatible = "renesas,scif-r8a77970",
679 "renesas,rcar-gen3-scif",
686 clock-names = "fck", "brg_int", "scif_clk";
689 dma-names = "tx", "rx", "tx", "rx";
690 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
696 compatible = "renesas,scif-r8a77970",
697 "renesas,rcar-gen3-scif",
704 clock-names = "fck", "brg_int", "scif_clk";
707 dma-names = "tx", "rx", "tx", "rx";
708 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
714 compatible = "renesas,scif-r8a77970",
715 "renesas,rcar-gen3-scif",
722 clock-names = "fck", "brg_int", "scif_clk";
725 dma-names = "tx", "rx", "tx", "rx";
726 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
732 compatible = "renesas,scif-r8a77970",
733 "renesas,rcar-gen3-scif", "renesas,scif";
739 clock-names = "fck", "brg_int", "scif_clk";
742 dma-names = "tx", "rx", "tx", "rx";
743 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
748 tpu: pwm@e6e80000 {
749 compatible = "renesas,tpu-r8a77970", "renesas,tpu";
753 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
755 #pwm-cells = <3>;
760 compatible = "renesas,msiof-r8a77970",
761 "renesas,rcar-gen3-msiof";
765 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
769 dma-names = "tx", "rx", "tx", "rx";
770 #address-cells = <1>;
771 #size-cells = <0>;
776 compatible = "renesas,msiof-r8a77970",
777 "renesas,rcar-gen3-msiof";
781 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
785 dma-names = "tx", "rx", "tx", "rx";
786 #address-cells = <1>;
787 #size-cells = <0>;
792 compatible = "renesas,msiof-r8a77970",
793 "renesas,rcar-gen3-msiof";
797 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
801 dma-names = "tx", "rx", "tx", "rx";
802 #address-cells = <1>;
803 #size-cells = <0>;
808 compatible = "renesas,msiof-r8a77970",
809 "renesas,rcar-gen3-msiof";
813 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
817 dma-names = "tx", "rx", "tx", "rx";
818 #address-cells = <1>;
819 #size-cells = <0>;
824 compatible = "renesas,vin-r8a77970";
828 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
834 #address-cells = <1>;
835 #size-cells = <0>;
838 #address-cells = <1>;
839 #size-cells = <0>;
845 remote-endpoint = <&csi40vin0>;
852 compatible = "renesas,vin-r8a77970";
856 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
862 #address-cells = <1>;
863 #size-cells = <0>;
866 #address-cells = <1>;
867 #size-cells = <0>;
873 remote-endpoint = <&csi40vin1>;
880 compatible = "renesas,vin-r8a77970";
884 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
890 #address-cells = <1>;
891 #size-cells = <0>;
894 #address-cells = <1>;
895 #size-cells = <0>;
901 remote-endpoint = <&csi40vin2>;
908 compatible = "renesas,vin-r8a77970";
912 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
918 #address-cells = <1>;
919 #size-cells = <0>;
922 #address-cells = <1>;
923 #size-cells = <0>;
929 remote-endpoint = <&csi40vin3>;
935 dmac1: dma-controller@e7300000 {
936 compatible = "renesas,dmac-r8a77970",
937 "renesas,rcar-dmac";
948 interrupt-names = "error",
952 clock-names = "fck";
953 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
955 #dma-cells = <1>;
956 dma-channels = <8>;
963 dmac2: dma-controller@e7310000 {
964 compatible = "renesas,dmac-r8a77970",
965 "renesas,rcar-dmac";
976 interrupt-names = "error",
980 clock-names = "fck";
981 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
983 #dma-cells = <1>;
984 dma-channels = <8>;
992 compatible = "renesas,ipmmu-r8a77970";
994 renesas,ipmmu-main = <&ipmmu_mm 0>;
995 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
996 #iommu-cells = <1>;
1000 compatible = "renesas,ipmmu-r8a77970";
1002 renesas,ipmmu-main = <&ipmmu_mm 3>;
1003 power-domains = <&sysc R8A77970_PD_A3IR>;
1004 #iommu-cells = <1>;
1008 compatible = "renesas,ipmmu-r8a77970";
1012 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1013 #iommu-cells = <1>;
1017 compatible = "renesas,ipmmu-r8a77970";
1019 renesas,ipmmu-main = <&ipmmu_mm 7>;
1020 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1021 #iommu-cells = <1>;
1025 compatible = "renesas,ipmmu-r8a77970";
1027 renesas,ipmmu-main = <&ipmmu_mm 9>;
1028 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1029 #iommu-cells = <1>;
1033 compatible = "renesas,sdhi-r8a77970",
1034 "renesas,rcar-gen3-sdhi";
1038 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1040 max-frequency = <200000000>;
1046 compatible = "renesas,r8a77970-rpc-if",
1047 "renesas,rcar-gen3-rpc-if";
1051 reg-names = "regs", "dirmap", "wbuf";
1054 clock-names = "rpc";
1055 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1057 #address-cells = <1>;
1058 #size-cells = <0>;
1062 gic: interrupt-controller@f1010000 {
1063 compatible = "arm,gic-400";
1064 #interrupt-cells = <3>;
1065 #address-cells = <0>;
1066 interrupt-controller;
1074 clock-names = "clk";
1075 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1084 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1093 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1098 compatible = "renesas,r8a77970-csi2";
1102 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1107 #address-cells = <1>;
1108 #size-cells = <0>;
1115 #address-cells = <1>;
1116 #size-cells = <0>;
1122 remote-endpoint = <&vin0csi40>;
1126 remote-endpoint = <&vin1csi40>;
1130 remote-endpoint = <&vin2csi40>;
1134 remote-endpoint = <&vin3csi40>;
1141 compatible = "renesas,du-r8a77970";
1145 clock-names = "du.0";
1146 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1148 reset-names = "du.0";
1154 #address-cells = <1>;
1155 #size-cells = <0>;
1166 remote-endpoint = <&lvds0_in>;
1172 lvds0: lvds-encoder@feb90000 {
1173 compatible = "renesas,r8a77970-lvds";
1176 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1187 remote-endpoint =
1205 thermal-zones {
1206 cpu-thermal {
1207 polling-delay-passive = <250>;
1208 polling-delay = <1000>;
1209 thermal-sensors = <&thermal>;
1211 cooling-maps {
1215 cpu-crit {
1225 compatible = "arm,armv8-timer";
1226 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,