Lines Matching +full:polling +full:- +full:delay +full:- +full:passive
1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/interconnect/qcom,sm8350.h>
10 #include <dt-bindings/mailbox/qcom-ipcc.h>
11 #include <dt-bindings/power/qcom-aoss-qmp.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
14 #include <dt-bindings/thermal/thermal.h>
15 #include <dt-bindings/interconnect/qcom,sm8350.h>
18 interrupt-parent = <&intc>;
20 #address-cells = <2>;
21 #size-cells = <2>;
26 xo_board: xo-board {
27 compatible = "fixed-clock";
28 #clock-cells = <0>;
29 clock-frequency = <38400000>;
30 clock-output-names = "xo_board";
33 sleep_clk: sleep-clk {
34 compatible = "fixed-clock";
35 clock-frequency = <32000>;
36 #clock-cells = <0>;
41 #address-cells = <2>;
42 #size-cells = <0>;
48 enable-method = "psci";
49 next-level-cache = <&L2_0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
51 #cooling-cells = <2>;
52 L2_0: l2-cache {
54 next-level-cache = <&L3_0>;
55 L3_0: l3-cache {
65 enable-method = "psci";
66 next-level-cache = <&L2_100>;
67 qcom,freq-domain = <&cpufreq_hw 0>;
68 #cooling-cells = <2>;
69 L2_100: l2-cache {
71 next-level-cache = <&L3_0>;
79 enable-method = "psci";
80 next-level-cache = <&L2_200>;
81 qcom,freq-domain = <&cpufreq_hw 0>;
82 #cooling-cells = <2>;
83 L2_200: l2-cache {
85 next-level-cache = <&L3_0>;
93 enable-method = "psci";
94 next-level-cache = <&L2_300>;
95 qcom,freq-domain = <&cpufreq_hw 0>;
96 #cooling-cells = <2>;
97 L2_300: l2-cache {
99 next-level-cache = <&L3_0>;
107 enable-method = "psci";
108 next-level-cache = <&L2_400>;
109 qcom,freq-domain = <&cpufreq_hw 1>;
110 #cooling-cells = <2>;
111 L2_400: l2-cache {
113 next-level-cache = <&L3_0>;
121 enable-method = "psci";
122 next-level-cache = <&L2_500>;
123 qcom,freq-domain = <&cpufreq_hw 1>;
124 #cooling-cells = <2>;
125 L2_500: l2-cache {
127 next-level-cache = <&L3_0>;
136 enable-method = "psci";
137 next-level-cache = <&L2_600>;
138 qcom,freq-domain = <&cpufreq_hw 1>;
139 #cooling-cells = <2>;
140 L2_600: l2-cache {
142 next-level-cache = <&L3_0>;
150 enable-method = "psci";
151 next-level-cache = <&L2_700>;
152 qcom,freq-domain = <&cpufreq_hw 2>;
153 #cooling-cells = <2>;
154 L2_700: l2-cache {
156 next-level-cache = <&L3_0>;
163 compatible = "qcom,scm-sm8350", "qcom,scm";
164 #reset-cells = <1>;
175 compatible = "arm,armv8-pmuv3";
180 compatible = "arm,psci-1.0";
184 reserved_memory: reserved-memory {
185 #address-cells = <2>;
186 #size-cells = <2>;
191 no-map;
195 no-map;
200 compatible = "qcom,cmd-db";
202 no-map;
207 no-map;
212 no-map;
217 no-map;
222 no-map;
227 no-map;
232 no-map;
237 no-map;
242 no-map;
247 no-map;
252 no-map;
257 no-map;
262 no-map;
267 no-map;
272 no-map;
277 no-map;
281 compatible = "qcom,rmtfs-mem";
283 no-map;
285 qcom,client-id = <1>;
291 no-map;
296 no-map;
301 no-map;
306 no-map;
311 no-map;
316 no-map;
322 memory-region = <&smem_mem>;
326 smp2p-adsp {
329 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
335 qcom,local-pid = <0>;
336 qcom,remote-pid = <2>;
338 smp2p_adsp_out: master-kernel {
339 qcom,entry-name = "master-kernel";
340 #qcom,smem-state-cells = <1>;
343 smp2p_adsp_in: slave-kernel {
344 qcom,entry-name = "slave-kernel";
345 interrupt-controller;
346 #interrupt-cells = <2>;
350 smp2p-cdsp {
353 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
359 qcom,local-pid = <0>;
360 qcom,remote-pid = <5>;
362 smp2p_cdsp_out: master-kernel {
363 qcom,entry-name = "master-kernel";
364 #qcom,smem-state-cells = <1>;
367 smp2p_cdsp_in: slave-kernel {
368 qcom,entry-name = "slave-kernel";
369 interrupt-controller;
370 #interrupt-cells = <2>;
374 smp2p-modem {
377 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
383 qcom,local-pid = <0>;
384 qcom,remote-pid = <1>;
386 smp2p_modem_out: master-kernel {
387 qcom,entry-name = "master-kernel";
388 #qcom,smem-state-cells = <1>;
391 smp2p_modem_in: slave-kernel {
392 qcom,entry-name = "slave-kernel";
393 interrupt-controller;
394 #interrupt-cells = <2>;
397 ipa_smp2p_out: ipa-ap-to-modem {
398 qcom,entry-name = "ipa";
399 #qcom,smem-state-cells = <1>;
402 ipa_smp2p_in: ipa-modem-to-ap {
403 qcom,entry-name = "ipa";
404 interrupt-controller;
405 #interrupt-cells = <2>;
409 smp2p-slpi {
412 interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
418 qcom,local-pid = <0>;
419 qcom,remote-pid = <3>;
421 smp2p_slpi_out: master-kernel {
422 qcom,entry-name = "master-kernel";
423 #qcom,smem-state-cells = <1>;
426 smp2p_slpi_in: slave-kernel {
427 qcom,entry-name = "slave-kernel";
428 interrupt-controller;
429 #interrupt-cells = <2>;
434 #address-cells = <2>;
435 #size-cells = <2>;
437 dma-ranges = <0 0 0 0 0x10 0>;
438 compatible = "simple-bus";
440 gcc: clock-controller@100000 {
441 compatible = "qcom,gcc-sm8350";
443 #clock-cells = <1>;
444 #reset-cells = <1>;
445 #power-domain-cells = <1>;
446 clock-names = "bi_tcxo", "sleep_clk";
451 compatible = "qcom,sm8350-ipcc", "qcom,ipcc";
454 interrupt-controller;
455 #interrupt-cells = <3>;
456 #mbox-cells = <2>;
460 compatible = "qcom,geni-se-qup";
462 clock-names = "m-ahb", "s-ahb";
465 #address-cells = <2>;
466 #size-cells = <2>;
471 compatible = "qcom,geni-debug-uart";
473 clock-names = "se";
475 pinctrl-names = "default";
476 pinctrl-0 = <&qup_uart3_default_state>;
478 #address-cells = <1>;
479 #size-cells = <0>;
485 compatible = "qcom,geni-se-qup";
487 clock-names = "m-ahb", "s-ahb";
490 #address-cells = <2>;
491 #size-cells = <2>;
496 compatible = "qcom,geni-i2c";
498 clock-names = "se";
500 pinctrl-names = "default";
501 pinctrl-0 = <&qup_i2c13_default_state>;
503 #address-cells = <1>;
504 #size-cells = <0>;
510 compatible = "qcom,sm8350-smmu-500", "arm,mmu-500";
512 #iommu-cells = <2>;
513 #global-interrupts = <2>;
615 compatible = "qcom,sm8350-config-noc";
617 #interconnect-cells = <1>;
618 qcom,bcm-voters = <&apps_bcm_voter>;
622 compatible = "qcom,sm8350-mc-virt";
624 #interconnect-cells = <1>;
625 qcom,bcm-voters = <&apps_bcm_voter>;
629 compatible = "qcom,sm8350-system-noc";
631 #interconnect-cells = <1>;
632 qcom,bcm-voters = <&apps_bcm_voter>;
636 compatible = "qcom,sm8350-aggre1-noc";
638 #interconnect-cells = <1>;
639 qcom,bcm-voters = <&apps_bcm_voter>;
643 compatible = "qcom,sm8350-aggre2-noc";
645 #interconnect-cells = <1>;
646 qcom,bcm-voters = <&apps_bcm_voter>;
650 compatible = "qcom,sm8350-mmss-noc";
652 #interconnect-cells = <1>;
653 qcom,bcm-voters = <&apps_bcm_voter>;
657 compatible = "qcom,sm8350-lpass-ag-noc";
659 #interconnect-cells = <1>;
660 qcom,bcm-voters = <&apps_bcm_voter>;
664 compatible = "qcom,sm8350-compute-noc";
666 #interconnect-cells = <1>;
667 qcom,bcm-voters = <&apps_bcm_voter>;
671 compatible = "qcom,sm8350-ipa";
678 reg-names = "ipa-reg",
679 "ipa-shared",
682 interrupts-extended = <&intc GIC_SPI 655 IRQ_TYPE_EDGE_RISING>,
686 interrupt-names = "ipa",
688 "ipa-clock-query",
689 "ipa-setup-ready";
692 clock-names = "core";
696 interconnect-names = "memory",
699 qcom,smem-states = <&ipa_smp2p_out 0>,
701 qcom,smem-state-names = "ipa-clock-enabled-valid",
702 "ipa-clock-enabled";
708 compatible = "qcom,tcsr-mutex";
710 #hwlock-cells = <1>;
714 compatible = "qcom,sm8350-mpss-pas";
717 interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
723 interrupt-names = "wdog", "fatal", "ready", "handover",
724 "stop-ack", "shutdown-ack";
727 clock-names = "xo";
729 power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>,
732 power-domain-names = "load_state", "cx", "mss";
736 memory-region = <&pil_modem_mem>;
738 qcom,smem-states = <&smp2p_modem_out 0>;
739 qcom,smem-state-names = "stop";
743 glink-edge {
744 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
751 qcom,remote-pid = <1>;
755 pdc: interrupt-controller@b220000 {
756 compatible = "qcom,sm8350-pdc", "qcom,pdc";
758 qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>, <55 306 4>,
762 #interrupt-cells = <2>;
763 interrupt-parent = <&intc>;
764 interrupt-controller;
767 tsens0: thermal-sensor@c263000 {
768 compatible = "qcom,sm8350-tsens", "qcom,tsens-v2";
774 interrupt-names = "uplow", "critical";
775 #thermal-sensor-cells = <1>;
778 tsens1: thermal-sensor@c265000 {
779 compatible = "qcom,sm8350-tsens", "qcom,tsens-v2";
785 interrupt-names = "uplow", "critical";
786 #thermal-sensor-cells = <1>;
789 aoss_qmp: power-controller@c300000 {
790 compatible = "qcom,sm8350-aoss-qmp";
792 interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
796 #clock-cells = <0>;
797 #power-domain-cells = <1>;
801 compatible = "qcom,spmi-pmic-arb";
807 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
808 interrupt-names = "periph_irq";
809 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
812 #address-cells = <2>;
813 #size-cells = <0>;
814 interrupt-controller;
815 #interrupt-cells = <4>;
819 compatible = "qcom,sm8350-tlmm";
822 gpio-controller;
823 #gpio-cells = <2>;
824 interrupt-controller;
825 #interrupt-cells = <2>;
826 gpio-ranges = <&tlmm 0 0 204>;
827 wakeup-parent = <&pdc>;
829 qup_uart3_default_state: qup-uart3-default-state {
840 qup_i2c13_default_state: qup-i2c13-default-state {
848 drive-strength = <2>;
849 bias-pull-up;
855 compatible = "qcom,prng-ee";
858 clock-names = "core";
861 intc: interrupt-controller@17a00000 {
862 compatible = "arm,gic-v3";
863 #interrupt-cells = <3>;
864 interrupt-controller;
871 compatible = "arm,armv7-timer-mem";
872 #address-cells = <2>;
873 #size-cells = <2>;
876 clock-frequency = <19200000>;
879 frame-number = <0>;
887 frame-number = <1>;
894 frame-number = <2>;
901 frame-number = <3>;
908 frame-number = <4>;
915 frame-number = <5>;
922 frame-number = <6>;
931 compatible = "qcom,rpmh-rsc";
935 reg-names = "drv-0", "drv-1", "drv-2";
939 qcom,tcs-offset = <0xd00>;
940 qcom,drv-id = <2>;
941 qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
944 rpmhcc: clock-controller {
945 compatible = "qcom,sm8350-rpmh-clk";
946 #clock-cells = <1>;
947 clock-names = "xo";
951 rpmhpd: power-controller {
952 compatible = "qcom,sm8350-rpmhpd";
953 #power-domain-cells = <1>;
954 operating-points-v2 = <&rpmhpd_opp_table>;
956 rpmhpd_opp_table: opp-table {
957 compatible = "operating-points-v2";
960 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
964 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
968 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
972 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
976 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
980 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
984 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
988 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
992 opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
996 opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
1002 compatible = "qcom,bcm-voter";
1007 compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss";
1011 reg-names = "freq-domain0", "freq-domain1", "freq-domain2";
1014 clock-names = "xo", "alternate";
1016 #freq-domain-cells = <1>;
1020 compatible = "qcom,sm8350-ufshc", "qcom,ufshc",
1021 "jedec,ufs-2.0";
1025 phy-names = "ufsphy";
1026 lanes-per-direction = <2>;
1027 #reset-cells = <1>;
1029 reset-names = "rst";
1031 power-domains = <&gcc UFS_PHY_GDSC>;
1035 clock-names =
1055 freq-table-hz =
1069 compatible = "qcom,sm8350-qmp-ufs-phy";
1071 #address-cells = <2>;
1072 #size-cells = <2>;
1073 #clock-cells = <1>;
1075 clock-names = "ref",
1081 reset-names = "ufsphy";
1090 #phy-cells = <0>;
1091 #clock-cells = <0>;
1096 compatible = "qcom,sm8350-slpi-pas";
1099 interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
1104 interrupt-names = "wdog", "fatal", "ready",
1105 "handover", "stop-ack";
1108 clock-names = "xo";
1110 power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>,
1113 power-domain-names = "load_state", "lcx", "lmx";
1115 memory-region = <&pil_slpi_mem>;
1117 qcom,smem-states = <&smp2p_slpi_out 0>;
1118 qcom,smem-state-names = "stop";
1122 glink-edge {
1123 interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
1130 qcom,remote-pid = <3>;
1136 compatible = "qcom,sm8350-cdsp-pas";
1139 interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
1144 interrupt-names = "wdog", "fatal", "ready",
1145 "handover", "stop-ack";
1148 clock-names = "xo";
1150 power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>,
1153 power-domain-names = "load_state", "cx", "mxc";
1157 memory-region = <&pil_cdsp_mem>;
1159 qcom,smem-states = <&smp2p_cdsp_out 0>;
1160 qcom,smem-state-names = "stop";
1164 glink-edge {
1165 interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
1172 qcom,remote-pid = <5>;
1177 compatible = "qcom,sm8350-usb-hs-phy",
1178 "qcom,usb-snps-hs-7nm-phy";
1181 #phy-cells = <0>;
1184 clock-names = "ref";
1190 compatible = "qcom,sm8250-usb-hs-phy",
1191 "qcom,usb-snps-hs-7nm-phy";
1194 #phy-cells = <0>;
1197 clock-names = "ref";
1202 usb_1_qmpphy: phy-wrapper@88e9000 {
1203 compatible = "qcom,sm8350-qmp-usb3-phy";
1206 reg-names = "reg-base", "dp_com";
1208 #clock-cells = <1>;
1209 #address-cells = <2>;
1210 #size-cells = <2>;
1216 clock-names = "aux", "ref_clk_src", "com_aux";
1220 reset-names = "phy", "common";
1229 #phy-cells = <0>;
1230 #clock-cells = <1>;
1232 clock-names = "pipe0";
1233 clock-output-names = "usb3_phy_pipe_clk_src";
1237 usb_2_qmpphy: phy-wrapper@88eb000 {
1238 compatible = "qcom,sm8350-qmp-usb3-uni-phy";
1241 #clock-cells = <1>;
1242 #address-cells = <2>;
1243 #size-cells = <2>;
1250 clock-names = "aux", "ref_clk_src", "ref", "com_aux";
1254 reset-names = "phy", "common";
1260 #phy-cells = <0>;
1261 #clock-cells = <1>;
1263 clock-names = "pipe0";
1264 clock-output-names = "usb3_uni_phy_pipe_clk_src";
1269 compatible = "qcom,sm8350-dc-noc";
1271 #interconnect-cells = <1>;
1272 qcom,bcm-voters = <&apps_bcm_voter>;
1276 compatible = "qcom,sm8350-gem-noc";
1278 #interconnect-cells = <1>;
1279 qcom,bcm-voters = <&apps_bcm_voter>;
1283 compatible = "qcom,sm8350-dwc3", "qcom,dwc3";
1286 #address-cells = <2>;
1287 #size-cells = <2>;
1295 clock-names = "cfg_noc", "core", "iface", "mock_utmi",
1298 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
1300 assigned-clock-rates = <19200000>, <200000000>;
1302 interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1306 interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
1309 power-domains = <&gcc USB30_PRIM_GDSC>;
1321 phy-names = "usb2-phy", "usb3-phy";
1326 compatible = "qcom,sm8350-dwc3", "qcom,dwc3";
1329 #address-cells = <2>;
1330 #size-cells = <2>;
1339 clock-names = "cfg_noc", "core", "iface", "mock_utmi",
1342 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
1344 assigned-clock-rates = <19200000>, <200000000>;
1346 interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
1350 interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
1353 power-domains = <&gcc USB30_SEC_GDSC>;
1365 phy-names = "usb2-phy", "usb3-phy";
1370 compatible = "qcom,sm8350-adsp-pas";
1373 interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
1378 interrupt-names = "wdog", "fatal", "ready",
1379 "handover", "stop-ack";
1382 clock-names = "xo";
1384 power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>,
1387 power-domain-names = "load_state", "lcx", "lmx";
1389 memory-region = <&pil_adsp_mem>;
1391 qcom,smem-states = <&smp2p_adsp_out 0>;
1392 qcom,smem-state-names = "stop";
1396 glink-edge {
1397 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
1404 qcom,remote-pid = <2>;
1409 thermal_zones: thermal-zones {
1410 cpu0-thermal {
1411 polling-delay-passive = <250>;
1412 polling-delay = <1000>;
1414 thermal-sensors = <&tsens0 1>;
1417 cpu0_alert0: trip-point0 {
1420 type = "passive";
1423 cpu0_alert1: trip-point1 {
1426 type = "passive";
1436 cooling-maps {
1439 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1446 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1454 cpu1-thermal {
1455 polling-delay-passive = <250>;
1456 polling-delay = <1000>;
1458 thermal-sensors = <&tsens0 2>;
1461 cpu1_alert0: trip-point0 {
1464 type = "passive";
1467 cpu1_alert1: trip-point1 {
1470 type = "passive";
1480 cooling-maps {
1483 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1490 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1498 cpu2-thermal {
1499 polling-delay-passive = <250>;
1500 polling-delay = <1000>;
1502 thermal-sensors = <&tsens0 3>;
1505 cpu2_alert0: trip-point0 {
1508 type = "passive";
1511 cpu2_alert1: trip-point1 {
1514 type = "passive";
1524 cooling-maps {
1527 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1534 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1542 cpu3-thermal {
1543 polling-delay-passive = <250>;
1544 polling-delay = <1000>;
1546 thermal-sensors = <&tsens0 4>;
1549 cpu3_alert0: trip-point0 {
1552 type = "passive";
1555 cpu3_alert1: trip-point1 {
1558 type = "passive";
1568 cooling-maps {
1571 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1578 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1586 cpu4-top-thermal {
1587 polling-delay-passive = <250>;
1588 polling-delay = <1000>;
1590 thermal-sensors = <&tsens0 7>;
1593 cpu4_top_alert0: trip-point0 {
1596 type = "passive";
1599 cpu4_top_alert1: trip-point1 {
1602 type = "passive";
1612 cooling-maps {
1615 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1622 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1630 cpu5-top-thermal {
1631 polling-delay-passive = <250>;
1632 polling-delay = <1000>;
1634 thermal-sensors = <&tsens0 8>;
1637 cpu5_top_alert0: trip-point0 {
1640 type = "passive";
1643 cpu5_top_alert1: trip-point1 {
1646 type = "passive";
1656 cooling-maps {
1659 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1666 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1674 cpu6-top-thermal {
1675 polling-delay-passive = <250>;
1676 polling-delay = <1000>;
1678 thermal-sensors = <&tsens0 9>;
1681 cpu6_top_alert0: trip-point0 {
1684 type = "passive";
1687 cpu6_top_alert1: trip-point1 {
1690 type = "passive";
1700 cooling-maps {
1703 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1710 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1718 cpu7-top-thermal {
1719 polling-delay-passive = <250>;
1720 polling-delay = <1000>;
1722 thermal-sensors = <&tsens0 10>;
1725 cpu7_top_alert0: trip-point0 {
1728 type = "passive";
1731 cpu7_top_alert1: trip-point1 {
1734 type = "passive";
1744 cooling-maps {
1747 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1754 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1762 cpu4-bottom-thermal {
1763 polling-delay-passive = <250>;
1764 polling-delay = <1000>;
1766 thermal-sensors = <&tsens0 11>;
1769 cpu4_bottom_alert0: trip-point0 {
1772 type = "passive";
1775 cpu4_bottom_alert1: trip-point1 {
1778 type = "passive";
1788 cooling-maps {
1791 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1798 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1806 cpu5-bottom-thermal {
1807 polling-delay-passive = <250>;
1808 polling-delay = <1000>;
1810 thermal-sensors = <&tsens0 12>;
1813 cpu5_bottom_alert0: trip-point0 {
1816 type = "passive";
1819 cpu5_bottom_alert1: trip-point1 {
1822 type = "passive";
1832 cooling-maps {
1835 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1842 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1850 cpu6-bottom-thermal {
1851 polling-delay-passive = <250>;
1852 polling-delay = <1000>;
1854 thermal-sensors = <&tsens0 13>;
1857 cpu6_bottom_alert0: trip-point0 {
1860 type = "passive";
1863 cpu6_bottom_alert1: trip-point1 {
1866 type = "passive";
1876 cooling-maps {
1879 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1886 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1894 cpu7-bottom-thermal {
1895 polling-delay-passive = <250>;
1896 polling-delay = <1000>;
1898 thermal-sensors = <&tsens0 14>;
1901 cpu7_bottom_alert0: trip-point0 {
1904 type = "passive";
1907 cpu7_bottom_alert1: trip-point1 {
1910 type = "passive";
1920 cooling-maps {
1923 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1930 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1938 aoss0-thermal {
1939 polling-delay-passive = <250>;
1940 polling-delay = <1000>;
1942 thermal-sensors = <&tsens0 0>;
1945 aoss0_alert0: trip-point0 {
1953 cluster0-thermal {
1954 polling-delay-passive = <250>;
1955 polling-delay = <1000>;
1957 thermal-sensors = <&tsens0 5>;
1960 cluster0_alert0: trip-point0 {
1973 cluster1-thermal {
1974 polling-delay-passive = <250>;
1975 polling-delay = <1000>;
1977 thermal-sensors = <&tsens0 6>;
1980 cluster1_alert0: trip-point0 {
1993 aoss1-thermal {
1994 polling-delay-passive = <250>;
1995 polling-delay = <1000>;
1997 thermal-sensors = <&tsens1 0>;
2000 aoss1_alert0: trip-point0 {
2008 gpu-thermal-top {
2009 polling-delay-passive = <250>;
2010 polling-delay = <1000>;
2012 thermal-sensors = <&tsens1 1>;
2015 gpu1_alert0: trip-point0 {
2023 gpu-thermal-bottom {
2024 polling-delay-passive = <250>;
2025 polling-delay = <1000>;
2027 thermal-sensors = <&tsens1 2>;
2030 gpu2_alert0: trip-point0 {
2038 nspss1-thermal {
2039 polling-delay-passive = <250>;
2040 polling-delay = <1000>;
2042 thermal-sensors = <&tsens1 3>;
2045 nspss1_alert0: trip-point0 {
2053 nspss2-thermal {
2054 polling-delay-passive = <250>;
2055 polling-delay = <1000>;
2057 thermal-sensors = <&tsens1 4>;
2060 nspss2_alert0: trip-point0 {
2068 nspss3-thermal {
2069 polling-delay-passive = <250>;
2070 polling-delay = <1000>;
2072 thermal-sensors = <&tsens1 5>;
2075 nspss3_alert0: trip-point0 {
2083 video-thermal {
2084 polling-delay-passive = <250>;
2085 polling-delay = <1000>;
2087 thermal-sensors = <&tsens1 6>;
2090 video_alert0: trip-point0 {
2098 mem-thermal {
2099 polling-delay-passive = <250>;
2100 polling-delay = <1000>;
2102 thermal-sensors = <&tsens1 7>;
2105 mem_alert0: trip-point0 {
2113 modem1-thermal-top {
2114 polling-delay-passive = <250>;
2115 polling-delay = <1000>;
2117 thermal-sensors = <&tsens1 8>;
2120 modem1_alert0: trip-point0 {
2128 modem2-thermal-top {
2129 polling-delay-passive = <250>;
2130 polling-delay = <1000>;
2132 thermal-sensors = <&tsens1 9>;
2135 modem2_alert0: trip-point0 {
2143 modem3-thermal-top {
2144 polling-delay-passive = <250>;
2145 polling-delay = <1000>;
2147 thermal-sensors = <&tsens1 10>;
2150 modem3_alert0: trip-point0 {
2158 modem4-thermal-top {
2159 polling-delay-passive = <250>;
2160 polling-delay = <1000>;
2162 thermal-sensors = <&tsens1 11>;
2165 modem4_alert0: trip-point0 {
2173 camera-thermal-top {
2174 polling-delay-passive = <250>;
2175 polling-delay = <1000>;
2177 thermal-sensors = <&tsens1 12>;
2180 camera1_alert0: trip-point0 {
2188 camera-thermal-bottom {
2189 polling-delay-passive = <250>;
2190 polling-delay = <1000>;
2192 thermal-sensors = <&tsens1 13>;
2195 camera2_alert0: trip-point0 {
2205 compatible = "arm,armv8-timer";