Lines Matching +full:0 +full:x5c000000
22 #clock-cells = <0>;
29 #clock-cells = <0>;
37 #size-cells = <0>;
39 CPU0: cpu@0 {
42 reg = <0x0 0x0>;
54 reg = <0x0 0x1>;
63 reg = <0x0 0x2>;
72 reg = <0x0 0x3>;
81 reg = <0x0 0x100>;
93 reg = <0x0 0x101>;
102 reg = <0x0 0x102>;
111 reg = <0x0 0x103>;
165 reg = <0x0 0x40000000 0x0 0x0>;
185 reg = <0x0 0x45700000 0x0 0x600000>;
190 reg = <0x0 0x45e00000 0x0 0x140000>;
195 reg = <0x0 0x45fff000 0x0 0x1000>;
200 reg = <0x0 0x46000000 0x0 0x200000>;
205 reg = <0x0 0x46200000 0x0 0x2d00000>;
210 reg = <0x0 0x4ab00000 0x0 0x500000>;
215 reg = <0x0 0x4b000000 0x0 0x7e00000>;
220 reg = <0x0 0x52e00000 0x0 0x500000>;
225 reg = <0x0 0x53300000 0x0 0x200000>;
230 reg = <0x0 0x53500000 0x0 0x1e00000>;
235 reg = <0x0 0x55300000 0x0 0x1e00000>;
240 reg = <0x0 0x57100000 0x0 0x10000>;
245 reg = <0x0 0x57110000 0x0 0x5000>;
250 reg = <0x0 0x57115000 0x0 0x2000>;
255 reg = <0x0 0x5c000000 0x0 0x00f00000>;
260 reg = <0x0 0x5cf00000 0x0 0x0100000>;
265 reg = <0x0 0x5f800000 0x0 0x1e00000>;
270 reg = <0x0 0x5e400000 0x0 0x1400000>;
275 reg = <0x0 0xf3000000 0x0 0x400000>;
280 reg = <0x0 0xf3400000 0x0 0x800000>;
285 reg = <0x1 0x3fc00000 0x0 0x400000>;
295 mboxes = <&apcs_glb 0>;
317 ranges = <0x00 0x00 0x00 0xffffffff>;
322 reg = <0x00340000 0x20000>;
328 reg = <0x00500000 0x400000>,
329 <0x00900000 0x400000>,
330 <0x00d00000 0x400000>;
334 gpio-ranges = <&tlmm 0 0 134>;
362 reg = <0x01400000 0x1f0000>;
372 reg = <0x01613000 0x180>;
373 #phy-cells = <0>;
385 reg = <0x045f0000 0x7000>;
390 reg = <0x04744000 0x1000>, <0x04745000 0x1000>;
408 reg = <0x04784000 0x1000>;
420 pinctrl-0 = <&sdc2_state_on>;
430 reg = <0x04ef8800 0x400>;
452 reg = <0x04e00000 0xcd00>;
465 reg = <0x01c40000 0x1100>,
466 <0x01e00000 0x2000000>,
467 <0x03e00000 0x100000>,
468 <0x03f00000 0xa0000>,
469 <0x01c0a000 0x26000>;
473 qcom,ee = <0>;
474 qcom,channel = <0>;
476 #size-cells = <0>;
479 cell-index = <0>;
484 reg = <0x0f111000 0x1000>;
494 reg = <0x0f120000 0x1000>;
497 frame@0f121000 {
498 frame-number = <0>;
501 reg = <0x0f121000 0x1000>,
502 <0x0f122000 0x1000>;
505 frame@0f123000 {
508 reg = <0x0f123000 0x1000>;
512 frame@0f124000 {
515 reg = <0x0f124000 0x1000>;
522 reg = <0x0f125000 0x1000>;
529 reg = <0x0f126000 0x1000>;
536 reg = <0x0f127000 0x1000>;
543 reg = <0x0f128000 0x1000>;
550 reg = <0x0f200000 0x20000>,
551 <0x0f300000 0x100000>;
560 interrupts = <GIC_PPI 1 0xf08
561 GIC_PPI 2 0xf08
562 GIC_PPI 3 0xf08
563 GIC_PPI 0 0xf08>;