Lines Matching full:mmcc
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
680 <&mmcc AHB_CLK_SRC>;
1367 mmcc: clock-controller@c8c0000 { label
1368 compatible = "qcom,mmcc-sdm630";
1420 power-domains = <&mmcc MDSS_GDSC>;
1422 clocks = <&mmcc MDSS_AHB_CLK>,
1423 <&mmcc MDSS_AXI_CLK>,
1424 <&mmcc MDSS_VSYNC_CLK>,
1425 <&mmcc MDSS_MDP_CLK>;
1449 assigned-clocks = <&mmcc MDSS_MDP_CLK>,
1450 <&mmcc MDSS_VSYNC_CLK>;
1453 clocks = <&mmcc MDSS_AHB_CLK>,
1454 <&mmcc MDSS_AXI_CLK>,
1455 <&mmcc MDSS_MDP_CLK>,
1456 <&mmcc MDSS_VSYNC_CLK>;
1526 assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
1527 <&mmcc PCLK0_CLK_SRC>;
1531 clocks = <&mmcc MDSS_MDP_CLK>,
1532 <&mmcc MDSS_BYTE0_CLK>,
1533 <&mmcc MDSS_BYTE0_INTF_CLK>,
1534 <&mmcc MNOC_AHB_CLK>,
1535 <&mmcc MDSS_AHB_CLK>,
1536 <&mmcc MDSS_AXI_CLK>,
1537 <&mmcc MISC_AHB_CLK>,
1538 <&mmcc MDSS_PCLK0_CLK>,
1539 <&mmcc MDSS_ESC0_CLK>;
1584 clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
1884 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
1885 <&mmcc THROTTLE_CAMSS_AXI_CLK>,
1886 <&mmcc CAMSS_ISPIF_AHB_CLK>,
1887 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
1888 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
1889 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
1890 <&mmcc CAMSS_CSI0_AHB_CLK>,
1891 <&mmcc CAMSS_CSI0_CLK>,
1892 <&mmcc CAMSS_CPHY_CSID0_CLK>,
1893 <&mmcc CAMSS_CSI0PIX_CLK>,
1894 <&mmcc CAMSS_CSI0RDI_CLK>,
1895 <&mmcc CAMSS_CSI1_AHB_CLK>,
1896 <&mmcc CAMSS_CSI1_CLK>,
1897 <&mmcc CAMSS_CPHY_CSID1_CLK>,
1898 <&mmcc CAMSS_CSI1PIX_CLK>,
1899 <&mmcc CAMSS_CSI1RDI_CLK>,
1900 <&mmcc CAMSS_CSI2_AHB_CLK>,
1901 <&mmcc CAMSS_CSI2_CLK>,
1902 <&mmcc CAMSS_CPHY_CSID2_CLK>,
1903 <&mmcc CAMSS_CSI2PIX_CLK>,
1904 <&mmcc CAMSS_CSI2RDI_CLK>,
1905 <&mmcc CAMSS_CSI3_AHB_CLK>,
1906 <&mmcc CAMSS_CSI3_CLK>,
1907 <&mmcc CAMSS_CPHY_CSID3_CLK>,
1908 <&mmcc CAMSS_CSI3PIX_CLK>,
1909 <&mmcc CAMSS_CSI3RDI_CLK>,
1910 <&mmcc CAMSS_AHB_CLK>,
1911 <&mmcc CAMSS_VFE0_CLK>,
1912 <&mmcc CAMSS_CSI_VFE0_CLK>,
1913 <&mmcc CAMSS_VFE0_AHB_CLK>,
1914 <&mmcc CAMSS_VFE0_STREAM_CLK>,
1915 <&mmcc CAMSS_VFE1_CLK>,
1916 <&mmcc CAMSS_CSI_VFE1_CLK>,
1917 <&mmcc CAMSS_VFE1_AHB_CLK>,
1918 <&mmcc CAMSS_VFE1_STREAM_CLK>,
1919 <&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
1920 <&mmcc CAMSS_VFE_VBIF_AXI_CLK>,
1921 <&mmcc CSIPHY_AHB2CRIF_CLK>,
1922 <&mmcc CAMSS_CPHY_CSID0_CLK>,
1923 <&mmcc CAMSS_CPHY_CSID1_CLK>,
1924 <&mmcc CAMSS_CPHY_CSID2_CLK>,
1925 <&mmcc CAMSS_CPHY_CSID3_CLK>;
1974 power-domains = <&mmcc CAMSS_VFE0_GDSC>,
1975 <&mmcc CAMSS_VFE1_GDSC>;
1991 assigned-clocks = <&mmcc CAMSS_CCI_AHB_CLK>,
1992 <&mmcc CAMSS_CCI_CLK>;
1994 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
1995 <&mmcc CAMSS_CCI_AHB_CLK>,
1996 <&mmcc CAMSS_CCI_CLK>,
1997 <&mmcc CAMSS_AHB_CLK>;
2005 power-domains = <&mmcc CAMSS_TOP_GDSC>;
2027 clocks = <&mmcc MNOC_AHB_CLK>,
2028 <&mmcc BIMC_SMMU_AHB_CLK>,
2030 <&mmcc BIMC_SMMU_AXI_CLK>;