Lines Matching +full:phy +full:- +full:qcom +full:- +full:qusb2
1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/gpio/gpio.h>
12 interrupt-parent = <&intc>;
14 qcom,msm-id = <292 0x0>;
16 #address-cells = <2>;
17 #size-cells = <2>;
27 reserved-memory {
28 #address-cells = <2>;
29 #size-cells = <2>;
34 no-map;
39 no-map;
42 smem_mem: smem-mem@86000000 {
44 no-map;
49 no-map;
53 compatible = "qcom,rmtfs-mem";
55 no-map;
57 qcom,client-id = <1>;
58 qcom,vmid = <15>;
63 no-map;
68 no-map;
73 no-map;
78 no-map;
83 no-map;
88 no-map;
93 no-map;
98 no-map;
103 no-map;
108 no-map;
113 xo: xo-board {
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
116 clock-frequency = <19200000>;
117 clock-output-names = "xo_board";
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
123 clock-frequency = <32764>;
128 #address-cells = <2>;
129 #size-cells = <0>;
133 compatible = "qcom,kryo280";
135 enable-method = "psci";
136 capacity-dmips-mhz = <1024>;
137 cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
138 next-level-cache = <&L2_0>;
139 L2_0: l2-cache {
140 compatible = "arm,arch-cache";
141 cache-level = <2>;
143 L1_I_0: l1-icache {
144 compatible = "arm,arch-cache";
146 L1_D_0: l1-dcache {
147 compatible = "arm,arch-cache";
153 compatible = "qcom,kryo280";
155 enable-method = "psci";
156 capacity-dmips-mhz = <1024>;
157 cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
158 next-level-cache = <&L2_0>;
159 L1_I_1: l1-icache {
160 compatible = "arm,arch-cache";
162 L1_D_1: l1-dcache {
163 compatible = "arm,arch-cache";
169 compatible = "qcom,kryo280";
171 enable-method = "psci";
172 capacity-dmips-mhz = <1024>;
173 cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
174 next-level-cache = <&L2_0>;
175 L1_I_2: l1-icache {
176 compatible = "arm,arch-cache";
178 L1_D_2: l1-dcache {
179 compatible = "arm,arch-cache";
185 compatible = "qcom,kryo280";
187 enable-method = "psci";
188 capacity-dmips-mhz = <1024>;
189 cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
190 next-level-cache = <&L2_0>;
191 L1_I_3: l1-icache {
192 compatible = "arm,arch-cache";
194 L1_D_3: l1-dcache {
195 compatible = "arm,arch-cache";
201 compatible = "qcom,kryo280";
203 enable-method = "psci";
204 capacity-dmips-mhz = <1536>;
205 cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
206 next-level-cache = <&L2_1>;
207 L2_1: l2-cache {
208 compatible = "arm,arch-cache";
209 cache-level = <2>;
211 L1_I_100: l1-icache {
212 compatible = "arm,arch-cache";
214 L1_D_100: l1-dcache {
215 compatible = "arm,arch-cache";
221 compatible = "qcom,kryo280";
223 enable-method = "psci";
224 capacity-dmips-mhz = <1536>;
225 cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
226 next-level-cache = <&L2_1>;
227 L1_I_101: l1-icache {
228 compatible = "arm,arch-cache";
230 L1_D_101: l1-dcache {
231 compatible = "arm,arch-cache";
237 compatible = "qcom,kryo280";
239 enable-method = "psci";
240 capacity-dmips-mhz = <1536>;
241 cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
242 next-level-cache = <&L2_1>;
243 L1_I_102: l1-icache {
244 compatible = "arm,arch-cache";
246 L1_D_102: l1-dcache {
247 compatible = "arm,arch-cache";
253 compatible = "qcom,kryo280";
255 enable-method = "psci";
256 capacity-dmips-mhz = <1536>;
257 cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
258 next-level-cache = <&L2_1>;
259 L1_I_103: l1-icache {
260 compatible = "arm,arch-cache";
262 L1_D_103: l1-dcache {
263 compatible = "arm,arch-cache";
267 cpu-map {
305 idle-states {
306 entry-method = "psci";
308 LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
309 compatible = "arm,idle-state";
310 idle-state-name = "little-retention";
311 arm,psci-suspend-param = <0x00000002>;
312 entry-latency-us = <81>;
313 exit-latency-us = <86>;
314 min-residency-us = <200>;
317 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
318 compatible = "arm,idle-state";
319 idle-state-name = "little-power-collapse";
320 arm,psci-suspend-param = <0x40000003>;
321 entry-latency-us = <273>;
322 exit-latency-us = <612>;
323 min-residency-us = <1000>;
324 local-timer-stop;
327 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
328 compatible = "arm,idle-state";
329 idle-state-name = "big-retention";
330 arm,psci-suspend-param = <0x00000002>;
331 entry-latency-us = <79>;
332 exit-latency-us = <82>;
333 min-residency-us = <200>;
336 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
337 compatible = "arm,idle-state";
338 idle-state-name = "big-power-collapse";
339 arm,psci-suspend-param = <0x40000003>;
340 entry-latency-us = <336>;
341 exit-latency-us = <525>;
342 min-residency-us = <1000>;
343 local-timer-stop;
350 compatible = "qcom,scm-msm8998", "qcom,scm";
355 compatible = "qcom,tcsr-mutex";
357 #hwlock-cells = <1>;
361 compatible = "arm,psci-1.0";
365 rpm-glink {
366 compatible = "qcom,glink-rpm";
369 qcom,rpm-msg-ram = <&rpm_msg_ram>;
372 rpm_requests: rpm-requests {
373 compatible = "qcom,rpm-msm8998";
374 qcom,glink-channels = "rpm_requests";
376 rpmcc: clock-controller {
377 compatible = "qcom,rpmcc-msm8998", "qcom,rpmcc";
378 #clock-cells = <1>;
381 rpmpd: power-controller {
382 compatible = "qcom,msm8998-rpmpd";
383 #power-domain-cells = <1>;
384 operating-points-v2 = <&rpmpd_opp_table>;
386 rpmpd_opp_table: opp-table {
387 compatible = "operating-points-v2";
390 opp-level = <RPM_SMD_LEVEL_RETENTION>;
394 opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
398 opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
402 opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
406 opp-level = <RPM_SMD_LEVEL_SVS>;
410 opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
414 opp-level = <RPM_SMD_LEVEL_NOM>;
418 opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
422 opp-level = <RPM_SMD_LEVEL_TURBO>;
426 opp-level = <RPM_SMD_LEVEL_BINNING>;
434 compatible = "qcom,smem";
435 memory-region = <&smem_mem>;
439 smp2p-lpass {
440 compatible = "qcom,smp2p";
441 qcom,smem = <443>, <429>;
447 qcom,local-pid = <0>;
448 qcom,remote-pid = <2>;
450 adsp_smp2p_out: master-kernel {
451 qcom,entry-name = "master-kernel";
452 #qcom,smem-state-cells = <1>;
455 adsp_smp2p_in: slave-kernel {
456 qcom,entry-name = "slave-kernel";
458 interrupt-controller;
459 #interrupt-cells = <2>;
463 smp2p-mpss {
464 compatible = "qcom,smp2p";
465 qcom,smem = <435>, <428>;
468 qcom,local-pid = <0>;
469 qcom,remote-pid = <1>;
471 modem_smp2p_out: master-kernel {
472 qcom,entry-name = "master-kernel";
473 #qcom,smem-state-cells = <1>;
476 modem_smp2p_in: slave-kernel {
477 qcom,entry-name = "slave-kernel";
478 interrupt-controller;
479 #interrupt-cells = <2>;
483 smp2p-slpi {
484 compatible = "qcom,smp2p";
485 qcom,smem = <481>, <430>;
488 qcom,local-pid = <0>;
489 qcom,remote-pid = <3>;
491 slpi_smp2p_out: master-kernel {
492 qcom,entry-name = "master-kernel";
493 #qcom,smem-state-cells = <1>;
496 slpi_smp2p_in: slave-kernel {
497 qcom,entry-name = "slave-kernel";
498 interrupt-controller;
499 #interrupt-cells = <2>;
503 thermal-zones {
504 cpu0-thermal {
505 polling-delay-passive = <250>;
506 polling-delay = <1000>;
508 thermal-sensors = <&tsens0 1>;
511 cpu0_alert0: trip-point0 {
525 cpu1-thermal {
526 polling-delay-passive = <250>;
527 polling-delay = <1000>;
529 thermal-sensors = <&tsens0 2>;
532 cpu1_alert0: trip-point0 {
546 cpu2-thermal {
547 polling-delay-passive = <250>;
548 polling-delay = <1000>;
550 thermal-sensors = <&tsens0 3>;
553 cpu2_alert0: trip-point0 {
567 cpu3-thermal {
568 polling-delay-passive = <250>;
569 polling-delay = <1000>;
571 thermal-sensors = <&tsens0 4>;
574 cpu3_alert0: trip-point0 {
588 cpu4-thermal {
589 polling-delay-passive = <250>;
590 polling-delay = <1000>;
592 thermal-sensors = <&tsens0 7>;
595 cpu4_alert0: trip-point0 {
609 cpu5-thermal {
610 polling-delay-passive = <250>;
611 polling-delay = <1000>;
613 thermal-sensors = <&tsens0 8>;
616 cpu5_alert0: trip-point0 {
630 cpu6-thermal {
631 polling-delay-passive = <250>;
632 polling-delay = <1000>;
634 thermal-sensors = <&tsens0 9>;
637 cpu6_alert0: trip-point0 {
651 cpu7-thermal {
652 polling-delay-passive = <250>;
653 polling-delay = <1000>;
655 thermal-sensors = <&tsens0 10>;
658 cpu7_alert0: trip-point0 {
672 gpu-thermal-bottom {
673 polling-delay-passive = <250>;
674 polling-delay = <1000>;
676 thermal-sensors = <&tsens0 12>;
679 gpu1_alert0: trip-point0 {
687 gpu-thermal-top {
688 polling-delay-passive = <250>;
689 polling-delay = <1000>;
691 thermal-sensors = <&tsens0 13>;
694 gpu2_alert0: trip-point0 {
702 clust0-mhm-thermal {
703 polling-delay-passive = <250>;
704 polling-delay = <1000>;
706 thermal-sensors = <&tsens0 5>;
709 cluster0_mhm_alert0: trip-point0 {
717 clust1-mhm-thermal {
718 polling-delay-passive = <250>;
719 polling-delay = <1000>;
721 thermal-sensors = <&tsens0 6>;
724 cluster1_mhm_alert0: trip-point0 {
732 cluster1-l2-thermal {
733 polling-delay-passive = <250>;
734 polling-delay = <1000>;
736 thermal-sensors = <&tsens0 11>;
739 cluster1_l2_alert0: trip-point0 {
747 modem-thermal {
748 polling-delay-passive = <250>;
749 polling-delay = <1000>;
751 thermal-sensors = <&tsens1 1>;
754 modem_alert0: trip-point0 {
762 mem-thermal {
763 polling-delay-passive = <250>;
764 polling-delay = <1000>;
766 thermal-sensors = <&tsens1 2>;
769 mem_alert0: trip-point0 {
777 wlan-thermal {
778 polling-delay-passive = <250>;
779 polling-delay = <1000>;
781 thermal-sensors = <&tsens1 3>;
784 wlan_alert0: trip-point0 {
792 q6-dsp-thermal {
793 polling-delay-passive = <250>;
794 polling-delay = <1000>;
796 thermal-sensors = <&tsens1 4>;
799 q6_dsp_alert0: trip-point0 {
807 camera-thermal {
808 polling-delay-passive = <250>;
809 polling-delay = <1000>;
811 thermal-sensors = <&tsens1 5>;
814 camera_alert0: trip-point0 {
822 multimedia-thermal {
823 polling-delay-passive = <250>;
824 polling-delay = <1000>;
826 thermal-sensors = <&tsens1 6>;
829 multimedia_alert0: trip-point0 {
839 compatible = "arm,armv8-timer";
847 #address-cells = <1>;
848 #size-cells = <1>;
850 compatible = "simple-bus";
852 gcc: clock-controller@100000 {
853 compatible = "qcom,gcc-msm8998";
854 #clock-cells = <1>;
855 #reset-cells = <1>;
856 #power-domain-cells = <1>;
861 compatible = "qcom,rpm-msg-ram";
866 compatible = "qcom,qfprom";
868 #address-cells = <1>;
869 #size-cells = <1>;
871 qusb2_hstx_trim: hstx-trim@423a {
878 compatible = "qcom,msm8998-tsens", "qcom,tsens-v2";
881 #qcom,sensors = <14>;
884 interrupt-names = "uplow", "critical";
885 #thermal-sensor-cells = <1>;
889 compatible = "qcom,msm8998-tsens", "qcom,tsens-v2";
892 #qcom,sensors = <8>;
895 interrupt-names = "uplow", "critical";
896 #thermal-sensor-cells = <1>;
900 compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
902 #iommu-cells = <1>;
904 #global-interrupts = <0>;
915 compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
917 #iommu-cells = <1>;
919 #global-interrupts = <0>;
934 compatible = "qcom,pcie-msm8996";
939 reg-names = "parf", "dbi", "elbi", "config";
941 linux,pci-domain = <0>;
942 bus-range = <0x00 0xff>;
943 #address-cells = <3>;
944 #size-cells = <2>;
945 num-lanes = <1>;
947 phy-names = "pciephy";
953 #interrupt-cells = <1>;
955 interrupt-names = "msi";
956 interrupt-map-mask = <0 0 0 0x7>;
957 interrupt-map = <0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
967 clock-names = "pipe", "bus_master", "bus_slave", "cfg", "aux";
969 power-domains = <&gcc PCIE_0_GDSC>;
970 iommu-map = <0x100 &anoc1_smmu 0x1480 1>;
971 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
974 pcie_phy: phy@1c06000 {
975 compatible = "qcom,msm8998-qmp-pcie-phy";
977 #address-cells = <1>;
978 #size-cells = <1>;
985 clock-names = "aux", "cfg_ahb", "ref";
988 reset-names = "phy", "common";
990 vdda-phy-supply = <&vreg_l1a_0p875>;
991 vdda-pll-supply = <&vreg_l2a_1p2>;
995 #phy-cells = <0>;
998 clock-names = "pipe0";
999 clock-output-names = "pcie_0_pipe_clk_src";
1000 #clock-cells = <0>;
1005 compatible = "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
1009 phy-names = "ufsphy";
1010 lanes-per-direction = <2>;
1011 power-domains = <&gcc UFS_GDSC>;
1013 #reset-cells = <1>;
1015 clock-names =
1033 freq-table-hz =
1044 reset-names = "rst";
1047 ufsphy: phy@1da7000 {
1048 compatible = "qcom,msm8998-qmp-ufs-phy";
1050 #address-cells = <1>;
1051 #size-cells = <1>;
1055 clock-names =
1062 reset-names = "ufsphy";
1071 #phy-cells = <0>;
1081 compatible = "qcom,msm8998-pinctrl";
1084 gpio-controller;
1085 #gpio-cells = <0x2>;
1086 interrupt-controller;
1087 #interrupt-cells = <0x2>;
1092 bias-disable;
1093 drive-strength = <16>;
1100 bias-disable;
1101 drive-strength = <2>;
1108 bias-pull-up;
1109 drive-strength = <10>;
1116 bias-pull-up;
1117 drive-strength = <2>;
1124 bias-pull-up;
1125 drive-strength = <10>;
1132 bias-pull-up;
1133 drive-strength = <2>;
1145 bias-pull-up;
1146 drive-strength = <2>;
1158 bias-pull-up;
1159 drive-strength = <2>;
1167 drive-strength = <2>;
1168 bias-disable;
1174 drive-strength = <2>;
1175 bias-disable;
1181 drive-strength = <2>;
1182 bias-disable;
1188 drive-strength = <2>;
1189 bias-disable;
1193 blsp1_i2c1_default: blsp1-i2c1-default {
1196 drive-strength = <2>;
1197 bias-disable;
1200 blsp1_i2c1_sleep: blsp1-i2c1-sleep {
1203 drive-strength = <2>;
1204 bias-pull-up;
1207 blsp1_i2c2_default: blsp1-i2c2-default {
1210 drive-strength = <2>;
1211 bias-disable;
1214 blsp1_i2c2_sleep: blsp1-i2c2-sleep {
1217 drive-strength = <2>;
1218 bias-pull-up;
1221 blsp1_i2c3_default: blsp1-i2c3-default {
1224 drive-strength = <2>;
1225 bias-disable;
1228 blsp1_i2c3_sleep: blsp1-i2c3-sleep {
1231 drive-strength = <2>;
1232 bias-pull-up;
1235 blsp1_i2c4_default: blsp1-i2c4-default {
1238 drive-strength = <2>;
1239 bias-disable;
1242 blsp1_i2c4_sleep: blsp1-i2c4-sleep {
1245 drive-strength = <2>;
1246 bias-pull-up;
1249 blsp1_i2c5_default: blsp1-i2c5-default {
1252 drive-strength = <2>;
1253 bias-disable;
1256 blsp1_i2c5_sleep: blsp1-i2c5-sleep {
1259 drive-strength = <2>;
1260 bias-pull-up;
1263 blsp1_i2c6_default: blsp1-i2c6-default {
1266 drive-strength = <2>;
1267 bias-disable;
1270 blsp1_i2c6_sleep: blsp1-i2c6-sleep {
1273 drive-strength = <2>;
1274 bias-pull-up;
1277 blsp2_i2c1_default: blsp2-i2c1-default {
1280 drive-strength = <2>;
1281 bias-disable;
1284 blsp2_i2c1_sleep: blsp2-i2c1-sleep {
1287 drive-strength = <2>;
1288 bias-pull-up;
1291 blsp2_i2c2_default: blsp2-i2c2-default {
1294 drive-strength = <2>;
1295 bias-disable;
1298 blsp2_i2c2_sleep: blsp2-i2c2-sleep {
1301 drive-strength = <2>;
1302 bias-pull-up;
1305 blsp2_i2c3_default: blsp2-i2c3-default {
1308 drive-strength = <2>;
1309 bias-disable;
1312 blsp2_i2c3_sleep: blsp2-i2c3-sleep {
1315 drive-strength = <2>;
1316 bias-pull-up;
1319 blsp2_i2c4_default: blsp2-i2c4-default {
1322 drive-strength = <2>;
1323 bias-disable;
1326 blsp2_i2c4_sleep: blsp2-i2c4-sleep {
1329 drive-strength = <2>;
1330 bias-pull-up;
1333 blsp2_i2c5_default: blsp2-i2c5-default {
1336 drive-strength = <2>;
1337 bias-disable;
1340 blsp2_i2c5_sleep: blsp2-i2c5-sleep {
1343 drive-strength = <2>;
1344 bias-pull-up;
1347 blsp2_i2c6_default: blsp2-i2c6-default {
1350 drive-strength = <2>;
1351 bias-disable;
1354 blsp2_i2c6_sleep: blsp2-i2c6-sleep {
1357 drive-strength = <2>;
1358 bias-pull-up;
1363 compatible = "qcom,msm8998-mss-pil";
1365 reg-names = "qdsp6", "rmb";
1367 interrupts-extended =
1374 interrupt-names = "wdog", "fatal", "ready",
1375 "handover", "stop-ack",
1376 "shutdown-ack";
1386 clock-names = "iface", "bus", "mem", "gpll0_mss",
1389 qcom,smem-states = <&modem_smp2p_out 0>;
1390 qcom,smem-state-names = "stop";
1393 reset-names = "mss_restart";
1395 qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
1397 power-domains = <&rpmpd MSM8998_VDDCX>,
1399 power-domain-names = "cx", "mx";
1404 memory-region = <&mba_mem>;
1408 memory-region = <&mpss_mem>;
1411 glink-edge {
1414 qcom,remote-pid = <1>;
1419 gpucc: clock-controller@5065000 {
1420 compatible = "qcom,msm8998-gpucc";
1421 #clock-cells = <1>;
1422 #reset-cells = <1>;
1423 #power-domain-cells = <1>;
1428 clock-names = "xo",
1433 compatible = "qcom,msm8998-slpi-pas";
1436 interrupts-extended = <&intc GIC_SPI 390 IRQ_TYPE_EDGE_RISING>,
1441 interrupt-names = "wdog", "fatal", "ready",
1442 "handover", "stop-ack";
1444 px-supply = <&vreg_lvs2a_1p8>;
1448 clock-names = "xo", "aggre2";
1450 memory-region = <&slpi_mem>;
1452 qcom,smem-states = <&slpi_smp2p_out 0>;
1453 qcom,smem-state-names = "stop";
1455 power-domains = <&rpmpd MSM8998_SSCCX>;
1456 power-domain-names = "ssc_cx";
1460 glink-edge {
1463 qcom,remote-pid = <3>;
1469 compatible = "arm,coresight-stm", "arm,primecell";
1472 reg-names = "stm-base", "stm-data-base";
1476 clock-names = "apb_pclk", "atclk";
1478 out-ports {
1481 remote-endpoint = <&funnel0_in7>;
1488 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1493 clock-names = "apb_pclk", "atclk";
1495 out-ports {
1498 remote-endpoint =
1504 in-ports {
1505 #address-cells = <1>;
1506 #size-cells = <0>;
1511 remote-endpoint = <&stm_out>;
1518 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1523 clock-names = "apb_pclk", "atclk";
1525 out-ports {
1528 remote-endpoint =
1534 in-ports {
1535 #address-cells = <1>;
1536 #size-cells = <0>;
1541 remote-endpoint =
1549 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1554 clock-names = "apb_pclk", "atclk";
1556 out-ports {
1559 remote-endpoint =
1565 in-ports {
1566 #address-cells = <1>;
1567 #size-cells = <0>;
1572 remote-endpoint =
1580 remote-endpoint =
1588 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
1593 clock-names = "apb_pclk", "atclk";
1595 out-ports {
1598 remote-endpoint = <&etr_in>;
1603 in-ports {
1606 remote-endpoint = <&etf_out>;
1613 compatible = "arm,coresight-tmc", "arm,primecell";
1618 clock-names = "apb_pclk", "atclk";
1620 out-ports {
1623 remote-endpoint =
1629 in-ports {
1632 remote-endpoint =
1640 compatible = "arm,coresight-tmc", "arm,primecell";
1645 clock-names = "apb_pclk", "atclk";
1646 arm,scatter-gather;
1648 in-ports {
1651 remote-endpoint =
1659 compatible = "arm,coresight-etm4x", "arm,primecell";
1664 clock-names = "apb_pclk", "atclk";
1668 out-ports {
1671 remote-endpoint =
1679 compatible = "arm,coresight-etm4x", "arm,primecell";
1684 clock-names = "apb_pclk", "atclk";
1688 out-ports {
1691 remote-endpoint =
1699 compatible = "arm,coresight-etm4x", "arm,primecell";
1704 clock-names = "apb_pclk", "atclk";
1708 out-ports {
1711 remote-endpoint =
1719 compatible = "arm,coresight-etm4x", "arm,primecell";
1724 clock-names = "apb_pclk", "atclk";
1728 out-ports {
1731 remote-endpoint =
1739 compatible = "arm,coresight-etm4x", "arm,primecell";
1744 clock-names = "apb_pclk", "atclk";
1746 out-ports {
1749 remote-endpoint =
1755 in-ports {
1756 #address-cells = <1>;
1757 #size-cells = <0>;
1762 remote-endpoint =
1770 remote-endpoint =
1778 remote-endpoint =
1786 remote-endpoint =
1794 remote-endpoint =
1802 remote-endpoint =
1810 remote-endpoint =
1818 remote-endpoint =
1826 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1831 clock-names = "apb_pclk", "atclk";
1833 out-ports {
1836 remote-endpoint =
1842 in-ports {
1845 remote-endpoint =
1853 compatible = "arm,coresight-etm4x", "arm,primecell";
1858 clock-names = "apb_pclk", "atclk";
1864 remote-endpoint = <&apss_funnel_in4>;
1870 compatible = "arm,coresight-etm4x", "arm,primecell";
1875 clock-names = "apb_pclk", "atclk";
1881 remote-endpoint = <&apss_funnel_in5>;
1887 compatible = "arm,coresight-etm4x", "arm,primecell";
1892 clock-names = "apb_pclk", "atclk";
1898 remote-endpoint = <&apss_funnel_in6>;
1904 compatible = "arm,coresight-etm4x", "arm,primecell";
1909 clock-names = "apb_pclk", "atclk";
1915 remote-endpoint = <&apss_funnel_in7>;
1921 compatible = "qcom,spmi-pmic-arb";
1927 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1928 interrupt-names = "periph_irq";
1930 qcom,ee = <0>;
1931 qcom,channel = <0>;
1932 #address-cells = <2>;
1933 #size-cells = <0>;
1934 interrupt-controller;
1935 #interrupt-cells = <4>;
1936 cell-index = <0>;
1940 compatible = "qcom,msm8998-dwc3", "qcom,dwc3";
1943 #address-cells = <1>;
1944 #size-cells = <1>;
1952 clock-names = "cfg_noc", "core", "iface", "mock_utmi",
1955 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1957 assigned-clock-rates = <19200000>, <120000000>;
1961 interrupt-names = "hs_phy_irq", "ss_phy_irq";
1963 power-domains = <&gcc USB_30_GDSC>;
1974 phy-names = "usb2-phy", "usb3-phy";
1975 snps,has-lpm-erratum;
1976 snps,hird-threshold = /bits/ 8 <0x10>;
1980 usb3phy: phy@c010000 {
1981 compatible = "qcom,msm8998-qmp-usb3-phy";
1984 #clock-cells = <1>;
1985 #address-cells = <1>;
1986 #size-cells = <1>;
1992 clock-names = "aux", "cfg_ahb", "ref";
1996 reset-names = "phy", "common";
2004 #phy-cells = <0>;
2006 clock-names = "pipe0";
2007 clock-output-names = "usb3_phy_pipe_clk_src";
2011 qusb2phy: phy@c012000 {
2012 compatible = "qcom,msm8998-qusb2-phy";
2015 #phy-cells = <0>;
2019 clock-names = "cfg_ahb", "ref";
2023 nvmem-cells = <&qusb2_hstx_trim>;
2027 compatible = "qcom,sdhci-msm-v4";
2029 reg-names = "hc_mem", "core_mem";
2033 interrupt-names = "hc_irq", "pwr_irq";
2035 clock-names = "iface", "core", "xo";
2039 bus-width = <4>;
2043 blsp1_dma: dma-controller@c144000 {
2044 compatible = "qcom,bam-v1.7.0";
2048 clock-names = "bam_clk";
2049 #dma-cells = <1>;
2050 qcom,ee = <0>;
2051 qcom,controlled-remotely;
2052 num-channels = <18>;
2053 qcom,num-ees = <4>;
2057 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2062 clock-names = "core", "iface";
2064 dma-names = "tx", "rx";
2065 pinctrl-names = "default";
2066 pinctrl-0 = <&blsp1_uart3_on>;
2071 compatible = "qcom,i2c-qup-v2.2.1";
2077 clock-names = "core", "iface";
2079 dma-names = "tx", "rx";
2080 pinctrl-names = "default", "sleep";
2081 pinctrl-0 = <&blsp1_i2c1_default>;
2082 pinctrl-1 = <&blsp1_i2c1_sleep>;
2083 clock-frequency = <400000>;
2086 #address-cells = <1>;
2087 #size-cells = <0>;
2091 compatible = "qcom,i2c-qup-v2.2.1";
2097 clock-names = "core", "iface";
2099 dma-names = "tx", "rx";
2100 pinctrl-names = "default", "sleep";
2101 pinctrl-0 = <&blsp1_i2c2_default>;
2102 pinctrl-1 = <&blsp1_i2c2_sleep>;
2103 clock-frequency = <400000>;
2106 #address-cells = <1>;
2107 #size-cells = <0>;
2111 compatible = "qcom,i2c-qup-v2.2.1";
2117 clock-names = "core", "iface";
2119 dma-names = "tx", "rx";
2120 pinctrl-names = "default", "sleep";
2121 pinctrl-0 = <&blsp1_i2c3_default>;
2122 pinctrl-1 = <&blsp1_i2c3_sleep>;
2123 clock-frequency = <400000>;
2126 #address-cells = <1>;
2127 #size-cells = <0>;
2131 compatible = "qcom,i2c-qup-v2.2.1";
2137 clock-names = "core", "iface";
2139 dma-names = "tx", "rx";
2140 pinctrl-names = "default", "sleep";
2141 pinctrl-0 = <&blsp1_i2c4_default>;
2142 pinctrl-1 = <&blsp1_i2c4_sleep>;
2143 clock-frequency = <400000>;
2146 #address-cells = <1>;
2147 #size-cells = <0>;
2151 compatible = "qcom,i2c-qup-v2.2.1";
2157 clock-names = "core", "iface";
2159 dma-names = "tx", "rx";
2160 pinctrl-names = "default", "sleep";
2161 pinctrl-0 = <&blsp1_i2c5_default>;
2162 pinctrl-1 = <&blsp1_i2c5_sleep>;
2163 clock-frequency = <400000>;
2166 #address-cells = <1>;
2167 #size-cells = <0>;
2171 compatible = "qcom,i2c-qup-v2.2.1";
2177 clock-names = "core", "iface";
2179 dma-names = "tx", "rx";
2180 pinctrl-names = "default", "sleep";
2181 pinctrl-0 = <&blsp1_i2c6_default>;
2182 pinctrl-1 = <&blsp1_i2c6_sleep>;
2183 clock-frequency = <400000>;
2186 #address-cells = <1>;
2187 #size-cells = <0>;
2191 compatible = "qcom,bam-v1.7.0";
2195 clock-names = "bam_clk";
2196 #dma-cells = <1>;
2197 qcom,ee = <0>;
2198 qcom,controlled-remotely;
2199 num-channels = <18>;
2200 qcom,num-ees = <4>;
2204 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
2209 clock-names = "core", "iface";
2214 compatible = "qcom,i2c-qup-v2.2.1";
2220 clock-names = "core", "iface";
2222 dma-names = "tx", "rx";
2223 pinctrl-names = "default", "sleep";
2224 pinctrl-0 = <&blsp2_i2c1_default>;
2225 pinctrl-1 = <&blsp2_i2c1_sleep>;
2226 clock-frequency = <400000>;
2229 #address-cells = <1>;
2230 #size-cells = <0>;
2234 compatible = "qcom,i2c-qup-v2.2.1";
2240 clock-names = "core", "iface";
2242 dma-names = "tx", "rx";
2243 pinctrl-names = "default", "sleep";
2244 pinctrl-0 = <&blsp2_i2c2_default>;
2245 pinctrl-1 = <&blsp2_i2c2_sleep>;
2246 clock-frequency = <400000>;
2249 #address-cells = <1>;
2250 #size-cells = <0>;
2254 compatible = "qcom,i2c-qup-v2.2.1";
2260 clock-names = "core", "iface";
2262 dma-names = "tx", "rx";
2263 pinctrl-names = "default", "sleep";
2264 pinctrl-0 = <&blsp2_i2c3_default>;
2265 pinctrl-1 = <&blsp2_i2c3_sleep>;
2266 clock-frequency = <400000>;
2269 #address-cells = <1>;
2270 #size-cells = <0>;
2274 compatible = "qcom,i2c-qup-v2.2.1";
2280 clock-names = "core", "iface";
2282 dma-names = "tx", "rx";
2283 pinctrl-names = "default", "sleep";
2284 pinctrl-0 = <&blsp2_i2c4_default>;
2285 pinctrl-1 = <&blsp2_i2c4_sleep>;
2286 clock-frequency = <400000>;
2289 #address-cells = <1>;
2290 #size-cells = <0>;
2294 compatible = "qcom,i2c-qup-v2.2.1";
2300 clock-names = "core", "iface";
2302 dma-names = "tx", "rx";
2303 pinctrl-names = "default", "sleep";
2304 pinctrl-0 = <&blsp2_i2c5_default>;
2305 pinctrl-1 = <&blsp2_i2c5_sleep>;
2306 clock-frequency = <400000>;
2309 #address-cells = <1>;
2310 #size-cells = <0>;
2314 compatible = "qcom,i2c-qup-v2.2.1";
2320 clock-names = "core", "iface";
2322 dma-names = "tx", "rx";
2323 pinctrl-names = "default", "sleep";
2324 pinctrl-0 = <&blsp2_i2c6_default>;
2325 pinctrl-1 = <&blsp2_i2c6_sleep>;
2326 clock-frequency = <400000>;
2329 #address-cells = <1>;
2330 #size-cells = <0>;
2334 compatible = "qcom,msm8998-adsp-pas";
2337 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
2342 interrupt-names = "wdog", "fatal", "ready",
2343 "handover", "stop-ack";
2346 clock-names = "xo";
2348 memory-region = <&adsp_mem>;
2350 qcom,smem-states = <&adsp_smp2p_out 0>;
2351 qcom,smem-state-names = "stop";
2353 power-domains = <&rpmpd MSM8998_VDDCX>;
2354 power-domain-names = "cx";
2358 glink-edge {
2361 qcom,remote-pid = <2>;
2367 compatible = "qcom,msm8998-apcs-hmss-global";
2370 #mbox-cells = <1>;
2374 #address-cells = <1>;
2375 #size-cells = <1>;
2377 compatible = "arm,armv7-timer-mem";
2381 frame-number = <0>;
2389 frame-number = <1>;
2396 frame-number = <2>;
2403 frame-number = <3>;
2410 frame-number = <4>;
2417 frame-number = <5>;
2424 frame-number = <6>;
2431 intc: interrupt-controller@17a00000 {
2432 compatible = "arm,gic-v3";
2435 #interrupt-cells = <3>;
2436 #address-cells = <1>;
2437 #size-cells = <1>;
2439 interrupt-controller;
2440 #redistributor-regions = <1>;
2441 redistributor-stride = <0x0 0x20000>;
2446 compatible = "qcom,wcn3990-wifi";
2449 reg-names = "membase";
2450 memory-region = <&wlan_msa_mem>;
2452 clock-names = "cxo_ref_clk_pin";
2468 qcom,snoc-host-cap-8bit-quirk;