Lines Matching +full:0 +full:x77
24 #clock-cells = <0>;
31 #clock-cells = <0>;
39 #size-cells = <0>;
41 CPU0: cpu@0 {
44 reg = <0x0 0x0>;
48 clocks = <&kryocc 0>;
61 reg = <0x0 0x1>;
65 clocks = <&kryocc 0>;
74 reg = <0x0 0x100>;
91 reg = <0x0 0x101>;
126 CPU_SLEEP_0: cpu-sleep-0 {
129 arm,psci-suspend-param = <0x00000004>;
145 opp-supported-hw = <0x77>;
150 opp-supported-hw = <0x77>;
155 opp-supported-hw = <0x77>;
160 opp-supported-hw = <0x77>;
165 opp-supported-hw = <0x77>;
170 opp-supported-hw = <0x77>;
175 opp-supported-hw = <0x77>;
180 opp-supported-hw = <0x77>;
185 opp-supported-hw = <0x77>;
190 opp-supported-hw = <0x77>;
195 opp-supported-hw = <0x77>;
200 opp-supported-hw = <0x77>;
205 opp-supported-hw = <0x77>;
210 opp-supported-hw = <0x77>;
215 opp-supported-hw = <0x77>;
220 opp-supported-hw = <0x77>;
233 opp-supported-hw = <0x77>;
238 opp-supported-hw = <0x77>;
243 opp-supported-hw = <0x77>;
248 opp-supported-hw = <0x77>;
253 opp-supported-hw = <0x77>;
258 opp-supported-hw = <0x77>;
263 opp-supported-hw = <0x77>;
268 opp-supported-hw = <0x77>;
273 opp-supported-hw = <0x77>;
278 opp-supported-hw = <0x77>;
283 opp-supported-hw = <0x77>;
288 opp-supported-hw = <0x77>;
293 opp-supported-hw = <0x77>;
298 opp-supported-hw = <0x77>;
303 opp-supported-hw = <0x77>;
308 opp-supported-hw = <0x77>;
313 opp-supported-hw = <0x77>;
318 opp-supported-hw = <0x77>;
323 opp-supported-hw = <0x77>;
328 opp-supported-hw = <0x77>;
333 opp-supported-hw = <0x77>;
338 opp-supported-hw = <0x77>;
343 opp-supported-hw = <0x77>;
348 opp-supported-hw = <0x77>;
353 opp-supported-hw = <0x77>;
361 qcom,dload-mode = <&tcsr 0x13000>;
367 syscon = <&tcsr_mutex_regs 0 0x1000>;
374 reg = <0x0 0x80000000 0x0 0x0>;
388 reg = <0x0 0x91500000 0x0 0x200000>;
393 reg = <0x0 0x90b00000 0x0 0xa00000>;
398 reg = <0x0 0x90400000 0x0 0x700000>;
403 reg = <0x0 0x8ea00000 0x0 0x1a00000>;
408 reg = <0x0 0x88800000 0x0 0x6200000>;
413 reg = <0x0 0x86000000 0x0 0x200000>;
418 reg = <0x0 0x85800000 0x0 0x800000>;
423 reg = <0x0 0x86200000 0x0 0x2600000>;
430 size = <0x0 0x200000>;
431 alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>;
440 reg = <0x0 0x90b00000 0x0 0xa00000>;
452 mboxes = <&apcs_glb 0>;
509 interrupts = <0 158 IRQ_TYPE_EDGE_RISING>;
513 qcom,local-pid = <0>;
537 qcom,local-pid = <0>;
561 qcom,local-pid = <0>;
579 ranges = <0 0 0 0xffffffff>;
584 reg = <0x00034000 0x488>;
602 reg = <0x00035000 0x130>,
603 <0x00035200 0x200>,
604 <0x00035400 0x1dc>;
605 #phy-cells = <0>;
615 reg = <0x00036000 0x130>,
616 <0x00036200 0x200>,
617 <0x00036400 0x1dc>;
618 #phy-cells = <0>;
628 reg = <0x00037000 0x130>,
629 <0x00037200 0x200>,
630 <0x00037400 0x1dc>;
631 #phy-cells = <0>;
643 reg = <0x00068000 0x6000>;
648 reg = <0x00074000 0x8ff>;
653 reg = <0x24e 0x2>;
658 reg = <0x24f 0x1>;
663 reg = <0x133 0x1>;
670 reg = <0x00083000 0x1000>;
680 reg = <0x00300000 0x90000>;
688 reg = <0x004a9000 0x1000>, /* TM */
689 <0x004a8000 0x1000>; /* SROT */
699 reg = <0x004ad000 0x1000>, /* TM */
700 <0x004ac000 0x1000>; /* SROT */
710 reg = <0x00740000 0x40000>;
715 reg = <0x007a0000 0x18000>;
723 reg = <0x008c0000 0x40000>;
739 reg = <0x00900000 0x1000>,
740 <0x009b0000 0x1040>,
741 <0x009b8000 0x1040>;
763 reg = <0x00901000 0x90000>;
767 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
780 iommus = <&mdp_smmu 0>;
789 #size-cells = <0>;
791 port@0 {
792 reg = <0>;
809 reg = <0x00994000 0x400>;
835 #size-cells = <0>;
839 #size-cells = <0>;
841 port@0 {
842 reg = <0>;
858 reg = <0x00994400 0x100>,
859 <0x00994500 0x300>,
860 <0x00994800 0x188>;
866 #phy-cells = <0>;
875 reg = <0x009a0000 0x50c>,
876 <0x00070000 0x6158>,
877 <0x009e0000 0xfff>;
905 #size-cells = <0>;
907 port@0 {
908 reg = <0>;
917 #phy-cells = <0>;
919 reg = <0x009a0600 0x1c4>,
920 <0x009a0a00 0x124>,
921 <0x009a0c00 0x124>,
922 <0x009a0e00 0x124>,
923 <0x009a1000 0x124>,
924 <0x009a1200 0x0c8>;
945 reg = <0x00b00000 0x3f000>;
948 interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;
963 iommus = <&adreno_smmu 0>;
982 * bin (1 << 0). All the rest are available on
987 opp-supported-hw = <0x01>;
991 opp-supported-hw = <0x01>;
995 opp-supported-hw = <0xFF>;
999 opp-supported-hw = <0xFF>;
1003 opp-supported-hw = <0xFF>;
1007 opp-supported-hw = <0xFF>;
1011 opp-supported-hw = <0xFF>;
1022 reg = <0x01010000 0x300000>;
1025 gpio-ranges = <&tlmm 0 0 150>;
1218 bias-disable = <0>;
1225 bias-disable = <0>;
1500 reg = <0x0400f000 0x1000>,
1501 <0x04400000 0x800000>,
1502 <0x04c00000 0x800000>,
1503 <0x05800000 0x200000>,
1504 <0x0400a000 0x002100>;
1508 qcom,ee = <0>;
1509 qcom,channel = <0>;
1511 #size-cells = <0>;
1516 agnoc@0 {
1527 bus-range = <0x00 0xff>;
1530 reg = <0x00600000 0x2000>,
1531 <0x0c000000 0xf1d>,
1532 <0x0c000f20 0xa8>,
1533 <0x0c100000 0x100000>;
1541 ranges = <0x01000000 0x0 0x0c200000 0x0c200000 0x0 0x100000>,
1542 <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
1549 interrupt-map-mask = <0 0 0 0x7>;
1550 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1551 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
1552 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
1553 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
1556 pinctrl-0 = <&pcie0_state_on>;
1559 linux,pci-domain = <0>;
1578 bus-range = <0x00 0xff>;
1583 reg = <0x00608000 0x2000>,
1584 <0x0d000000 0xf1d>,
1585 <0x0d000f20 0xa8>,
1586 <0x0d100000 0x100000>;
1595 ranges = <0x01000000 0x0 0x0d200000 0x0d200000 0x0 0x100000>,
1596 <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
1603 interrupt-map-mask = <0 0 0 0x7>;
1604 interrupt-map = <0 0 0 1 &intc 0 272 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1605 <0 0 0 2 &intc 0 273 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
1606 <0 0 0 3 &intc 0 274 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
1607 <0 0 0 4 &intc 0 275 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
1610 pinctrl-0 = <&pcie1_state_on>;
1631 bus-range = <0x00 0xff>;
1634 reg = <0x00610000 0x2000>,
1635 <0x0e000000 0xf1d>,
1636 <0x0e000f20 0xa8>,
1637 <0x0e100000 0x100000>;
1646 ranges = <0x01000000 0x0 0x0e200000 0x0e200000 0x0 0x100000>,
1647 <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
1654 interrupt-map-mask = <0 0 0 0x7>;
1655 interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1656 <0 0 0 2 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
1657 <0 0 0 3 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
1658 <0 0 0 4 &intc 0 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
1661 pinctrl-0 = <&pcie2_state_on>;
1681 reg = <0x00624000 0x2500>;
1715 <0 0>,
1716 <0 0>,
1717 <0 0>,
1718 <0 0>,
1720 <0 0>,
1721 <0 0>,
1722 <0 0>,
1723 <0 0>,
1724 <0 0>;
1737 reg = <0x00627000 0x1c4>;
1745 resets = <&ufshc 0>;
1750 reg = <0x627400 0x12c>,
1751 <0x627600 0x200>,
1752 <0x627c00 0x1b4>;
1753 #phy-cells = <0>;
1759 reg = <0x00a34000 0x1000>,
1760 <0x00a00030 0x4>,
1761 <0x00a35000 0x1000>,
1762 <0x00a00038 0x4>,
1763 <0x00a36000 0x1000>,
1764 <0x00a00040 0x4>,
1765 <0x00a30000 0x100>,
1766 <0x00a30400 0x100>,
1767 <0x00a30800 0x100>,
1768 <0x00a30c00 0x100>,
1769 <0x00a31000 0x500>,
1770 <0x00a00020 0x10>,
1771 <0x00a10000 0x1000>,
1772 <0x00a14000 0x1000>;
1881 iommus = <&vfe_smmu 0>,
1888 #size-cells = <0>;
1895 #size-cells = <0>;
1896 reg = <0xa0c000 0x1000>;
1911 pinctrl-0 = <&cci0_default &cci1_default>;
1914 cci_i2c0: i2c-bus@0 {
1915 reg = <0>;
1918 #size-cells = <0>;
1925 #size-cells = <0>;
1931 reg = <0x00b40000 0x10000>;
1948 reg = <0x00c00000 0xff000>;
1956 iommus = <&venus_smmu 0x00>,
1957 <&venus_smmu 0x01>,
1958 <&venus_smmu 0x0a>,
1959 <&venus_smmu 0x07>,
1960 <&venus_smmu 0x0e>,
1961 <&venus_smmu 0x0f>,
1962 <&venus_smmu 0x08>,
1963 <&venus_smmu 0x09>,
1964 <&venus_smmu 0x0b>,
1965 <&venus_smmu 0x0c>,
1966 <&venus_smmu 0x0d>,
1967 <&venus_smmu 0x10>,
1968 <&venus_smmu 0x11>,
1969 <&venus_smmu 0x21>,
1970 <&venus_smmu 0x28>,
1971 <&venus_smmu 0x29>,
1972 <&venus_smmu 0x2b>,
1973 <&venus_smmu 0x2c>,
1974 <&venus_smmu 0x2d>,
1975 <&venus_smmu 0x31>;
1996 reg = <0x00d00000 0x10000>;
2012 reg = <0x00d40000 0x20000>;
2032 reg = <0x00da0000 0x10000>;
2048 reg = <0x01600000 0x20000>;
2074 reg = <0x3002000 0x1000>,
2075 <0x8280000 0x180000>;
2093 reg = <0x3020000 0x1000>;
2110 reg = <0x3021000 0x1000>;
2117 #size-cells = <0>;
2140 reg = <0x3022000 0x1000>;
2147 #size-cells = <0>;
2170 reg = <0x3023000 0x1000>;
2188 reg = <0x3025000 0x1000>;
2195 #size-cells = <0>;
2197 port@0 {
2198 reg = <0>;
2234 reg = <0x3026000 0x1000>;
2250 #size-cells = <0>;
2252 port@0 {
2253 reg = <0>;
2272 reg = <0x3027000 0x1000>;
2298 reg = <0x3028000 0x1000>;
2316 reg = <0x3810000 0x1000>;
2326 reg = <0x3840000 0x1000>;
2345 reg = <0x3910000 0x1000>;
2355 reg = <0x3940000 0x1000>;
2372 funnel@39b0000 { /* APSS Funnel 0 */
2374 reg = <0x39b0000 0x1000>;
2381 #size-cells = <0>;
2383 port@0 {
2384 reg = <0>;
2410 reg = <0x3a10000 0x1000>;
2420 reg = <0x3a40000 0x1000>;
2439 reg = <0x3b10000 0x1000>;
2449 reg = <0x3b40000 0x1000>;
2468 reg = <0x3bb0000 0x1000>;
2475 #size-cells = <0>;
2477 port@0 {
2478 reg = <0>;
2504 reg = <0x3bc0000 0x1000>;
2511 #size-cells = <0>;
2513 port@0 {
2514 reg = <0>;
2542 reg = <0x06400000 0x90000>;
2552 reg = <0x06af8800 0x400>;
2577 reg = <0x06a00000 0xcc00>;
2578 interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
2588 reg = <0x07410000 0x1c4>;
2605 reg = <0x07410200 0x200>,
2606 <0x07410400 0x130>,
2607 <0x07410600 0x1a8>;
2608 #phy-cells = <0>;
2618 reg = <0x07411000 0x180>;
2619 #phy-cells = <0>;
2632 reg = <0x07412000 0x180>;
2633 #phy-cells = <0>;
2646 reg = <0x07464900 0x11c>, <0x07464000 0x800>;
2659 pinctrl-0 = <&sdc1_state_on>;
2669 reg = <0x074a4900 0x314>, <0x074a4000 0x800>;
2682 pinctrl-0 = <&sdc2_state_on>;
2691 reg = <0x07544000 0x2b000>;
2697 qcom,ee = <0>;
2702 reg = <0x07570000 0x1000>;
2714 reg = <0x07575000 0x600>;
2720 pinctrl-0 = <&blsp1_spi1_default>;
2725 #size-cells = <0>;
2731 reg = <0x07577000 0x1000>;
2737 pinctrl-0 = <&blsp1_i2c3_default>;
2742 #size-cells = <0>;
2748 reg = <0x07584000 0x2b000>;
2754 qcom,ee = <0>;
2759 reg = <0x075b0000 0x1000>;
2769 reg = <0x075b1000 0x1000>;
2779 reg = <0x075b5000 0x1000>;
2785 pinctrl-0 = <&blsp2_i2c1_default>;
2790 #size-cells = <0>;
2796 reg = <0x075b6000 0x1000>;
2802 pinctrl-0 = <&blsp2_i2c2_default>;
2807 #size-cells = <0>;
2813 reg = <0x75b9000 0x1000>;
2819 pinctrl-0 = <&blsp2_i2c5_default>;
2823 #size-cells = <0>;
2829 reg = <0x75ba000 0x1000>;
2835 pinctrl-0 = <&blsp2_i2c6_default>;
2840 #size-cells = <0>;
2846 reg = <0x075ba000 0x600>;
2852 pinctrl-0 = <&blsp2_spi6_default>;
2857 #size-cells = <0>;
2863 reg = <0x076f8800 0x400>;
2884 reg = <0x07600000 0xcc00>;
2885 interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
2897 reg = <0x09184000 0x32000>;
2899 interrupts = <0 164 IRQ_TYPE_LEVEL_HIGH>;
2907 reg = <0x091c0000 0x2C000>;
2909 interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
2914 #size-cells = <0>;
2922 reg = <0 0>;
2926 pinctrl-0 = <&cdc_reset_active &wcd_intr_default>;
2930 reg = <1 0>;
2938 reset-gpios = <&tlmm 64 0>;
2949 reg = <0x09300000 0x80000>;
2951 interrupts-extended = <&intc 0 162 IRQ_TYPE_EDGE_RISING>,
2952 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
2964 qcom,smem-states = <&smp2p_adsp_out 0>;
2980 #size-cells = <0>;
2987 #size-cells = <0>;
3000 #size-cells = <0>;
3014 #size-cells = <0>;
3025 #sound-dai-cells = <0>;
3035 reg = <0x09820000 0x1000>;
3045 reg = <0x09840000 0x1000>;
3049 frame-number = <0>;
3052 reg = <0x09850000 0x1000>,
3053 <0x09860000 0x1000>;
3059 reg = <0x09870000 0x1000>;
3066 reg = <0x09880000 0x1000>;
3073 reg = <0x09890000 0x1000>;
3080 reg = <0x098a0000 0x1000>;
3087 reg = <0x098b0000 0x1000>;
3094 reg = <0x098c0000 0x1000>;
3101 reg = <0x09a10000 0x1000>;
3109 redistributor-stride = <0x0 0x40000>;
3110 reg = <0x09bc0000 0x10000>,
3111 <0x09c00000 0x100000>;