Lines Matching full:gcc
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
228 clocks = <&gcc GCC_CRYPTO_CLK>,
229 <&gcc GCC_CRYPTO_AXI_CLK>,
230 <&gcc GCC_CRYPTO_AHB_CLK>;
426 clocks = <&gcc GCC_PRNG_AHB_CLK>;
923 gcc: clock-controller@1800000 { label
924 compatible = "qcom,gcc-msm8916";
949 power-domains = <&gcc MDSS_GDSC>;
951 clocks = <&gcc GCC_MDSS_AHB_CLK>,
952 <&gcc GCC_MDSS_AXI_CLK>,
953 <&gcc GCC_MDSS_VSYNC_CLK>;
975 clocks = <&gcc GCC_MDSS_AHB_CLK>,
976 <&gcc GCC_MDSS_AXI_CLK>,
977 <&gcc GCC_MDSS_MDP_CLK>,
978 <&gcc GCC_MDSS_VSYNC_CLK>;
1007 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1008 <&gcc PCLK0_CLK_SRC>;
1012 clocks = <&gcc GCC_MDSS_MDP_CLK>,
1013 <&gcc GCC_MDSS_AHB_CLK>,
1014 <&gcc GCC_MDSS_AXI_CLK>,
1015 <&gcc GCC_MDSS_BYTE0_CLK>,
1016 <&gcc GCC_MDSS_PCLK0_CLK>,
1017 <&gcc GCC_MDSS_ESC0_CLK>;
1061 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1099 power-domains = <&gcc VFE_GDSC>;
1100 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1101 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
1102 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
1103 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
1104 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
1105 <&gcc GCC_CAMSS_CSI0_CLK>,
1106 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
1107 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
1108 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
1109 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
1110 <&gcc GCC_CAMSS_CSI1_CLK>,
1111 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
1112 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
1113 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
1114 <&gcc GCC_CAMSS_AHB_CLK>,
1115 <&gcc GCC_CAMSS_VFE0_CLK>,
1116 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
1117 <&gcc GCC_CAMSS_VFE_AHB_CLK>,
1118 <&gcc GCC_CAMSS_VFE_AXI_CLK>;
1152 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1153 <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1154 <&gcc GCC_CAMSS_CCI_CLK>,
1155 <&gcc GCC_CAMSS_AHB_CLK>;
1158 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1159 <&gcc GCC_CAMSS_CCI_CLK>;
1187 <&gcc GCC_OXILI_GFX3D_CLK>,
1188 <&gcc GCC_OXILI_AHB_CLK>,
1189 <&gcc GCC_OXILI_GMEM_CLK>,
1190 <&gcc GCC_BIMC_GFX_CLK>,
1191 <&gcc GCC_BIMC_GPU_CLK>,
1192 <&gcc GFX3D_CLK_SRC>;
1193 power-domains = <&gcc OXILI_GDSC>;
1213 power-domains = <&gcc VENUS_GDSC>;
1214 clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
1215 <&gcc GCC_VENUS0_AHB_CLK>,
1216 <&gcc GCC_VENUS0_AXI_CLK>;
1238 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1239 <&gcc GCC_APSS_TCU_CLK>;
1271 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1272 <&gcc GCC_GFX_TCU_CLK>;
1328 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1329 <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
1330 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1387 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1388 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
1389 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
1390 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
1391 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
1392 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
1393 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
1416 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1417 <&gcc GCC_CODEC_DIGCODEC_CLK>;
1430 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
1431 <&gcc GCC_SDCC1_AHB_CLK>,
1448 clocks = <&gcc GCC_SDCC2_APPS_CLK>,
1449 <&gcc GCC_SDCC2_AHB_CLK>,
1460 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1471 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1485 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1499 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1500 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
1514 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
1515 <&gcc GCC_BLSP1_AHB_CLK>;
1531 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1532 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
1546 clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
1547 <&gcc GCC_BLSP1_AHB_CLK>;
1563 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1564 <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
1578 clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
1579 <&gcc GCC_BLSP1_AHB_CLK>;
1595 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1596 <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
1610 clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
1611 <&gcc GCC_BLSP1_AHB_CLK>;
1627 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1628 <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
1642 clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
1643 <&gcc GCC_BLSP1_AHB_CLK>;
1659 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1660 <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
1674 clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
1675 <&gcc GCC_BLSP1_AHB_CLK>;
1693 clocks = <&gcc GCC_USB_HS_AHB_CLK>,
1694 <&gcc GCC_USB_HS_SYSTEM_CLK>;
1696 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1698 resets = <&gcc GCC_USB_HS_BCR>;
1716 clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
1718 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
1805 clocks = <&a53pll>, <&gcc GPLL0_VOTE>;