Lines Matching +full:cs +full:- +full:dev +full:- +full:assoc
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&intc>;
18 #address-cells = <2>;
19 #size-cells = <2>;
34 reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
39 tz-apps@86000000 {
41 no-map;
46 no-map;
51 no-map;
56 no-map;
61 no-map;
65 compatible = "qcom,rmtfs-mem";
67 no-map;
69 qcom,client-id = <1>;
74 no-map;
79 no-map;
84 no-map;
89 no-map;
93 no-map;
99 xo_board: xo-board {
100 compatible = "fixed-clock";
101 #clock-cells = <0>;
102 clock-frequency = <19200000>;
105 sleep_clk: sleep-clk {
106 compatible = "fixed-clock";
107 #clock-cells = <0>;
108 clock-frequency = <32768>;
113 #address-cells = <1>;
114 #size-cells = <0>;
118 compatible = "arm,cortex-a53";
120 next-level-cache = <&L2_0>;
121 enable-method = "psci";
123 operating-points-v2 = <&cpu_opp_table>;
124 #cooling-cells = <2>;
125 power-domains = <&CPU_PD0>;
126 power-domain-names = "psci";
131 compatible = "arm,cortex-a53";
133 next-level-cache = <&L2_0>;
134 enable-method = "psci";
136 operating-points-v2 = <&cpu_opp_table>;
137 #cooling-cells = <2>;
138 power-domains = <&CPU_PD1>;
139 power-domain-names = "psci";
144 compatible = "arm,cortex-a53";
146 next-level-cache = <&L2_0>;
147 enable-method = "psci";
149 operating-points-v2 = <&cpu_opp_table>;
150 #cooling-cells = <2>;
151 power-domains = <&CPU_PD2>;
152 power-domain-names = "psci";
157 compatible = "arm,cortex-a53";
159 next-level-cache = <&L2_0>;
160 enable-method = "psci";
162 operating-points-v2 = <&cpu_opp_table>;
163 #cooling-cells = <2>;
164 power-domains = <&CPU_PD3>;
165 power-domain-names = "psci";
168 L2_0: l2-cache {
170 cache-level = <2>;
173 idle-states {
174 entry-method = "psci";
176 CPU_SLEEP_0: cpu-sleep-0 {
177 compatible = "arm,idle-state";
178 idle-state-name = "standalone-power-collapse";
179 arm,psci-suspend-param = <0x40000002>;
180 entry-latency-us = <130>;
181 exit-latency-us = <150>;
182 min-residency-us = <2000>;
183 local-timer-stop;
187 domain-idle-states {
189 CLUSTER_RET: cluster-retention {
190 compatible = "domain-idle-state";
191 arm,psci-suspend-param = <0x41000012>;
192 entry-latency-us = <500>;
193 exit-latency-us = <500>;
194 min-residency-us = <2000>;
197 CLUSTER_PWRDN: cluster-gdhs {
198 compatible = "domain-idle-state";
199 arm,psci-suspend-param = <0x41000032>;
200 entry-latency-us = <2000>;
201 exit-latency-us = <2000>;
202 min-residency-us = <6000>;
207 cpu_opp_table: cpu-opp-table {
208 compatible = "operating-points-v2";
209 opp-shared;
211 opp-200000000 {
212 opp-hz = /bits/ 64 <200000000>;
214 opp-400000000 {
215 opp-hz = /bits/ 64 <400000000>;
217 opp-800000000 {
218 opp-hz = /bits/ 64 <800000000>;
220 opp-998400000 {
221 opp-hz = /bits/ 64 <998400000>;
227 compatible = "qcom,scm-msm8916", "qcom,scm";
231 clock-names = "core", "bus", "iface";
232 #reset-cells = <1>;
234 qcom,dload-mode = <&tcsr 0x6100>;
239 compatible = "arm,cortex-a53-pmu";
244 compatible = "arm,psci-1.0";
247 CPU_PD0: power-domain-cpu0 {
248 #power-domain-cells = <0>;
249 power-domains = <&CLUSTER_PD>;
250 domain-idle-states = <&CPU_SLEEP_0>;
253 CPU_PD1: power-domain-cpu1 {
254 #power-domain-cells = <0>;
255 power-domains = <&CLUSTER_PD>;
256 domain-idle-states = <&CPU_SLEEP_0>;
259 CPU_PD2: power-domain-cpu2 {
260 #power-domain-cells = <0>;
261 power-domains = <&CLUSTER_PD>;
262 domain-idle-states = <&CPU_SLEEP_0>;
265 CPU_PD3: power-domain-cpu3 {
266 #power-domain-cells = <0>;
267 power-domains = <&CLUSTER_PD>;
268 domain-idle-states = <&CPU_SLEEP_0>;
271 CLUSTER_PD: power-domain-cluster {
272 #power-domain-cells = <0>;
273 domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
283 qcom,smd-edge = <15>;
285 rpm_requests: rpm-requests {
286 compatible = "qcom,rpm-msm8916";
287 qcom,smd-channels = "rpm_requests";
289 rpmcc: clock-controller {
290 compatible = "qcom,rpmcc-msm8916";
291 #clock-cells = <1>;
294 rpmpd: power-controller {
295 compatible = "qcom,msm8916-rpmpd";
296 #power-domain-cells = <1>;
297 operating-points-v2 = <&rpmpd_opp_table>;
299 rpmpd_opp_table: opp-table {
300 compatible = "operating-points-v2";
303 opp-level = <1>;
306 opp-level = <2>;
309 opp-level = <3>;
312 opp-level = <4>;
315 opp-level = <5>;
318 opp-level = <6>;
329 memory-region = <&smem_mem>;
330 qcom,rpm-msg-ram = <&rpm_msg_ram>;
335 smp2p-hexagon {
343 qcom,local-pid = <0>;
344 qcom,remote-pid = <1>;
346 hexagon_smp2p_out: master-kernel {
347 qcom,entry-name = "master-kernel";
349 #qcom,smem-state-cells = <1>;
352 hexagon_smp2p_in: slave-kernel {
353 qcom,entry-name = "slave-kernel";
355 interrupt-controller;
356 #interrupt-cells = <2>;
360 smp2p-wcnss {
368 qcom,local-pid = <0>;
369 qcom,remote-pid = <4>;
371 wcnss_smp2p_out: master-kernel {
372 qcom,entry-name = "master-kernel";
374 #qcom,smem-state-cells = <1>;
377 wcnss_smp2p_in: slave-kernel {
378 qcom,entry-name = "slave-kernel";
380 interrupt-controller;
381 #interrupt-cells = <2>;
388 #address-cells = <1>;
389 #size-cells = <0>;
391 qcom,ipc-1 = <&apcs 8 13>;
392 qcom,ipc-3 = <&apcs 8 19>;
397 #qcom,smem-state-cells = <1>;
404 interrupt-controller;
405 #interrupt-cells = <2>;
412 interrupt-controller;
413 #interrupt-cells = <2>;
418 #address-cells = <1>;
419 #size-cells = <1>;
421 compatible = "simple-bus";
427 clock-names = "core";
438 #address-cells = <1>;
439 #size-cells = <1>;
449 compatible = "qcom,rpm-msg-ram";
454 compatible = "qcom,msm8916-bimc";
456 #interconnect-cells = <1>;
457 clock-names = "bus", "bus_a";
462 tsens: thermal-sensor@4a9000 {
463 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
466 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
467 nvmem-cell-names = "calib", "calib_sel";
470 interrupt-names = "uplow";
471 #thermal-sensor-cells = <1>;
475 compatible = "qcom,msm8916-pcnoc";
477 #interconnect-cells = <1>;
478 clock-names = "bus", "bus_a";
484 compatible = "qcom,msm8916-snoc";
486 #interconnect-cells = <1>;
487 clock-names = "bus", "bus_a";
493 compatible = "arm,coresight-stm", "arm,primecell";
496 reg-names = "stm-base", "stm-stimulus-base";
499 clock-names = "apb_pclk", "atclk";
503 out-ports {
506 remote-endpoint = <&funnel0_in7>;
513 /* CTI 0 - TMC connections */
515 compatible = "arm,coresight-cti", "arm,primecell";
519 clock-names = "apb_pclk";
524 /* CTI 1 - TPIU connections */
526 compatible = "arm,coresight-cti", "arm,primecell";
530 clock-names = "apb_pclk";
535 /* CTIs 2-11 - no information - not instantiated */
538 compatible = "arm,coresight-tpiu", "arm,primecell";
542 clock-names = "apb_pclk", "atclk";
546 in-ports {
549 remote-endpoint = <&replicator_out1>;
556 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
560 clock-names = "apb_pclk", "atclk";
564 in-ports {
565 #address-cells = <1>;
566 #size-cells = <0>;
570 * 0 - connected to Resource and Power Manger CPU ETM
571 * 1 - not-connected
572 * 2 - connected to Modem CPU ETM
573 * 3 - not-connected
574 * 5 - not-connected
575 * 6 - connected trought funnel to Wireless CPU ETM
576 * 7 - connected to STM component
582 remote-endpoint = <&funnel1_out>;
589 remote-endpoint = <&stm_out>;
594 out-ports {
597 remote-endpoint = <&etf_in>;
604 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
608 clock-names = "apb_pclk", "atclk";
612 out-ports {
613 #address-cells = <1>;
614 #size-cells = <0>;
619 remote-endpoint = <&etr_in>;
625 remote-endpoint = <&tpiu_in>;
630 in-ports {
633 remote-endpoint = <&etf_out>;
640 compatible = "arm,coresight-tmc", "arm,primecell";
644 clock-names = "apb_pclk", "atclk";
648 in-ports {
651 remote-endpoint = <&funnel0_out>;
656 out-ports {
659 remote-endpoint = <&replicator_in>;
666 compatible = "arm,coresight-tmc", "arm,primecell";
670 clock-names = "apb_pclk", "atclk";
674 in-ports {
677 remote-endpoint = <&replicator_out0>;
684 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
688 clock-names = "apb_pclk", "atclk";
692 in-ports {
693 #address-cells = <1>;
694 #size-cells = <0>;
699 remote-endpoint = <&etm0_out>;
705 remote-endpoint = <&etm1_out>;
711 remote-endpoint = <&etm2_out>;
717 remote-endpoint = <&etm3_out>;
722 out-ports {
725 remote-endpoint = <&funnel0_in4>;
732 compatible = "arm,coresight-cpu-debug", "arm,primecell";
735 clock-names = "apb_pclk";
741 compatible = "arm,coresight-cpu-debug", "arm,primecell";
744 clock-names = "apb_pclk";
750 compatible = "arm,coresight-cpu-debug", "arm,primecell";
753 clock-names = "apb_pclk";
759 compatible = "arm,coresight-cpu-debug", "arm,primecell";
762 clock-names = "apb_pclk";
767 /* Core CTIs; CTIs 12-15 */
768 /* CTI - CPU-0 */
770 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
775 clock-names = "apb_pclk";
778 arm,cs-dev-assoc = <&etm0>;
783 /* CTI - CPU-1 */
785 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
790 clock-names = "apb_pclk";
793 arm,cs-dev-assoc = <&etm1>;
798 /* CTI - CPU-2 */
800 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
805 clock-names = "apb_pclk";
808 arm,cs-dev-assoc = <&etm2>;
813 /* CTI - CPU-3 */
815 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
820 clock-names = "apb_pclk";
823 arm,cs-dev-assoc = <&etm3>;
829 compatible = "arm,coresight-etm4x", "arm,primecell";
833 clock-names = "apb_pclk", "atclk";
834 arm,coresight-loses-context-with-cpu;
840 out-ports {
843 remote-endpoint = <&funnel1_in0>;
850 compatible = "arm,coresight-etm4x", "arm,primecell";
854 clock-names = "apb_pclk", "atclk";
855 arm,coresight-loses-context-with-cpu;
861 out-ports {
864 remote-endpoint = <&funnel1_in1>;
871 compatible = "arm,coresight-etm4x", "arm,primecell";
875 clock-names = "apb_pclk", "atclk";
876 arm,coresight-loses-context-with-cpu;
882 out-ports {
885 remote-endpoint = <&funnel1_in2>;
892 compatible = "arm,coresight-etm4x", "arm,primecell";
896 clock-names = "apb_pclk", "atclk";
897 arm,coresight-loses-context-with-cpu;
903 out-ports {
906 remote-endpoint = <&funnel1_in3>;
913 compatible = "qcom,msm8916-pinctrl";
916 gpio-controller;
917 gpio-ranges = <&msmgpio 0 0 122>;
918 #gpio-cells = <2>;
919 interrupt-controller;
920 #interrupt-cells = <2>;
923 gcc: clock-controller@1800000 {
924 compatible = "qcom,gcc-msm8916";
925 #clock-cells = <1>;
926 #reset-cells = <1>;
927 #power-domain-cells = <1>;
932 compatible = "qcom,tcsr-mutex";
934 #hwlock-cells = <1>;
938 compatible = "qcom,tcsr-msm8916", "syscon";
947 reg-names = "mdss_phys", "vbif_phys";
949 power-domains = <&gcc MDSS_GDSC>;
954 clock-names = "iface",
960 interrupt-controller;
961 #interrupt-cells = <1>;
963 #address-cells = <1>;
964 #size-cells = <1>;
970 reg-names = "mdp_phys";
972 interrupt-parent = <&mdss>;
979 clock-names = "iface",
987 #address-cells = <1>;
988 #size-cells = <0>;
993 remote-endpoint = <&dsi0_in>;
1000 compatible = "qcom,mdss-dsi-ctrl";
1002 reg-names = "dsi_ctrl";
1004 interrupt-parent = <&mdss>;
1007 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1009 assigned-clock-parents = <&dsi_phy0 0>,
1018 clock-names = "mdp_core",
1025 phy-names = "dsi-phy";
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1031 #address-cells = <1>;
1032 #size-cells = <0>;
1037 remote-endpoint = <&mdp5_intf1_out>;
1049 dsi_phy0: dsi-phy@1a98300 {
1050 compatible = "qcom,dsi-phy-28nm-lp";
1054 reg-names = "dsi_pll",
1058 #clock-cells = <1>;
1059 #phy-cells = <0>;
1063 clock-names = "iface", "ref";
1068 compatible = "qcom,msm8916-camss";
1078 reg-names = "csiphy0",
1093 interrupt-names = "csiphy0",
1099 power-domains = <&gcc VFE_GDSC>;
1119 clock-names = "top_ahb",
1141 #address-cells = <1>;
1142 #size-cells = <0>;
1147 compatible = "qcom,msm8916-cci";
1148 #address-cells = <1>;
1149 #size-cells = <0>;
1156 clock-names = "camss_top_ahb", "cci_ahb",
1158 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1160 assigned-clock-rates = <80000000>, <19200000>;
1161 pinctrl-names = "default";
1162 pinctrl-0 = <&cci0_default>;
1165 cci_i2c0: i2c-bus@0 {
1167 clock-frequency = <400000>;
1168 #address-cells = <1>;
1169 #size-cells = <0>;
1174 compatible = "qcom,adreno-306.0", "qcom,adreno";
1176 reg-names = "kgsl_3d0_reg_memory";
1178 interrupt-names = "kgsl_3d0_irq";
1179 clock-names =
1193 power-domains = <&gcc OXILI_GDSC>;
1194 operating-points-v2 = <&gpu_opp_table>;
1197 gpu_opp_table: opp-table {
1198 compatible = "operating-points-v2";
1200 opp-400000000 {
1201 opp-hz = /bits/ 64 <400000000>;
1203 opp-19200000 {
1204 opp-hz = /bits/ 64 <19200000>;
1209 venus: video-codec@1d00000 {
1210 compatible = "qcom,msm8916-venus";
1213 power-domains = <&gcc VENUS_GDSC>;
1217 clock-names = "core", "iface", "bus";
1219 memory-region = <&venus_mem>;
1222 video-decoder {
1223 compatible = "venus-decoder";
1226 video-encoder {
1227 compatible = "venus-encoder";
1232 #address-cells = <1>;
1233 #size-cells = <1>;
1234 #iommu-cells = <1>;
1235 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1240 clock-names = "iface", "bus";
1241 qcom,iommu-secure-id = <17>;
1244 iommu-ctx@3000 {
1245 compatible = "qcom,msm-iommu-v1-sec";
1251 iommu-ctx@4000 {
1252 compatible = "qcom,msm-iommu-v1-ns";
1258 iommu-ctx@5000 {
1259 compatible = "qcom,msm-iommu-v1-sec";
1266 #address-cells = <1>;
1267 #size-cells = <1>;
1268 #iommu-cells = <1>;
1269 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1273 clock-names = "iface", "bus";
1274 qcom,iommu-secure-id = <18>;
1277 iommu-ctx@1000 {
1278 compatible = "qcom,msm-iommu-v1-ns";
1284 iommu-ctx@2000 {
1285 compatible = "qcom,msm-iommu-v1-ns";
1292 compatible = "qcom,spmi-pmic-arb";
1298 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1299 interrupt-names = "periph_irq";
1303 #address-cells = <2>;
1304 #size-cells = <0>;
1305 interrupt-controller;
1306 #interrupt-cells = <4>;
1310 compatible = "qcom,msm8916-mss-pil", "qcom,q6v5-pil";
1314 reg-names = "qdsp6", "rmb";
1316 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1321 interrupt-names = "wdog", "fatal", "ready",
1322 "handover", "stop-ack";
1324 power-domains = <&rpmpd MSM8916_VDDCX>,
1326 power-domain-names = "cx", "mx";
1332 clock-names = "iface", "bus", "mem", "xo";
1334 qcom,smem-states = <&hexagon_smp2p_out 0>;
1335 qcom,smem-state-names = "stop";
1338 reset-names = "mss_restart";
1340 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1345 memory-region = <&mba_mem>;
1349 memory-region = <&mpss_mem>;
1352 smd-edge {
1355 qcom,smd-edge = <0>;
1357 qcom,remote-pid = <1>;
1363 qcom,smd-channels = "fastrpcsmd-apps-dsp";
1366 #address-cells = <1>;
1367 #size-cells = <0>;
1370 compatible = "qcom,fastrpc-compute-cb";
1379 compatible = "qcom,apq8016-sbc-sndcard";
1381 reg-names = "mic-iomux", "spkr-iomux";
1384 lpass: audio-controller@7708000 {
1386 compatible = "qcom,lpass-cpu-apq8016";
1395 clock-names = "ahbix-clk",
1396 "pcnoc-mport-clk",
1397 "pcnoc-sway-clk",
1398 "mi2s-bit-clk0",
1399 "mi2s-bit-clk1",
1400 "mi2s-bit-clk2",
1401 "mi2s-bit-clk3";
1402 #sound-dai-cells = <1>;
1405 interrupt-names = "lpass-irq-lpaif";
1407 reg-names = "lpass-lpaif";
1409 #address-cells = <1>;
1410 #size-cells = <0>;
1413 lpass_codec: audio-codec@771c000 {
1414 compatible = "qcom,msm8916-wcd-digital-codec";
1418 clock-names = "ahbix-clk", "mclk";
1419 #sound-dai-cells = <1>;
1423 compatible = "qcom,sdhci-msm-v4";
1425 reg-names = "hc_mem", "core_mem";
1429 interrupt-names = "hc_irq", "pwr_irq";
1433 clock-names = "core", "iface", "xo";
1434 mmc-ddr-1_8v;
1435 bus-width = <8>;
1436 non-removable;
1441 compatible = "qcom,sdhci-msm-v4";
1443 reg-names = "hc_mem", "core_mem";
1447 interrupt-names = "hc_irq", "pwr_irq";
1451 clock-names = "core", "iface", "xo";
1452 bus-width = <4>;
1456 blsp_dma: dma-controller@7884000 {
1457 compatible = "qcom,bam-v1.7.0";
1461 clock-names = "bam_clk";
1462 #dma-cells = <1>;
1468 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
1472 clock-names = "core", "iface";
1474 dma-names = "rx", "tx";
1475 pinctrl-names = "default", "sleep";
1476 pinctrl-0 = <&blsp1_uart1_default>;
1477 pinctrl-1 = <&blsp1_uart1_sleep>;
1482 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
1486 clock-names = "core", "iface";
1488 dma-names = "rx", "tx";
1489 pinctrl-names = "default", "sleep";
1490 pinctrl-0 = <&blsp1_uart2_default>;
1491 pinctrl-1 = <&blsp1_uart2_sleep>;
1496 compatible = "qcom,i2c-qup-v2.2.1";
1501 clock-names = "iface", "core";
1502 pinctrl-names = "default", "sleep";
1503 pinctrl-0 = <&i2c1_default>;
1504 pinctrl-1 = <&i2c1_sleep>;
1505 #address-cells = <1>;
1506 #size-cells = <0>;
1511 compatible = "qcom,spi-qup-v2.2.1";
1516 clock-names = "core", "iface";
1518 dma-names = "rx", "tx";
1519 pinctrl-names = "default", "sleep";
1520 pinctrl-0 = <&spi1_default>;
1521 pinctrl-1 = <&spi1_sleep>;
1522 #address-cells = <1>;
1523 #size-cells = <0>;
1528 compatible = "qcom,i2c-qup-v2.2.1";
1533 clock-names = "iface", "core";
1534 pinctrl-names = "default", "sleep";
1535 pinctrl-0 = <&i2c2_default>;
1536 pinctrl-1 = <&i2c2_sleep>;
1537 #address-cells = <1>;
1538 #size-cells = <0>;
1543 compatible = "qcom,spi-qup-v2.2.1";
1548 clock-names = "core", "iface";
1550 dma-names = "rx", "tx";
1551 pinctrl-names = "default", "sleep";
1552 pinctrl-0 = <&spi2_default>;
1553 pinctrl-1 = <&spi2_sleep>;
1554 #address-cells = <1>;
1555 #size-cells = <0>;
1560 compatible = "qcom,i2c-qup-v2.2.1";
1565 clock-names = "iface", "core";
1566 pinctrl-names = "default", "sleep";
1567 pinctrl-0 = <&i2c3_default>;
1568 pinctrl-1 = <&i2c3_sleep>;
1569 #address-cells = <1>;
1570 #size-cells = <0>;
1575 compatible = "qcom,spi-qup-v2.2.1";
1580 clock-names = "core", "iface";
1582 dma-names = "rx", "tx";
1583 pinctrl-names = "default", "sleep";
1584 pinctrl-0 = <&spi3_default>;
1585 pinctrl-1 = <&spi3_sleep>;
1586 #address-cells = <1>;
1587 #size-cells = <0>;
1592 compatible = "qcom,i2c-qup-v2.2.1";
1597 clock-names = "iface", "core";
1598 pinctrl-names = "default", "sleep";
1599 pinctrl-0 = <&i2c4_default>;
1600 pinctrl-1 = <&i2c4_sleep>;
1601 #address-cells = <1>;
1602 #size-cells = <0>;
1607 compatible = "qcom,spi-qup-v2.2.1";
1612 clock-names = "core", "iface";
1614 dma-names = "rx", "tx";
1615 pinctrl-names = "default", "sleep";
1616 pinctrl-0 = <&spi4_default>;
1617 pinctrl-1 = <&spi4_sleep>;
1618 #address-cells = <1>;
1619 #size-cells = <0>;
1624 compatible = "qcom,i2c-qup-v2.2.1";
1629 clock-names = "iface", "core";
1630 pinctrl-names = "default", "sleep";
1631 pinctrl-0 = <&i2c5_default>;
1632 pinctrl-1 = <&i2c5_sleep>;
1633 #address-cells = <1>;
1634 #size-cells = <0>;
1639 compatible = "qcom,spi-qup-v2.2.1";
1644 clock-names = "core", "iface";
1646 dma-names = "rx", "tx";
1647 pinctrl-names = "default", "sleep";
1648 pinctrl-0 = <&spi5_default>;
1649 pinctrl-1 = <&spi5_sleep>;
1650 #address-cells = <1>;
1651 #size-cells = <0>;
1656 compatible = "qcom,i2c-qup-v2.2.1";
1661 clock-names = "iface", "core";
1662 pinctrl-names = "default", "sleep";
1663 pinctrl-0 = <&i2c6_default>;
1664 pinctrl-1 = <&i2c6_sleep>;
1665 #address-cells = <1>;
1666 #size-cells = <0>;
1671 compatible = "qcom,spi-qup-v2.2.1";
1676 clock-names = "core", "iface";
1678 dma-names = "rx", "tx";
1679 pinctrl-names = "default", "sleep";
1680 pinctrl-0 = <&spi6_default>;
1681 pinctrl-1 = <&spi6_sleep>;
1682 #address-cells = <1>;
1683 #size-cells = <0>;
1688 compatible = "qcom,ci-hdrc";
1695 clock-names = "iface", "core";
1696 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1697 assigned-clock-rates = <80000000>;
1699 reset-names = "core";
1702 hnp-disable;
1703 srp-disable;
1704 adp-disable;
1705 ahb-burst-config = <0>;
1706 phy-names = "usb-phy";
1709 #reset-cells = <1>;
1713 compatible = "qcom,usb-hs-phy-msm8916",
1714 "qcom,usb-hs-phy";
1715 #phy-cells = <0>;
1717 clock-names = "ref", "sleep";
1719 reset-names = "phy", "por";
1720 qcom,init-seq = /bits/ 8 <0x0 0x44
1727 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
1729 reg-names = "ccu", "dxe", "pmu";
1731 memory-region = <&wcnss_mem>;
1733 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
1738 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1740 power-domains = <&rpmpd MSM8916_VDDCX>,
1742 power-domain-names = "cx", "mx";
1745 qcom,state-names = "stop";
1747 pinctrl-names = "default";
1748 pinctrl-0 = <&wcnss_pin_a>;
1756 clock-names = "xo";
1759 smd-edge {
1763 qcom,smd-edge = <6>;
1764 qcom,remote-pid = <4>;
1770 qcom,smd-channels = "WCNSS_CTRL";
1775 compatible = "qcom,wcnss-bt";
1779 compatible = "qcom,wcnss-wlan";
1783 interrupt-names = "tx", "rx";
1785 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
1786 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
1792 intc: interrupt-controller@b000000 {
1793 compatible = "qcom,msm-qgic2";
1794 interrupt-controller;
1795 #interrupt-cells = <3>;
1802 compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
1804 #mbox-cells = <1>;
1806 clock-names = "pll", "aux";
1807 #clock-cells = <0>;
1811 compatible = "qcom,msm8916-a53pll";
1813 #clock-cells = <0>;
1817 #address-cells = <1>;
1818 #size-cells = <1>;
1820 compatible = "arm,armv7-timer-mem";
1822 clock-frequency = <19200000>;
1825 frame-number = <0>;
1833 frame-number = <1>;
1840 frame-number = <2>;
1847 frame-number = <3>;
1854 frame-number = <4>;
1861 frame-number = <5>;
1868 frame-number = <6>;
1876 thermal-zones {
1877 cpu0-1-thermal {
1878 polling-delay-passive = <250>;
1879 polling-delay = <1000>;
1881 thermal-sensors = <&tsens 5>;
1884 cpu0_1_alert0: trip-point0 {
1896 cooling-maps {
1899 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1907 cpu2-3-thermal {
1908 polling-delay-passive = <250>;
1909 polling-delay = <1000>;
1911 thermal-sensors = <&tsens 4>;
1914 cpu2_3_alert0: trip-point0 {
1926 cooling-maps {
1929 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1937 gpu-thermal {
1938 polling-delay-passive = <250>;
1939 polling-delay = <1000>;
1941 thermal-sensors = <&tsens 2>;
1944 gpu_alert0: trip-point0 {
1957 camera-thermal {
1958 polling-delay-passive = <250>;
1959 polling-delay = <1000>;
1961 thermal-sensors = <&tsens 1>;
1964 cam_alert0: trip-point0 {
1972 modem-thermal {
1973 polling-delay-passive = <250>;
1974 polling-delay = <1000>;
1976 thermal-sensors = <&tsens 0>;
1979 modem_alert0: trip-point0 {
1990 compatible = "arm,armv8-timer";
1998 #include "msm8916-pins.dtsi"