Lines Matching +full:hs400 +full:- +full:ds +full:- +full:delay

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <&bl_pp5000>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <32768>;
44 clock-output-names = "clk32k";
48 compatible = "regulator-fixed";
49 regulator-name = "it6505_pp18";
50 regulator-min-microvolt = <1800000>;
51 regulator-max-microvolt = <1800000>;
53 enable-active-high;
57 compatible = "regulator-fixed";
58 regulator-name = "lcd_pp3300";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 regulator-always-on;
62 regulator-boot-on;
66 compatible = "regulator-fixed";
67 regulator-name = "bl_pp5000";
68 regulator-min-microvolt = <5000000>;
69 regulator-max-microvolt = <5000000>;
70 regulator-always-on;
71 regulator-boot-on;
75 compatible = "regulator-fixed";
76 regulator-name = "mmc1_power";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
82 compatible = "regulator-fixed";
83 regulator-name = "mmc1_io";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <1800000>;
89 compatible = "regulator-fixed";
90 regulator-name = "pp1800_alw";
91 regulator-always-on;
92 regulator-boot-on;
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
98 compatible = "regulator-fixed";
99 regulator-name = "pp3300_alw";
100 regulator-always-on;
101 regulator-boot-on;
102 regulator-min-microvolt = <3300000>;
103 regulator-max-microvolt = <3300000>;
106 reserved_memory: reserved-memory {
107 #address-cells = <2>;
108 #size-cells = <2>;
112 compatible = "shared-dma-pool";
114 no-map;
120 sdmode-gpios = <&pio 175 0>;
124 compatible = "linux,bt-sco";
127 wifi_pwrseq: wifi-pwrseq {
128 compatible = "mmc-pwrseq-simple";
129 pinctrl-names = "default";
130 pinctrl-0 = <&wifi_pins_pwrseq>;
133 reset-gpios = <&pio 119 1>;
136 wifi_wakeup: wifi-wakeup {
137 compatible = "gpio-keys";
138 pinctrl-names = "default";
139 pinctrl-0 = <&wifi_pins_wakeup>;
145 wakeup-source;
149 tboard_thermistor1: thermal-sensor1 {
150 compatible = "generic-adc-thermal";
151 #thermal-sensor-cells = <0>;
152 io-channels = <&auxadc 0>;
153 io-channel-names = "sensor-channel";
154 temperature-lookup-table = < (-5000) 4241
183 tboard_thermistor2: thermal-sensor2 {
184 compatible = "generic-adc-thermal";
185 #thermal-sensor-cells = <0>;
186 io-channels = <&auxadc 1>;
187 io-channel-names = "sensor-channel";
188 temperature-lookup-table = < (-5000) 4241
223 proc-supply = <&mt6358_vproc12_reg>;
227 proc-supply = <&mt6358_vproc12_reg>;
231 proc-supply = <&mt6358_vproc12_reg>;
235 proc-supply = <&mt6358_vproc12_reg>;
239 proc-supply = <&mt6358_vproc11_reg>;
243 proc-supply = <&mt6358_vproc11_reg>;
247 proc-supply = <&mt6358_vproc11_reg>;
251 proc-supply = <&mt6358_vproc11_reg>;
256 #address-cells = <1>;
257 #size-cells = <0>;
261 enable-gpios = <&pio 45 0>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&panel_pins_default>;
264 avdd-supply = <&ppvarn_lcd>;
265 avee-supply = <&ppvarp_lcd>;
266 pp1800-supply = <&pp1800_lcd>;
270 remote-endpoint = <&dsi_out>;
278 remote-endpoint = <&panel_in>;
285 mali-supply = <&mt6358_vgpu_reg>;
286 sram-supply = <&mt6358_vsram_gpu_reg>;
290 pinctrl-names = "default";
291 pinctrl-0 = <&i2c0_pins>;
293 clock-frequency = <400000>;
294 #address-cells = <1>;
295 #size-cells = <0>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&i2c1_pins>;
302 clock-frequency = <100000>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&i2c3_pins>;
309 clock-frequency = <100000>;
310 #address-cells = <1>;
311 #size-cells = <0>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c5_pins>;
318 clock-frequency = <100000>;
319 #address-cells = <1>;
320 #size-cells = <0>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&i2c6_pins>;
327 clock-frequency = <100000>;
336 pinctrl-names = "default", "state_uhs";
337 pinctrl-0 = <&mmc0_pins_default>;
338 pinctrl-1 = <&mmc0_pins_uhs>;
339 bus-width = <8>;
340 max-frequency = <200000000>;
341 cap-mmc-highspeed;
342 mmc-hs200-1_8v;
343 mmc-hs400-1_8v;
344 cap-mmc-hw-reset;
345 no-sdio;
346 no-sd;
347 hs400-ds-delay = <0x12814>;
348 vmmc-supply = <&mt6358_vemc_reg>;
349 vqmmc-supply = <&mt6358_vio18_reg>;
350 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
351 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
352 non-removable;
357 pinctrl-names = "default", "state_uhs";
358 pinctrl-0 = <&mmc1_pins_default>;
359 pinctrl-1 = <&mmc1_pins_uhs>;
360 vmmc-supply = <&mmc1_fixed_power>;
361 vqmmc-supply = <&mmc1_fixed_io>;
362 mmc-pwrseq = <&wifi_pwrseq>;
363 bus-width = <4>;
364 max-frequency = <200000000>;
365 drv-type = <2>;
366 cap-sd-highspeed;
367 sd-uhs-sdr50;
368 sd-uhs-sdr104;
369 keep-power-in-suspend;
370 enable-sdio-wakeup;
371 cap-sdio-irq;
372 non-removable;
373 no-mmc;
374 no-sd;
375 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
376 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
377 #address-cells = <1>;
378 #size-cells = <0>;
380 qca_wifi: qca-wifi@1 {
387 regulator-always-on;
391 Avdd-supply = <&mt6358_vaud28_reg>;
395 regulator-min-microvolt = <2700000>;
396 regulator-max-microvolt = <2700000>;
400 regulator-min-microvolt = <2700000>;
401 regulator-max-microvolt = <2700000>;
405 bt_pins: bt-pins {
408 output-low;
415 input-enable;
416 bias-pull-up;
423 input-enable;
431 mediatek,pull-up-adv = <3>;
432 mediatek,drive-strength-adv = <00>;
440 mediatek,pull-up-adv = <3>;
441 mediatek,drive-strength-adv = <00>;
449 bias-disable;
450 mediatek,drive-strength-adv = <00>;
458 mediatek,pull-up-adv = <3>;
459 mediatek,drive-strength-adv = <00>;
467 bias-disable;
468 mediatek,drive-strength-adv = <00>;
476 mediatek,pull-up-adv = <3>;
477 mediatek,drive-strength-adv = <00>;
485 bias-disable;
489 mmc0_pins_default: mmc0-pins-default {
500 input-enable;
501 drive-strength = <MTK_DRIVE_14mA>;
502 mediatek,pull-up-adv = <01>;
507 drive-strength = <MTK_DRIVE_14mA>;
508 mediatek,pull-down-adv = <10>;
513 drive-strength = <MTK_DRIVE_14mA>;
514 mediatek,pull-down-adv = <01>;
518 mmc0_pins_uhs: mmc0-pins-uhs {
529 input-enable;
530 drive-strength = <MTK_DRIVE_14mA>;
531 mediatek,pull-up-adv = <01>;
536 drive-strength = <MTK_DRIVE_14mA>;
537 mediatek,pull-down-adv = <10>;
542 drive-strength = <MTK_DRIVE_14mA>;
543 mediatek,pull-down-adv = <10>;
548 drive-strength = <MTK_DRIVE_14mA>;
549 mediatek,pull-up-adv = <01>;
553 mmc1_pins_default: mmc1-pins-default {
560 input-enable;
561 mediatek,pull-up-adv = <10>;
566 input-enable;
567 mediatek,pull-down-adv = <10>;
571 mmc1_pins_uhs: mmc1-pins-uhs {
578 drive-strength = <MTK_DRIVE_6mA>;
579 input-enable;
580 mediatek,pull-up-adv = <10>;
585 drive-strength = <MTK_DRIVE_8mA>;
586 mediatek,pull-down-adv = <10>;
587 input-enable;
594 output-low;
595 bias-pull-up;
602 output-high;
603 bias-pull-up;
623 bias-disable;
633 bias-disable;
642 bias-disable;
646 mediatek,pull-down-adv = <00>;
656 bias-disable;
666 bias-disable;
676 bias-disable;
680 uart0_pins_default: uart0-pins-default {
683 input-enable;
684 bias-pull-up;
691 uart1_pins_default: uart1-pins-default {
694 input-enable;
695 bias-pull-up;
702 output-enable;
706 input-enable;
710 uart1_pins_sleep: uart1-pins-sleep {
713 input-enable;
714 bias-pull-up;
721 output-enable;
725 input-enable;
729 wifi_pins_pwrseq: wifi-pins-pwrseq {
732 output-low;
736 wifi_pins_wakeup: wifi-pins-wakeup {
739 input-enable;
746 pinctrl-names = "default";
747 pinctrl-0 = <&pwm0_pin_default>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&scp_pins>;
756 compatible = "google,cros-ec-rpmsg";
757 mtk,rpmsg-name = "cros-ec-rpmsg";
762 domain-supply = <&mt6358_vgpu_reg>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&spi0_pins>;
772 mediatek,pad-select = <0>;
774 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
779 spi-max-frequency = <1000000>;
780 pinctrl-names = "default";
781 pinctrl-0 = <&h1_int_od_l>;
782 interrupt-parent = <&pio>;
788 pinctrl-names = "default";
789 pinctrl-0 = <&spi1_pins>;
790 mediatek,pad-select = <0>;
793 w25q64dw: spi-flash@0 {
794 compatible = "winbond,w25q64dw", "jedec,spi-nor";
796 spi-max-frequency = <25000000>;
801 pinctrl-names = "default";
802 pinctrl-0 = <&spi2_pins>;
803 mediatek,pad-select = <0>;
806 cros_ec: cros-ec@0 {
807 compatible = "google,cros-ec-spi";
809 spi-max-frequency = <3000000>;
810 interrupt-parent = <&pio>;
812 pinctrl-names = "default";
813 pinctrl-0 = <&ec_ap_int_odl>;
815 i2c_tunnel: i2c-tunnel {
816 compatible = "google,cros-ec-i2c-tunnel";
817 google,remote-bus = <1>;
818 #address-cells = <1>;
819 #size-cells = <0>;
823 compatible = "google,extcon-usbc-cros-ec";
824 google,usb-port-id = <0>;
828 compatible = "google,cros-cbas";
834 pinctrl-names = "default";
835 pinctrl-0 = <&spi3_pins>;
836 mediatek,pad-select = <0>;
841 pinctrl-names = "default";
842 pinctrl-0 = <&spi4_pins>;
843 mediatek,pad-select = <0>;
848 pinctrl-names = "default";
849 pinctrl-0 = <&spi5_pins>;
850 mediatek,pad-select = <0>;
856 wakeup-source;
857 vusb33-supply = <&mt6358_vusb_reg>;
863 polling-delay = <1000>; /* milliseconds */
864 polling-delay-passive = <0>; /* milliseconds */
865 thermal-sensors = <&tboard_thermistor1>;
869 polling-delay = <1000>; /* milliseconds */
870 polling-delay-passive = <0>; /* milliseconds */
871 thermal-sensors = <&tboard_thermistor2>;
880 pinctrl-names = "default";
881 pinctrl-0 = <&uart0_pins_default>;
886 pinctrl-names = "default", "sleep";
887 pinctrl-0 = <&uart1_pins_default>;
888 pinctrl-1 = <&uart1_pins_sleep>;
890 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
894 pinctrl-names = "default";
895 pinctrl-0 = <&bt_pins>;
897 compatible = "qcom,qca6174-bt";
898 enable-gpios = <&pio 120 0>;
900 firmware-name = "nvm_00440302_i2s.bin";
905 #address-cells = <1>;
906 #size-cells = <0>;
907 vusb33-supply = <&mt6358_vusb_reg>;
916 #include <arm/cros-ec-keyboard.dtsi>
917 #include <arm/cros-ec-sbs.dtsi>