Lines Matching +full:0 +full:xcd
25 #clock-cells = <0>;
37 pinctrl-0 = <&pinctrl_keys>;
55 pinctrl-0 = <&pinctrl_audiopwr>;
66 pinctrl-0 = <&pinctrl_gnsspwr>;
77 pinctrl-0 = <&pinctrl_hub_pwr>;
88 pinctrl-0 = <&pinctrl_dsien>;
103 pinctrl-0 = <&pinctrl_dsibiasen>;
149 pinctrl-0 = <&pinctrl_hp>;
198 #sound-dai-cells = <0>;
203 pwms = <&pwm1 0 1000000000 0>;
251 pinctrl-0 = <&pinctrl_ecspi1>;
254 #size-cells = <0>;
257 nor_flash: flash@0 {
259 reg = <0>;
264 partition@0 {
266 reg = <0x0 0x30000>;
272 reg = <0x30000 0x10000>;
278 reg = <0x40000 0x1C0000>;
285 pinctrl-0 = <&pinctrl_pmic_5v>;
299 MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x83
306 MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x83
313 MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x80
315 MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x80
322 MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20 0x83
329 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x83
336 MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x83
338 MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28 0x83
340 MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x83
346 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x83
347 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x83
348 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
349 MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x83
356 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x80
363 MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x83
370 MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x83
377 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x180
384 MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x83
390 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000026
391 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000026
397 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000026
398 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000026
404 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000026
405 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000026
411 MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000026
412 MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026
419 MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0
421 MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0
428 MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x06
435 MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT 0x06
442 MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT 0x06
449 MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x80
456 MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x80
463 MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x80
470 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x80
477 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80
483 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
484 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
485 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
486 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
487 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
493 MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6
494 MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6
495 MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6
496 MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6
503 MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0
510 MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27 0x80
517 MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x83
523 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
524 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
530 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
531 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
537 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
538 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
544 MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
545 MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
546 MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
547 MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
553 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
554 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
555 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
556 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
557 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
558 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
559 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
560 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
561 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
562 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
563 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
564 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
570 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
571 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
572 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
573 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
574 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
575 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
576 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
577 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
578 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
579 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
580 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
581 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
587 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
588 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
589 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
590 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
591 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
592 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
593 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
594 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
595 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
596 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
597 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
598 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
604 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
605 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
606 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
607 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
608 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
609 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
610 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
611 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
617 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
618 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
619 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
620 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
621 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
622 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
623 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
624 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
630 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
631 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
632 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf
633 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf
634 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf
635 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf
636 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf
637 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
644 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f
652 pinctrl-0 = <&pinctrl_i2c1>;
657 reg = <0x3f>;
659 pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
667 #size-cells = <0>;
669 port@0 {
670 reg = <0>;
690 reg = <0x4b>;
692 pinctrl-0 = <&pinctrl_pmic>;
835 reg = <0x68>;
837 pinctrl-0 = <&pinctrl_rtc>;
846 pinctrl-0 = <&pinctrl_i2c2>;
851 reg = <0x1e>;
853 pinctrl-0 = <&pinctrl_mag>;
862 reg = <0x3e>;
877 reg = <0x60>;
879 pinctrl-0 = <&pinctrl_prox>;
886 reg = <0x6a>;
895 pinctrl-0 = <&pinctrl_i2c3>;
900 reg = <0x1a>;
905 #sound-dai-cells = <0>;
906 mic-cfg = <0x200>;
916 0x0000 /* n/c */
917 0x0001 /* gpio2, 1: default */
918 0x0013 /* gpio3, 2: dmicclk */
919 0x0000 /* n/c, 3: default */
920 0x8014 /* gpio5, 4: dmic_dat */
921 0x0000 /* gpio6, 5: default */
927 reg = <0x36>;
929 pinctrl-0 = <&pinctrl_bl>;
931 #size-cells = <0>;
936 led_backlight: led@0 {
937 reg = <0>;
946 reg = <0x38>;
948 pinctrl-0 = <&pinctrl_touch>;
960 pinctrl-0 = <&pinctrl_i2c4>;
965 reg = <0x36>;
969 pinctrl-0 = <&pinctrl_gauge>;
977 reg = <0x6a>;
979 pinctrl-0 = <&pinctrl_charger_in>;
1000 #size-cells = <0>;
1003 lcd_panel: panel@0 {
1005 reg = <0>;
1007 pinctrl-0 = <&pinctrl_dsirst>;
1046 pinctrl-0 = <&pinctrl_haptic>;
1052 pinctrl-0 = <&pinctrl_led_b>;
1058 pinctrl-0 = <&pinctrl_led_g>;
1064 pinctrl-0 = <&pinctrl_led_r>;
1070 pinctrl-0 = <&pinctrl_sai2>;
1079 pinctrl-0 = <&pinctrl_sai6>;
1097 pinctrl-0 = <&pinctrl_uart1>;
1103 pinctrl-0 = <&pinctrl_uart2>;
1115 pinctrl-0 = <&pinctrl_uart3>;
1121 pinctrl-0 = <&pinctrl_uart4>;
1137 #size-cells = <0>;
1142 port@0 {
1143 reg = <0>;
1163 #size-cells = <0>;
1170 #size-cells = <0>;
1183 pinctrl-0 = <&pinctrl_usdhc1>;
1197 pinctrl-0 = <&pinctrl_usdhc2>;
1212 pinctrl-0 = <&pinctrl_wdog>;