Lines Matching +full:mux +full:- +full:reg +full:- +full:masks
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "LTM4619-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
33 mdio-mux-1 {
34 compatible = "mdio-mux-multiplexer";
35 mux-controls = <&mux 0>;
36 mdio-parent-bus = <&emdio1>;
37 #address-cells=<1>;
38 #size-cells = <0>;
40 mdio@0 { /* On-board RTL8211F PHY #1 RGMII1 */
41 reg = <0x00>;
42 #address-cells = <1>;
43 #size-cells = <0>;
45 rgmii_phy1: ethernet-phy@1 {
46 compatible = "ethernet-phy-id001c.c916";
47 reg = <0x1>;
48 eee-broken-1000t;
52 mdio@8 { /* On-board RTL8211F PHY #2 RGMII2 */
53 reg = <0x8>;
54 #address-cells = <1>;
55 #size-cells = <0>;
57 rgmii_phy2: ethernet-phy@2 {
58 compatible = "ethernet-phy-id001c.c916";
59 reg = <0x2>;
60 eee-broken-1000t;
65 reg = <0x18>;
66 #address-cells = <1>;
67 #size-cells = <0>;
71 reg = <0x19>;
72 #address-cells = <1>;
73 #size-cells = <0>;
77 reg = <0x1a>;
78 #address-cells = <1>;
79 #size-cells = <0>;
83 reg = <0x1b>;
84 #address-cells = <1>;
85 #size-cells = <0>;
89 reg = <0x1c>;
90 #address-cells = <1>;
91 #size-cells = <0>;
95 reg = <0x1d>;
96 #address-cells = <1>;
97 #size-cells = <0>;
101 reg = <0x1e>;
102 #address-cells = <1>;
103 #size-cells = <0>;
107 reg = <0x1f>;
108 #address-cells = <1>;
109 #size-cells = <0>;
113 mdio-mux-2 {
114 compatible = "mdio-mux-multiplexer";
115 mux-controls = <&mux 1>;
116 mdio-parent-bus = <&emdio2>;
117 #address-cells=<1>;
118 #size-cells = <0>;
121 reg = <0x00>;
122 #address-cells = <1>;
123 #size-cells = <0>;
127 reg = <0x01>;
128 #address-cells = <1>;
129 #size-cells = <0>;
133 reg = <0x02>;
134 #address-cells = <1>;
135 #size-cells = <0>;
139 reg = <0x03>;
140 #address-cells = <1>;
141 #size-cells = <0>;
145 reg = <0x04>;
146 #address-cells = <1>;
147 #size-cells = <0>;
151 reg = <0x05>;
152 #address-cells = <1>;
153 #size-cells = <0>;
157 reg = <0x06>;
158 #address-cells = <1>;
159 #size-cells = <0>;
163 reg = <0x07>;
164 #address-cells = <1>;
165 #size-cells = <0>;
175 phy-handle = <&rgmii_phy1>;
176 phy-connection-type = "rgmii-id";
180 phy-handle = <&rgmii_phy2>;
181 phy-connection-type = "rgmii-id";
188 #address-cells = <1>;
189 #size-cells = <1>;
190 compatible = "jedec,spi-nor";
191 reg = <0>;
192 spi-max-frequency = <1000000>;
200 #address-cells = <1>;
201 #size-cells = <1>;
202 compatible = "jedec,spi-nor";
203 reg = <0>;
204 spi-max-frequency = <1000000>;
212 #address-cells = <1>;
213 #size-cells = <1>;
214 compatible = "jedec,spi-nor";
215 reg = <0>;
216 spi-max-frequency = <1000000>;
240 #address-cells = <1>;
241 #size-cells = <1>;
242 compatible = "jedec,spi-nor";
243 m25p,fast-read;
244 spi-max-frequency = <50000000>;
245 reg = <0>;
246 spi-rx-bus-width = <8>;
247 spi-tx-bus-width = <8>;
255 compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
256 "simple-mfd";
257 reg = <0x66>;
259 mux: mux-controller { label
260 compatible = "reg-mux";
261 #mux-control-cells = <1>;
262 mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
263 <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
267 i2c-mux@77 {
269 reg = <0x77>;
270 #address-cells = <1>;
271 #size-cells = <0>;
274 #address-cells = <1>;
275 #size-cells = <0>;
276 reg = <0x2>;
278 power-monitor@40 {
280 reg = <0x40>;
281 shunt-resistor = <500>;
284 power-monitor@41 {
286 reg = <0x41>;
287 shunt-resistor = <1000>;
292 #address-cells = <1>;
293 #size-cells = <0>;
294 reg = <0x3>;
296 temperature-sensor@4c {
298 reg = <0x4c>;
299 vcc-supply = <&sb_3v3>;
304 reg = <0x51>;