Lines Matching +full:ddr +full:- +full:pmu
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
33 #size-cells = <0>;
39 /* DRAM space - 1, size : 2 GB DRAM */
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <100000000>;
46 clock-output-names = "sysclk";
49 gic: interrupt-controller@6000000 {
50 compatible = "arm,gic-v3";
56 #interrupt-cells = <3>;
57 #address-cells = <2>;
58 #size-cells = <2>;
60 interrupt-controller;
63 its: gic-its@6020000 {
64 compatible = "arm,gic-v3-its";
65 msi-controller;
71 compatible = "fsl,ls2080a-rstcr", "syscon";
76 compatible ="syscon-reboot";
82 thermal-zones {
83 ddr-controller1 {
84 polling-delay-passive = <1000>;
85 polling-delay = <5000>;
86 thermal-sensors = <&tmu 1>;
89 ddr-ctrler1-crit {
97 ddr-controller2 {
98 polling-delay-passive = <1000>;
99 polling-delay = <5000>;
100 thermal-sensors = <&tmu 2>;
103 ddr-ctrler2-crit {
111 ddr-controller3 {
112 polling-delay-passive = <1000>;
113 polling-delay = <5000>;
114 thermal-sensors = <&tmu 3>;
117 ddr-ctrler3-crit {
125 core-cluster1 {
126 polling-delay-passive = <1000>;
127 polling-delay = <5000>;
128 thermal-sensors = <&tmu 4>;
131 core_cluster1_alert: core-cluster1-alert {
137 core-cluster1-crit {
144 cooling-maps {
147 cooling-device =
154 core-cluster2 {
155 polling-delay-passive = <1000>;
156 polling-delay = <5000>;
157 thermal-sensors = <&tmu 5>;
160 core_cluster2_alert: core-cluster2-alert {
166 core-cluster2-crit {
173 cooling-maps {
176 cooling-device =
183 core-cluster3 {
184 polling-delay-passive = <1000>;
185 polling-delay = <5000>;
186 thermal-sensors = <&tmu 6>;
189 core_cluster3_alert: core-cluster3-alert {
195 core-cluster3-crit {
202 cooling-maps {
205 cooling-device =
212 core-cluster4 {
213 polling-delay-passive = <1000>;
214 polling-delay = <5000>;
215 thermal-sensors = <&tmu 7>;
218 core_cluster4_alert: core-cluster4-alert {
224 core-cluster4-crit {
231 cooling-maps {
234 cooling-device =
243 compatible = "arm,armv8-timer";
244 interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
245 <1 14 4>, /* Physical Non-Secure PPI, active-low */
246 <1 11 4>, /* Virtual PPI, active-low */
247 <1 10 4>; /* Hypervisor PPI, active-low */
248 fsl,erratum-a008585;
251 pmu {
252 compatible = "arm,armv8-pmuv3";
253 interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
257 compatible = "arm,psci-0.2";
262 compatible = "simple-bus";
263 #address-cells = <2>;
264 #size-cells = <2>;
266 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
269 compatible = "fsl,ls2080a-clockgen";
271 #clock-cells = <2>;
276 compatible = "fsl,ls2080a-dcfg", "syscon";
278 little-endian;
282 compatible = "fsl,ls2080a-isc", "syscon";
284 little-endian;
285 #address-cells = <1>;
286 #size-cells = <1>;
289 extirq: interrupt-controller@14 {
290 compatible = "fsl,ls2080a-extirq", "fsl,ls1088a-extirq";
291 #interrupt-cells = <2>;
292 #address-cells = <0>;
293 interrupt-controller;
295 interrupt-map =
308 interrupt-map-mask = <0xffffffff 0x0>;
313 compatible = "fsl,qoriq-tmu";
316 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
317 fsl,tmu-calibration = <0x00000000 0x00000026
353 little-endian;
354 #thermal-sensor-cells = <1>;
390 compatible = "arm,sp805-wdt", "arm,primecell";
396 clock-names = "wdog_clk", "apb_pclk";
400 compatible = "arm,sp805-wdt", "arm,primecell";
406 clock-names = "wdog_clk", "apb_pclk";
410 compatible = "arm,sp805-wdt", "arm,primecell";
416 clock-names = "wdog_clk", "apb_pclk";
420 compatible = "arm,sp805-wdt", "arm,primecell";
426 clock-names = "wdog_clk", "apb_pclk";
430 compatible = "arm,sp805-wdt", "arm,primecell";
436 clock-names = "wdog_clk", "apb_pclk";
440 compatible = "arm,sp805-wdt", "arm,primecell";
446 clock-names = "wdog_clk", "apb_pclk";
450 compatible = "arm,sp805-wdt", "arm,primecell";
456 clock-names = "wdog_clk", "apb_pclk";
460 compatible = "arm,sp805-wdt", "arm,primecell";
466 clock-names = "wdog_clk", "apb_pclk";
470 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
471 fsl,sec-era = <8>;
472 #address-cells = <1>;
473 #size-cells = <1>;
477 dma-coherent;
480 compatible = "fsl,sec-v5.0-job-ring",
481 "fsl,sec-v4.0-job-ring";
487 compatible = "fsl,sec-v5.0-job-ring",
488 "fsl,sec-v4.0-job-ring";
494 compatible = "fsl,sec-v5.0-job-ring",
495 "fsl,sec-v4.0-job-ring";
501 compatible = "fsl,sec-v5.0-job-ring",
502 "fsl,sec-v4.0-job-ring";
509 compatible = "fsl,dpaa2-console";
513 ptp-timer@8b95000 {
514 compatible = "fsl,dpaa2-ptp";
518 little-endian;
519 fsl,extts-fifo;
523 compatible = "fsl,fman-memac-mdio";
525 little-endian;
526 #address-cells = <1>;
527 #size-cells = <0>;
532 compatible = "fsl,fman-memac-mdio";
534 little-endian;
535 #address-cells = <1>;
536 #size-cells = <0>;
541 compatible = "fsl,fman-memac-mdio";
543 little-endian;
544 #address-cells = <1>;
545 #size-cells = <0>;
548 pcs1: ethernet-phy@0 {
554 compatible = "fsl,fman-memac-mdio";
556 little-endian;
557 #address-cells = <1>;
558 #size-cells = <0>;
561 pcs2: ethernet-phy@0 {
567 compatible = "fsl,fman-memac-mdio";
569 little-endian;
570 #address-cells = <1>;
571 #size-cells = <0>;
574 pcs3: ethernet-phy@0 {
580 compatible = "fsl,fman-memac-mdio";
582 little-endian;
583 #address-cells = <1>;
584 #size-cells = <0>;
587 pcs4: ethernet-phy@0 {
593 compatible = "fsl,fman-memac-mdio";
595 little-endian;
596 #address-cells = <1>;
597 #size-cells = <0>;
600 pcs5: ethernet-phy@0 {
606 compatible = "fsl,fman-memac-mdio";
608 little-endian;
609 #address-cells = <1>;
610 #size-cells = <0>;
613 pcs6: ethernet-phy@0 {
619 compatible = "fsl,fman-memac-mdio";
621 little-endian;
622 #address-cells = <1>;
623 #size-cells = <0>;
626 pcs7: ethernet-phy@0 {
632 compatible = "fsl,fman-memac-mdio";
634 little-endian;
635 #address-cells = <1>;
636 #size-cells = <0>;
639 pcs8: ethernet-phy@0 {
645 compatible = "fsl,fman-memac-mdio";
647 little-endian;
648 #address-cells = <1>;
649 #size-cells = <0>;
652 pcs9: ethernet-phy@0 {
658 compatible = "fsl,fman-memac-mdio";
660 little-endian;
661 #address-cells = <1>;
662 #size-cells = <0>;
665 pcs10: ethernet-phy@0 {
671 compatible = "fsl,fman-memac-mdio";
673 little-endian;
674 #address-cells = <1>;
675 #size-cells = <0>;
678 pcs11: ethernet-phy@0 {
684 compatible = "fsl,fman-memac-mdio";
686 little-endian;
687 #address-cells = <1>;
688 #size-cells = <0>;
691 pcs12: ethernet-phy@0 {
697 compatible = "fsl,fman-memac-mdio";
699 little-endian;
700 #address-cells = <1>;
701 #size-cells = <0>;
704 pcs13: ethernet-phy@0 {
710 compatible = "fsl,fman-memac-mdio";
712 little-endian;
713 #address-cells = <1>;
714 #size-cells = <0>;
717 pcs14: ethernet-phy@0 {
723 compatible = "fsl,fman-memac-mdio";
725 little-endian;
726 #address-cells = <1>;
727 #size-cells = <0>;
730 pcs15: ethernet-phy@0 {
736 compatible = "fsl,fman-memac-mdio";
738 little-endian;
739 #address-cells = <1>;
740 #size-cells = <0>;
743 pcs16: ethernet-phy@0 {
748 fsl_mc: fsl-mc@80c000000 {
749 compatible = "fsl,qoriq-mc";
752 msi-parent = <&its>;
753 iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
754 dma-coherent;
755 #address-cells = <3>;
756 #size-cells = <1>;
759 * Region type 0x0 - MC portals
760 * Region type 0x1 - QBMAN portals
769 #address-cells = <1>;
770 #size-cells = <0>;
773 compatible = "fsl,qoriq-mc-dpmac";
775 pcs-handle = <&pcs1>;
779 compatible = "fsl,qoriq-mc-dpmac";
781 pcs-handle = <&pcs2>;
785 compatible = "fsl,qoriq-mc-dpmac";
787 pcs-handle = <&pcs3>;
791 compatible = "fsl,qoriq-mc-dpmac";
793 pcs-handle = <&pcs4>;
797 compatible = "fsl,qoriq-mc-dpmac";
799 pcs-handle = <&pcs5>;
803 compatible = "fsl,qoriq-mc-dpmac";
805 pcs-handle = <&pcs6>;
809 compatible = "fsl,qoriq-mc-dpmac";
811 pcs-handle = <&pcs7>;
815 compatible = "fsl,qoriq-mc-dpmac";
817 pcs-handle = <&pcs8>;
821 compatible = "fsl,qoriq-mc-dpmac";
823 pcs-handle = <&pcs9>;
827 compatible = "fsl,qoriq-mc-dpmac";
829 pcs-handle = <&pcs10>;
833 compatible = "fsl,qoriq-mc-dpmac";
835 pcs-handle = <&pcs11>;
839 compatible = "fsl,qoriq-mc-dpmac";
841 pcs-handle = <&pcs12>;
845 compatible = "fsl,qoriq-mc-dpmac";
847 pcs-handle = <&pcs13>;
851 compatible = "fsl,qoriq-mc-dpmac";
853 pcs-handle = <&pcs14>;
857 compatible = "fsl,qoriq-mc-dpmac";
859 pcs-handle = <&pcs15>;
863 compatible = "fsl,qoriq-mc-dpmac";
865 pcs-handle = <&pcs16>;
871 compatible = "arm,mmu-500";
873 #global-interrupts = <12>;
874 #iommu-cells = <1>;
875 stream-match-mask = <0x7C00>;
876 dma-coherent;
879 <0 15 4>, /* global non-secure fault */
880 <0 16 4>, /* combined non-secure interrupt */
881 /* performance counter interrupts 0-7 */
923 compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
924 #address-cells = <1>;
925 #size-cells = <0>;
930 clock-names = "dspi";
931 spi-num-chipselects = <5>;
936 compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
941 voltage-ranges = <1800 1800 3300 3300>;
942 sdhci,auto-cmd12;
943 little-endian;
944 bus-width = <4>;
948 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
951 gpio-controller;
952 little-endian;
953 #gpio-cells = <2>;
954 interrupt-controller;
955 #interrupt-cells = <2>;
959 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
962 gpio-controller;
963 little-endian;
964 #gpio-cells = <2>;
965 interrupt-controller;
966 #interrupt-cells = <2>;
970 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
973 gpio-controller;
974 little-endian;
975 #gpio-cells = <2>;
976 interrupt-controller;
977 #interrupt-cells = <2>;
981 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
984 gpio-controller;
985 little-endian;
986 #gpio-cells = <2>;
987 interrupt-controller;
988 #interrupt-cells = <2>;
993 compatible = "fsl,vf610-i2c";
994 #address-cells = <1>;
995 #size-cells = <0>;
998 clock-names = "i2c";
1005 compatible = "fsl,vf610-i2c";
1006 #address-cells = <1>;
1007 #size-cells = <0>;
1010 clock-names = "i2c";
1017 compatible = "fsl,vf610-i2c";
1018 #address-cells = <1>;
1019 #size-cells = <0>;
1022 clock-names = "i2c";
1029 compatible = "fsl,vf610-i2c";
1030 #address-cells = <1>;
1031 #size-cells = <0>;
1034 clock-names = "i2c";
1040 compatible = "fsl,ifc", "simple-bus";
1043 little-endian;
1044 #address-cells = <2>;
1045 #size-cells = <1>;
1053 compatible = "fsl,ls2080a-qspi";
1054 #address-cells = <1>;
1055 #size-cells = <0>;
1058 reg-names = "QuadSPI", "QuadSPI-memory";
1064 clock-names = "qspi_en", "qspi";
1069 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1070 reg-names = "regs", "config";
1072 interrupt-names = "intr";
1073 #address-cells = <3>;
1074 #size-cells = <2>;
1076 dma-coherent;
1077 num-viewport = <6>;
1078 bus-range = <0x0 0xff>;
1079 msi-parent = <&its>;
1080 #interrupt-cells = <1>;
1081 interrupt-map-mask = <0 0 0 7>;
1082 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
1086 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1091 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1092 reg-names = "regs", "config";
1094 interrupt-names = "intr";
1095 #address-cells = <3>;
1096 #size-cells = <2>;
1098 dma-coherent;
1099 num-viewport = <6>;
1100 bus-range = <0x0 0xff>;
1101 msi-parent = <&its>;
1102 #interrupt-cells = <1>;
1103 interrupt-map-mask = <0 0 0 7>;
1104 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
1108 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1113 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1114 reg-names = "regs", "config";
1116 interrupt-names = "intr";
1117 #address-cells = <3>;
1118 #size-cells = <2>;
1120 dma-coherent;
1121 num-viewport = <256>;
1122 bus-range = <0x0 0xff>;
1123 msi-parent = <&its>;
1124 #interrupt-cells = <1>;
1125 interrupt-map-mask = <0 0 0 7>;
1126 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
1130 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1135 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
1136 reg-names = "regs", "config";
1138 interrupt-names = "intr";
1139 #address-cells = <3>;
1140 #size-cells = <2>;
1142 dma-coherent;
1143 num-viewport = <6>;
1144 bus-range = <0x0 0xff>;
1145 msi-parent = <&its>;
1146 #interrupt-cells = <1>;
1147 interrupt-map-mask = <0 0 0 7>;
1148 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
1152 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1158 compatible = "fsl,ls2080a-ahci";
1163 dma-coherent;
1168 compatible = "fsl,ls2080a-ahci";
1173 dma-coherent;
1182 snps,quirk-frame-length-adjustment = <0x20>;
1184 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1193 snps,quirk-frame-length-adjustment = <0x20>;
1195 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1199 compatible = "arm,ccn-504";
1204 rcpm: power-controller@1e34040 {
1205 compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+";
1207 #fsl,rcpm-wakeup-cells = <6>;
1208 little-endian;
1212 compatible = "fsl,ls208xa-ftm-alarm";
1214 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
1219 ddr1: memory-controller@1080000 {
1220 compatible = "fsl,qoriq-memory-controller";
1223 little-endian;
1226 ddr2: memory-controller@1090000 {
1227 compatible = "fsl,qoriq-memory-controller";
1230 little-endian;
1235 compatible = "linaro,optee-tz";