Lines Matching +full:combined +full:- +full:sensors
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
29 /* We have 2 clusters having 4 Cortex-A53 cores each */
32 compatible = "arm,cortex-a53";
35 cpu-idle-states = <&CPU_PH20>;
36 #cooling-cells = <2>;
41 compatible = "arm,cortex-a53";
44 cpu-idle-states = <&CPU_PH20>;
45 #cooling-cells = <2>;
50 compatible = "arm,cortex-a53";
53 cpu-idle-states = <&CPU_PH20>;
54 #cooling-cells = <2>;
59 compatible = "arm,cortex-a53";
62 cpu-idle-states = <&CPU_PH20>;
63 #cooling-cells = <2>;
68 compatible = "arm,cortex-a53";
71 cpu-idle-states = <&CPU_PH20>;
72 #cooling-cells = <2>;
77 compatible = "arm,cortex-a53";
80 cpu-idle-states = <&CPU_PH20>;
81 #cooling-cells = <2>;
86 compatible = "arm,cortex-a53";
89 cpu-idle-states = <&CPU_PH20>;
90 #cooling-cells = <2>;
95 compatible = "arm,cortex-a53";
98 cpu-idle-states = <&CPU_PH20>;
99 #cooling-cells = <2>;
102 CPU_PH20: cpu-ph20 {
103 compatible = "arm,idle-state";
104 idle-state-name = "PH20";
105 arm,psci-suspend-param = <0x0>;
106 entry-latency-us = <1000>;
107 exit-latency-us = <1000>;
108 min-residency-us = <3000>;
112 gic: interrupt-controller@6000000 {
113 compatible = "arm,gic-v3";
114 #interrupt-cells = <3>;
115 interrupt-controller;
122 #address-cells = <2>;
123 #size-cells = <2>;
126 its: gic-its@6020000 {
127 compatible = "arm,gic-v3-its";
128 msi-controller;
133 thermal-zones {
134 core-cluster {
135 polling-delay-passive = <1000>;
136 polling-delay = <5000>;
137 thermal-sensors = <&tmu 0>;
140 core_cluster_alert: core-cluster-alert {
146 core-cluster-crit {
153 cooling-maps {
156 cooling-device =
170 polling-delay-passive = <1000>;
171 polling-delay = <5000>;
172 thermal-sensors = <&tmu 1>;
175 soc-crit {
185 compatible = "arm,armv8-timer";
187 <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
193 compatible = "arm,cortex-a53-pmu";
198 compatible = "arm,psci-0.2";
203 compatible = "fixed-clock";
204 #clock-cells = <0>;
205 clock-frequency = <100000000>;
206 clock-output-names = "sysclk";
210 compatible = "simple-bus";
211 #address-cells = <2>;
212 #size-cells = <2>;
214 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
217 compatible = "fsl,ls1088a-clockgen";
219 #clock-cells = <2>;
224 compatible = "fsl,ls1088a-dcfg", "syscon";
226 little-endian;
230 compatible = "fsl,ls1088a-isc", "syscon";
232 little-endian;
233 #address-cells = <1>;
234 #size-cells = <1>;
237 extirq: interrupt-controller@14 {
238 compatible = "fsl,ls1088a-extirq";
239 #interrupt-cells = <2>;
240 #address-cells = <0>;
241 interrupt-controller;
243 interrupt-map =
256 interrupt-map-mask = <0xffffffff 0x0>;
261 compatible = "fsl,qoriq-tmu";
264 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
265 fsl,tmu-calibration =
307 little-endian;
308 #thermal-sensor-cells = <1>;
312 compatible = "fsl,ls1088a-dspi",
313 "fsl,ls1021a-v1.0-dspi";
314 #address-cells = <1>;
315 #size-cells = <0>;
318 clock-names = "dspi";
321 spi-num-chipselects = <6>;
344 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
347 little-endian;
348 gpio-controller;
349 #gpio-cells = <2>;
350 interrupt-controller;
351 #interrupt-cells = <2>;
355 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
358 little-endian;
359 gpio-controller;
360 #gpio-cells = <2>;
361 interrupt-controller;
362 #interrupt-cells = <2>;
366 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
369 little-endian;
370 gpio-controller;
371 #gpio-cells = <2>;
372 interrupt-controller;
373 #interrupt-cells = <2>;
377 compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
380 little-endian;
381 gpio-controller;
382 #gpio-cells = <2>;
383 interrupt-controller;
384 #interrupt-cells = <2>;
388 compatible = "fsl,ifc", "simple-bus";
391 little-endian;
392 #address-cells = <2>;
393 #size-cells = <1>;
398 compatible = "fsl,vf610-i2c";
399 #address-cells = <1>;
400 #size-cells = <0>;
409 compatible = "fsl,vf610-i2c";
410 #address-cells = <1>;
411 #size-cells = <0>;
420 compatible = "fsl,vf610-i2c";
421 #address-cells = <1>;
422 #size-cells = <0>;
431 compatible = "fsl,vf610-i2c";
432 #address-cells = <1>;
433 #size-cells = <0>;
442 compatible = "fsl,ls2080a-qspi";
443 #address-cells = <1>;
444 #size-cells = <0>;
447 reg-names = "QuadSPI", "QuadSPI-memory";
449 clock-names = "qspi_en", "qspi";
458 compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
461 clock-frequency = <0>;
463 voltage-ranges = <1800 1800 3300 3300>;
464 sdhci,auto-cmd12;
465 little-endian;
466 bus-width = <4>;
475 snps,quirk-frame-length-adjustment = <0x20>;
477 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
486 snps,quirk-frame-length-adjustment = <0x20>;
492 compatible = "fsl,ls1088a-ahci";
495 reg-names = "ahci", "sata-ecc";
499 dma-coherent;
504 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
505 fsl,sec-era = <8>;
506 #address-cells = <1>;
507 #size-cells = <1>;
511 dma-coherent;
514 compatible = "fsl,sec-v5.0-job-ring",
515 "fsl,sec-v4.0-job-ring";
521 compatible = "fsl,sec-v5.0-job-ring",
522 "fsl,sec-v4.0-job-ring";
528 compatible = "fsl,sec-v5.0-job-ring",
529 "fsl,sec-v4.0-job-ring";
535 compatible = "fsl,sec-v5.0-job-ring",
536 "fsl,sec-v4.0-job-ring";
543 compatible = "fsl,ls1088a-pcie";
546 reg-names = "regs", "config";
548 interrupt-names = "aer";
549 #address-cells = <3>;
550 #size-cells = <2>;
552 dma-coherent;
553 num-viewport = <256>;
554 bus-range = <0x0 0xff>;
556 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
557 msi-parent = <&its>;
558 #interrupt-cells = <1>;
559 interrupt-map-mask = <0 0 0 7>;
560 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
564 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
568 pcie_ep1: pcie-ep@3400000 {
569 compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
572 reg-names = "regs", "addr_space";
573 num-ib-windows = <24>;
574 num-ob-windows = <256>;
575 max-functions = /bits/ 8 <2>;
580 compatible = "fsl,ls1088a-pcie";
583 reg-names = "regs", "config";
585 interrupt-names = "aer";
586 #address-cells = <3>;
587 #size-cells = <2>;
589 dma-coherent;
590 num-viewport = <6>;
591 bus-range = <0x0 0xff>;
593 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
594 msi-parent = <&its>;
595 #interrupt-cells = <1>;
596 interrupt-map-mask = <0 0 0 7>;
597 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
601 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
605 pcie_ep2: pcie-ep@3500000 {
606 compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
609 reg-names = "regs", "addr_space";
610 num-ib-windows = <6>;
611 num-ob-windows = <6>;
616 compatible = "fsl,ls1088a-pcie";
619 reg-names = "regs", "config";
621 interrupt-names = "aer";
622 #address-cells = <3>;
623 #size-cells = <2>;
625 dma-coherent;
626 num-viewport = <6>;
627 bus-range = <0x0 0xff>;
629 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
630 msi-parent = <&its>;
631 #interrupt-cells = <1>;
632 interrupt-map-mask = <0 0 0 7>;
633 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
637 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
641 pcie_ep3: pcie-ep@3600000 {
642 compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
645 reg-names = "regs", "addr_space";
646 num-ib-windows = <6>;
647 num-ob-windows = <6>;
652 compatible = "arm,mmu-500";
654 #iommu-cells = <1>;
655 stream-match-mask = <0x7C00>;
656 #global-interrupts = <12>;
659 // combined secure
661 // global non-secure fault
663 // combined non-secure
665 // performance counter interrupts 0-7
742 compatible = "fsl,dpaa2-console";
746 ptp-timer@8b95000 {
747 compatible = "fsl,dpaa2-ptp";
751 little-endian;
752 fsl,extts-fifo;
756 compatible = "fsl,fman-memac-mdio";
758 little-endian;
759 #address-cells = <1>;
760 #size-cells = <0>;
765 compatible = "fsl,fman-memac-mdio";
767 little-endian;
768 #address-cells = <1>;
769 #size-cells = <0>;
774 compatible = "fsl,fman-memac-mdio";
776 little-endian;
777 #address-cells = <1>;
778 #size-cells = <0>;
781 pcs1: ethernet-phy@0 {
787 compatible = "fsl,fman-memac-mdio";
789 little-endian;
790 #address-cells = <1>;
791 #size-cells = <0>;
794 pcs2: ethernet-phy@0 {
800 compatible = "fsl,fman-memac-mdio";
802 little-endian;
803 #address-cells = <1>;
804 #size-cells = <0>;
807 pcs3_0: ethernet-phy@0 {
811 pcs3_1: ethernet-phy@1 {
815 pcs3_2: ethernet-phy@2 {
819 pcs3_3: ethernet-phy@3 {
825 compatible = "fsl,fman-memac-mdio";
827 little-endian;
828 #address-cells = <1>;
829 #size-cells = <0>;
832 pcs7_0: ethernet-phy@0 {
836 pcs7_1: ethernet-phy@1 {
840 pcs7_2: ethernet-phy@2 {
844 pcs7_3: ethernet-phy@3 {
850 compatible = "arm,sp805-wdt", "arm,primecell";
856 clock-names = "wdog_clk", "apb_pclk";
860 compatible = "arm,sp805-wdt", "arm,primecell";
866 clock-names = "wdog_clk", "apb_pclk";
870 compatible = "arm,sp805-wdt", "arm,primecell";
876 clock-names = "wdog_clk", "apb_pclk";
880 compatible = "arm,sp805-wdt", "arm,primecell";
886 clock-names = "wdog_clk", "apb_pclk";
890 compatible = "arm,sp805-wdt", "arm,primecell";
896 clock-names = "wdog_clk", "apb_pclk";
900 compatible = "arm,sp805-wdt", "arm,primecell";
906 clock-names = "wdog_clk", "apb_pclk";
910 compatible = "arm,sp805-wdt", "arm,primecell";
916 clock-names = "wdog_clk", "apb_pclk";
920 compatible = "arm,sp805-wdt", "arm,primecell";
926 clock-names = "wdog_clk", "apb_pclk";
929 fsl_mc: fsl-mc@80c000000 {
930 compatible = "fsl,qoriq-mc";
933 msi-parent = <&its>;
934 iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
935 dma-coherent;
936 #address-cells = <3>;
937 #size-cells = <1>;
940 * Region type 0x0 - MC portals
941 * Region type 0x1 - QBMAN portals
947 #address-cells = <1>;
948 #size-cells = <0>;
951 compatible = "fsl,qoriq-mc-dpmac";
956 compatible = "fsl,qoriq-mc-dpmac";
961 compatible = "fsl,qoriq-mc-dpmac";
966 compatible = "fsl,qoriq-mc-dpmac";
971 compatible = "fsl,qoriq-mc-dpmac";
976 compatible = "fsl,qoriq-mc-dpmac";
981 compatible = "fsl,qoriq-mc-dpmac";
986 compatible = "fsl,qoriq-mc-dpmac";
991 compatible = "fsl,qoriq-mc-dpmac";
996 compatible = "fsl,qoriq-mc-dpmac";
1002 rcpm: power-controller@1e34040 {
1003 compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+";
1005 #fsl,rcpm-wakeup-cells = <6>;
1006 little-endian;
1010 compatible = "fsl,ls1088a-ftm-alarm";
1012 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
1019 compatible = "linaro,optee-tz";