Lines Matching +full:ddr +full:- +full:pmu
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
36 #address-cells = <1>;
37 #size-cells = <0>;
41 compatible = "arm,cortex-a72";
44 next-level-cache = <&l2>;
45 cpu-idle-states = <&CPU_PH20>;
46 #cooling-cells = <2>;
51 compatible = "arm,cortex-a72";
54 next-level-cache = <&l2>;
55 cpu-idle-states = <&CPU_PH20>;
56 #cooling-cells = <2>;
61 compatible = "arm,cortex-a72";
64 next-level-cache = <&l2>;
65 cpu-idle-states = <&CPU_PH20>;
66 #cooling-cells = <2>;
71 compatible = "arm,cortex-a72";
74 next-level-cache = <&l2>;
75 cpu-idle-states = <&CPU_PH20>;
76 #cooling-cells = <2>;
79 l2: l2-cache {
84 idle-states {
86 * PSCI node is not added default, U-boot will add missing
89 entry-method = "psci";
91 CPU_PH20: cpu-ph20 {
92 compatible = "arm,idle-state";
93 idle-state-name = "PH20";
94 arm,psci-suspend-param = <0x0>;
95 entry-latency-us = <1000>;
96 exit-latency-us = <1000>;
97 min-residency-us = <3000>;
108 compatible = "fixed-clock";
109 #clock-cells = <0>;
110 clock-frequency = <100000000>;
111 clock-output-names = "sysclk";
115 compatible ="syscon-reboot";
121 thermal-zones {
122 ddr-controller {
123 polling-delay-passive = <1000>;
124 polling-delay = <5000>;
125 thermal-sensors = <&tmu 0>;
128 ddr-ctrler-alert {
134 ddr-ctrler-crit {
143 polling-delay-passive = <1000>;
144 polling-delay = <5000>;
145 thermal-sensors = <&tmu 1>;
148 serdes-alert {
154 serdes-crit {
163 polling-delay-passive = <1000>;
164 polling-delay = <5000>;
165 thermal-sensors = <&tmu 2>;
168 fman-alert {
174 fman-crit {
182 core-cluster {
183 polling-delay-passive = <1000>;
184 polling-delay = <5000>;
185 thermal-sensors = <&tmu 3>;
188 core_cluster_alert: core-cluster-alert {
194 core_cluster_crit: core-cluster-crit {
201 cooling-maps {
204 cooling-device =
214 polling-delay-passive = <1000>;
215 polling-delay = <5000>;
216 thermal-sensors = <&tmu 4>;
219 sec-alert {
225 sec-crit {
235 compatible = "arm,armv8-timer";
246 pmu {
247 compatible = "arm,cortex-a72-pmu";
252 interrupt-affinity = <&cpu0>,
258 gic: interrupt-controller@1400000 {
259 compatible = "arm,gic-400";
260 #interrupt-cells = <3>;
261 interrupt-controller;
271 compatible = "simple-bus";
272 #address-cells = <2>;
273 #size-cells = <2>;
276 ddr: memory-controller@1080000 { label
277 compatible = "fsl,qoriq-memory-controller";
280 big-endian;
284 compatible = "fsl,ifc", "simple-bus";
291 compatible = "fsl,ls1021a-qspi";
292 #address-cells = <1>;
293 #size-cells = <0>;
296 reg-names = "QuadSPI", "QuadSPI-memory";
298 clock-names = "qspi_en", "qspi";
307 compatible = "fsl,ls1046a-esdhc", "fsl,esdhc";
311 voltage-ranges = <1800 1800 3300 3300>;
312 sdhci,auto-cmd12;
313 big-endian;
314 bus-width = <4>;
318 compatible = "fsl,ls1046a-scfg", "syscon";
320 big-endian;
321 #address-cells = <1>;
322 #size-cells = <1>;
325 extirq: interrupt-controller@1ac {
326 compatible = "fsl,ls1046a-extirq", "fsl,ls1043a-extirq";
327 #interrupt-cells = <2>;
328 #address-cells = <0>;
329 interrupt-controller;
331 interrupt-map =
344 interrupt-map-mask = <0xffffffff 0x0>;
349 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
350 "fsl,sec-v4.0";
351 fsl,sec-era = <8>;
352 #address-cells = <1>;
353 #size-cells = <1>;
357 dma-coherent;
360 compatible = "fsl,sec-v5.4-job-ring",
361 "fsl,sec-v5.0-job-ring",
362 "fsl,sec-v4.0-job-ring";
368 compatible = "fsl,sec-v5.4-job-ring",
369 "fsl,sec-v5.0-job-ring",
370 "fsl,sec-v4.0-job-ring";
376 compatible = "fsl,sec-v5.4-job-ring",
377 "fsl,sec-v5.0-job-ring",
378 "fsl,sec-v4.0-job-ring";
384 compatible = "fsl,sec-v5.4-job-ring",
385 "fsl,sec-v5.0-job-ring",
386 "fsl,sec-v4.0-job-ring";
396 memory-region = <&qman_fqd &qman_pfdr>;
404 memory-region = <&bman_fbpr>;
408 qportals: qman-portals@500000000 {
412 bportals: bman-portals@508000000 {
417 compatible = "fsl,ls1046a-dcfg", "syscon";
419 big-endian;
423 compatible = "fsl,ls1046a-clockgen";
425 #clock-cells = <2>;
430 compatible = "fsl,qoriq-tmu";
433 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
434 fsl,tmu-calibration =
476 big-endian;
477 #thermal-sensor-cells = <1>;
481 compatible = "fsl,ls1021a-v1.0-dspi";
482 #address-cells = <1>;
483 #size-cells = <0>;
486 clock-names = "dspi";
489 spi-num-chipselects = <5>;
490 big-endian;
495 compatible = "fsl,vf610-i2c";
496 #address-cells = <1>;
497 #size-cells = <0>;
504 dma-names = "tx", "rx";
509 compatible = "fsl,vf610-i2c";
510 #address-cells = <1>;
511 #size-cells = <0>;
520 compatible = "fsl,vf610-i2c";
521 #address-cells = <1>;
522 #size-cells = <0>;
531 compatible = "fsl,vf610-i2c";
532 #address-cells = <1>;
533 #size-cells = <0>;
578 compatible = "fsl,qoriq-gpio";
581 gpio-controller;
582 #gpio-cells = <2>;
583 interrupt-controller;
584 #interrupt-cells = <2>;
588 compatible = "fsl,qoriq-gpio";
591 gpio-controller;
592 #gpio-cells = <2>;
593 interrupt-controller;
594 #interrupt-cells = <2>;
598 compatible = "fsl,qoriq-gpio";
601 gpio-controller;
602 #gpio-cells = <2>;
603 interrupt-controller;
604 #interrupt-cells = <2>;
608 compatible = "fsl,qoriq-gpio";
611 gpio-controller;
612 #gpio-cells = <2>;
613 interrupt-controller;
614 #interrupt-cells = <2>;
618 compatible = "fsl,ls1021a-lpuart";
623 clock-names = "ipg";
628 compatible = "fsl,ls1021a-lpuart";
633 clock-names = "ipg";
638 compatible = "fsl,ls1021a-lpuart";
643 clock-names = "ipg";
648 compatible = "fsl,ls1021a-lpuart";
653 clock-names = "ipg";
658 compatible = "fsl,ls1021a-lpuart";
663 clock-names = "ipg";
668 compatible = "fsl,ls1021a-lpuart";
673 clock-names = "ipg";
678 compatible = "fsl,imx21-wdt";
683 big-endian;
687 #dma-cells = <2>;
688 compatible = "fsl,vf610-edma";
694 interrupt-names = "edma-tx", "edma-err";
695 dma-channels = <32>;
696 big-endian;
697 clock-names = "dmamux0", "dmamux1";
709 snps,quirk-frame-length-adjustment = <0x20>;
711 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
719 snps,quirk-frame-length-adjustment = <0x20>;
721 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
729 snps,quirk-frame-length-adjustment = <0x20>;
731 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
735 compatible = "fsl,ls1046a-ahci";
738 reg-names = "ahci", "sata-ecc";
744 msi1: msi-controller@1580000 {
745 compatible = "fsl,ls1046a-msi";
746 msi-controller;
754 msi2: msi-controller@1590000 {
755 compatible = "fsl,ls1046a-msi";
756 msi-controller;
764 msi3: msi-controller@15a0000 {
765 compatible = "fsl,ls1046a-msi";
766 msi-controller;
775 compatible = "fsl,ls1046a-pcie";
778 reg-names = "regs", "config";
781 interrupt-names = "aer", "pme";
782 #address-cells = <3>;
783 #size-cells = <2>;
785 dma-coherent;
786 num-viewport = <8>;
787 bus-range = <0x0 0xff>;
789 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
790 msi-parent = <&msi1>, <&msi2>, <&msi3>;
791 #interrupt-cells = <1>;
792 interrupt-map-mask = <0 0 0 7>;
793 interrupt-map = <0000 0 0 1 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
801 compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
804 reg-names = "regs", "addr_space";
805 num-ib-windows = <6>;
806 num-ob-windows = <8>;
811 compatible = "fsl,ls1046a-pcie";
814 reg-names = "regs", "config";
817 interrupt-names = "aer", "pme";
818 #address-cells = <3>;
819 #size-cells = <2>;
821 dma-coherent;
822 num-viewport = <8>;
823 bus-range = <0x0 0xff>;
825 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
826 msi-parent = <&msi2>, <&msi3>, <&msi1>;
827 #interrupt-cells = <1>;
828 interrupt-map-mask = <0 0 0 7>;
829 interrupt-map = <0000 0 0 1 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
837 compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
840 reg-names = "regs", "addr_space";
841 num-ib-windows = <6>;
842 num-ob-windows = <8>;
847 compatible = "fsl,ls1046a-pcie";
850 reg-names = "regs", "config";
853 interrupt-names = "aer", "pme";
854 #address-cells = <3>;
855 #size-cells = <2>;
857 dma-coherent;
858 num-viewport = <8>;
859 bus-range = <0x0 0xff>;
861 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
862 msi-parent = <&msi3>, <&msi1>, <&msi2>;
863 #interrupt-cells = <1>;
864 interrupt-map-mask = <0 0 0 7>;
865 interrupt-map = <0000 0 0 1 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
873 compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep";
876 reg-names = "regs", "addr_space";
877 num-ib-windows = <6>;
878 num-ob-windows = <8>;
882 qdma: dma-controller@8380000 {
883 compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
892 interrupt-names = "qdma-error", "qdma-queue0",
893 "qdma-queue1", "qdma-queue2", "qdma-queue3";
894 dma-channels = <8>;
895 block-number = <1>;
896 block-offset = <0x10000>;
897 fsl,dma-queues = <2>;
898 status-sizes = <64>;
899 queue-sizes = <64 64>;
900 big-endian;
903 rcpm: power-controller@1ee2140 {
904 compatible = "fsl,ls1046a-rcpm", "fsl,qoriq-rcpm-2.1+";
906 #fsl,rcpm-wakeup-cells = <1>;
910 compatible = "fsl,ls1046a-ftm-alarm";
912 fsl,rcpm-wakeup = <&rcpm 0x20000>;
914 big-endian;
918 reserved-memory {
919 #address-cells = <2>;
920 #size-cells = <2>;
923 bman_fbpr: bman-fbpr {
924 compatible = "shared-dma-pool";
927 no-map;
930 qman_fqd: qman-fqd {
931 compatible = "shared-dma-pool";
934 no-map;
937 qman_pfdr: qman-pfdr {
938 compatible = "shared-dma-pool";
941 no-map;
947 compatible = "linaro,optee-tz";
953 #include "qoriq-qman-portals.dtsi"
954 #include "qoriq-bman-portals.dtsi"