Lines Matching +full:fsl +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 compatible = "fsl,ls1043a";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 * We expect the enable-method for cpu's to be "psci", but this
42 * Currently supported enable-method is psci v0.2
46 compatible = "arm,cortex-a53";
49 next-level-cache = <&l2>;
50 cpu-idle-states = <&CPU_PH20>;
51 #cooling-cells = <2>;
56 compatible = "arm,cortex-a53";
59 next-level-cache = <&l2>;
60 cpu-idle-states = <&CPU_PH20>;
61 #cooling-cells = <2>;
66 compatible = "arm,cortex-a53";
69 next-level-cache = <&l2>;
70 cpu-idle-states = <&CPU_PH20>;
71 #cooling-cells = <2>;
76 compatible = "arm,cortex-a53";
79 next-level-cache = <&l2>;
80 cpu-idle-states = <&CPU_PH20>;
81 #cooling-cells = <2>;
84 l2: l2-cache {
89 idle-states {
91 * PSCI node is not added default, U-boot will add missing
94 entry-method = "psci";
96 CPU_PH20: cpu-ph20 {
97 compatible = "arm,idle-state";
98 idle-state-name = "PH20";
99 arm,psci-suspend-param = <0x0>;
100 entry-latency-us = <1000>;
101 exit-latency-us = <1000>;
102 min-residency-us = <3000>;
112 reserved-memory {
113 #address-cells = <2>;
114 #size-cells = <2>;
117 bman_fbpr: bman-fbpr {
118 compatible = "shared-dma-pool";
121 no-map;
124 qman_fqd: qman-fqd {
125 compatible = "shared-dma-pool";
128 no-map;
131 qman_pfdr: qman-pfdr {
132 compatible = "shared-dma-pool";
135 no-map;
140 compatible = "fixed-clock";
141 #clock-cells = <0>;
142 clock-frequency = <100000000>;
143 clock-output-names = "sysclk";
147 compatible ="syscon-reboot";
153 thermal-zones {
154 ddr-controller {
155 polling-delay-passive = <1000>;
156 polling-delay = <5000>;
157 thermal-sensors = <&tmu 0>;
160 ddr-ctrler-alert {
166 ddr-ctrler-crit {
175 polling-delay-passive = <1000>;
176 polling-delay = <5000>;
177 thermal-sensors = <&tmu 1>;
180 serdes-alert {
186 serdes-crit {
195 polling-delay-passive = <1000>;
196 polling-delay = <5000>;
197 thermal-sensors = <&tmu 2>;
200 fman-alert {
206 fman-crit {
214 core-cluster {
215 polling-delay-passive = <1000>;
216 polling-delay = <5000>;
217 thermal-sensors = <&tmu 3>;
220 core_cluster_alert: core-cluster-alert {
226 core_cluster_crit: core-cluster-crit {
233 cooling-maps {
236 cooling-device =
246 polling-delay-passive = <1000>;
247 polling-delay = <5000>;
248 thermal-sensors = <&tmu 4>;
251 sec-alert {
257 sec-crit {
267 compatible = "arm,armv8-timer";
269 <1 14 0xf08>, /* Physical Non-Secure PPI */
272 fsl,erratum-a008585;
276 compatible = "arm,armv8-pmuv3";
281 interrupt-affinity = <&cpu0>,
287 gic: interrupt-controller@1400000 {
288 compatible = "arm,gic-400";
289 #interrupt-cells = <3>;
290 interrupt-controller;
299 compatible = "simple-bus";
300 #address-cells = <2>;
301 #size-cells = <2>;
305 compatible = "fsl,ls1043a-clockgen";
307 #clock-cells = <2>;
312 compatible = "fsl,ls1043a-scfg", "syscon";
314 big-endian;
315 #address-cells = <1>;
316 #size-cells = <1>;
319 extirq: interrupt-controller@1ac {
320 compatible = "fsl,ls1043a-extirq";
321 #interrupt-cells = <2>;
322 #address-cells = <0>;
323 interrupt-controller;
325 interrupt-map =
338 interrupt-map-mask = <0xffffffff 0x0>;
343 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
344 "fsl,sec-v4.0";
345 fsl,sec-era = <3>;
346 #address-cells = <1>;
347 #size-cells = <1>;
351 dma-coherent;
354 compatible = "fsl,sec-v5.4-job-ring",
355 "fsl,sec-v5.0-job-ring",
356 "fsl,sec-v4.0-job-ring";
362 compatible = "fsl,sec-v5.4-job-ring",
363 "fsl,sec-v5.0-job-ring",
364 "fsl,sec-v4.0-job-ring";
370 compatible = "fsl,sec-v5.4-job-ring",
371 "fsl,sec-v5.0-job-ring",
372 "fsl,sec-v4.0-job-ring";
378 compatible = "fsl,sec-v5.4-job-ring",
379 "fsl,sec-v5.0-job-ring",
380 "fsl,sec-v4.0-job-ring";
387 compatible = "fsl,ls1043a-dcfg", "syscon";
389 big-endian;
393 compatible = "fsl,ifc", "simple-bus";
399 compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
400 #address-cells = <1>;
401 #size-cells = <0>;
404 reg-names = "QuadSPI", "QuadSPI-memory";
406 clock-names = "qspi_en", "qspi";
415 compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
418 clock-frequency = <0>;
419 voltage-ranges = <1800 1800 3300 3300>;
420 sdhci,auto-cmd12;
421 big-endian;
422 bus-width = <4>;
425 ddr: memory-controller@1080000 {
426 compatible = "fsl,qoriq-memory-controller";
429 big-endian;
433 compatible = "fsl,qoriq-tmu";
436 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
437 fsl,tmu-calibration = <0x00000000 0x00000023
477 #thermal-sensor-cells = <1>;
481 compatible = "fsl,qman";
484 memory-region = <&qman_fqd &qman_pfdr>;
488 compatible = "fsl,bman";
491 memory-region = <&bman_fbpr>;
494 bportals: bman-portals@508000000 {
498 qportals: qman-portals@500000000 {
503 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
504 #address-cells = <1>;
505 #size-cells = <0>;
508 clock-names = "dspi";
511 spi-num-chipselects = <5>;
512 big-endian;
517 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
518 #address-cells = <1>;
519 #size-cells = <0>;
522 clock-names = "dspi";
525 spi-num-chipselects = <5>;
526 big-endian;
530 i2c0: i2c@2180000 {
531 compatible = "fsl,vf610-i2c";
532 #address-cells = <1>;
533 #size-cells = <0>;
536 clock-names = "i2c";
541 dma-names = "tx", "rx";
545 i2c1: i2c@2190000 {
546 compatible = "fsl,vf610-i2c";
547 #address-cells = <1>;
548 #size-cells = <0>;
551 clock-names = "i2c";
557 i2c2: i2c@21a0000 {
558 compatible = "fsl,vf610-i2c";
559 #address-cells = <1>;
560 #size-cells = <0>;
563 clock-names = "i2c";
569 i2c3: i2c@21b0000 {
570 compatible = "fsl,vf610-i2c";
571 #address-cells = <1>;
572 #size-cells = <0>;
575 clock-names = "i2c";
582 compatible = "fsl,ns16550", "ns16550a";
590 compatible = "fsl,ns16550", "ns16550a";
598 compatible = "fsl,ns16550", "ns16550a";
606 compatible = "fsl,ns16550", "ns16550a";
614 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
617 gpio-controller;
618 #gpio-cells = <2>;
619 interrupt-controller;
620 #interrupt-cells = <2>;
624 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
627 gpio-controller;
628 #gpio-cells = <2>;
629 interrupt-controller;
630 #interrupt-cells = <2>;
634 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
637 gpio-controller;
638 #gpio-cells = <2>;
639 interrupt-controller;
640 #interrupt-cells = <2>;
644 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
647 gpio-controller;
648 #gpio-cells = <2>;
649 interrupt-controller;
650 #interrupt-cells = <2>;
654 #address-cells = <1>;
655 #size-cells = <1>;
656 compatible = "fsl,qe", "simple-bus";
659 brg-frequency = <100000000>;
660 bus-frequency = <200000000>;
661 fsl,qe-num-riscs = <1>;
662 fsl,qe-num-snums = <28>;
665 compatible = "fsl,qe-ic";
667 #address-cells = <0>;
668 interrupt-controller;
669 #interrupt-cells = <1>;
675 #address-cells = <1>;
676 #size-cells = <0>;
677 compatible = "fsl,ls1043-qe-si",
678 "fsl,t1040-qe-si";
683 #address-cells = <1>;
684 #size-cells = <1>;
685 compatible = "fsl,ls1043-qe-siram",
686 "fsl,t1040-qe-siram";
691 cell-index = <1>;
694 interrupt-parent = <&qeic>;
698 cell-index = <3>;
701 interrupt-parent = <&qeic>;
705 #address-cells = <1>;
706 #size-cells = <1>;
707 compatible = "fsl,qe-muram", "fsl,cpm-muram";
710 data-only@0 {
711 compatible = "fsl,qe-muram-data",
712 "fsl,cpm-muram-data";
719 compatible = "fsl,ls1021a-lpuart";
723 clock-names = "ipg";
728 compatible = "fsl,ls1021a-lpuart";
733 clock-names = "ipg";
738 compatible = "fsl,ls1021a-lpuart";
743 clock-names = "ipg";
748 compatible = "fsl,ls1021a-lpuart";
753 clock-names = "ipg";
758 compatible = "fsl,ls1021a-lpuart";
763 clock-names = "ipg";
768 compatible = "fsl,ls1021a-lpuart";
773 clock-names = "ipg";
778 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
783 clock-names = "wdog";
784 big-endian;
788 #dma-cells = <2>;
789 compatible = "fsl,vf610-edma";
795 interrupt-names = "edma-tx", "edma-err";
796 dma-channels = <32>;
797 big-endian;
798 clock-names = "dmamux0", "dmamux1";
810 snps,quirk-frame-length-adjustment = <0x20>;
812 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
821 snps,quirk-frame-length-adjustment = <0x20>;
823 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
832 snps,quirk-frame-length-adjustment = <0x20>;
834 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
839 compatible = "fsl,ls1043a-ahci";
842 reg-names = "ahci", "sata-ecc";
846 dma-coherent;
849 msi1: msi-controller1@1571000 {
850 compatible = "fsl,ls1043a-msi";
852 msi-controller;
856 msi2: msi-controller2@1572000 {
857 compatible = "fsl,ls1043a-msi";
859 msi-controller;
863 msi3: msi-controller3@1573000 {
864 compatible = "fsl,ls1043a-msi";
866 msi-controller;
871 compatible = "fsl,ls1043a-pcie";
874 reg-names = "regs", "config";
877 interrupt-names = "intr", "pme";
878 #address-cells = <3>;
879 #size-cells = <2>;
881 dma-coherent;
882 num-viewport = <6>;
883 bus-range = <0x0 0xff>;
885 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
886 msi-parent = <&msi1>, <&msi2>, <&msi3>;
887 #interrupt-cells = <1>;
888 interrupt-map-mask = <0 0 0 7>;
889 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
897 compatible = "fsl,ls1043a-pcie";
900 reg-names = "regs", "config";
903 interrupt-names = "intr", "pme";
904 #address-cells = <3>;
905 #size-cells = <2>;
907 dma-coherent;
908 num-viewport = <6>;
909 bus-range = <0x0 0xff>;
911 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
912 msi-parent = <&msi1>, <&msi2>, <&msi3>;
913 #interrupt-cells = <1>;
914 interrupt-map-mask = <0 0 0 7>;
915 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
923 compatible = "fsl,ls1043a-pcie";
926 reg-names = "regs", "config";
929 interrupt-names = "intr", "pme";
930 #address-cells = <3>;
931 #size-cells = <2>;
933 dma-coherent;
934 num-viewport = <6>;
935 bus-range = <0x0 0xff>;
937 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
938 msi-parent = <&msi1>, <&msi2>, <&msi3>;
939 #interrupt-cells = <1>;
940 interrupt-map-mask = <0 0 0 7>;
941 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
948 qdma: dma-controller@8380000 {
949 compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
958 interrupt-names = "qdma-error", "qdma-queue0",
959 "qdma-queue1", "qdma-queue2", "qdma-queue3";
960 dma-channels = <8>;
961 block-number = <1>;
962 block-offset = <0x10000>;
963 fsl,dma-queues = <2>;
964 status-sizes = <64>;
965 queue-sizes = <64 64>;
966 big-endian;
969 rcpm: power-controller@1ee2140 {
970 compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
972 #fsl,rcpm-wakeup-cells = <1>;
976 compatible = "fsl,ls1043a-ftm-alarm";
978 fsl,rcpm-wakeup = <&rcpm 0x20000>;
980 big-endian;
986 compatible = "linaro,optee-tz";
993 #include "qoriq-qman-portals.dtsi"
994 #include "qoriq-bman-portals.dtsi"