Lines Matching +full:ls1028a +full:- +full:flexspi +full:- +full:clk
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "fsl,ls1028a";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-a72";
29 enable-method = "psci";
31 next-level-cache = <&l2>;
32 cpu-idle-states = <&CPU_PW20>;
33 #cooling-cells = <2>;
38 compatible = "arm,cortex-a72";
40 enable-method = "psci";
42 next-level-cache = <&l2>;
43 cpu-idle-states = <&CPU_PW20>;
44 #cooling-cells = <2>;
47 l2: l2-cache {
52 idle-states {
54 * PSCI node is not added default, U-boot will add missing
57 entry-method = "psci";
59 CPU_PW20: cpu-pw20 {
60 compatible = "arm,idle-state";
61 idle-state-name = "PW20";
62 arm,psci-suspend-param = <0x0>;
63 entry-latency-us = <2000>;
64 exit-latency-us = <2000>;
65 min-residency-us = <6000>;
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <100000000>;
73 clock-output-names = "sysclk";
76 osc_27m: clock-osc-27m {
77 compatible = "fixed-clock";
78 #clock-cells = <0>;
79 clock-frequency = <27000000>;
80 clock-output-names = "phy_27m";
83 dpclk: clock-controller@f1f0000 {
84 compatible = "fsl,ls1028a-plldig";
86 #clock-cells = <0>;
92 compatible = "linaro,optee-tz";
99 compatible ="syscon-reboot";
106 compatible = "arm,armv8-timer";
118 compatible = "arm,cortex-a72-pmu";
122 gic: interrupt-controller@6000000 {
123 compatible= "arm,gic-v3";
124 #address-cells = <2>;
125 #size-cells = <2>;
129 #interrupt-cells= <3>;
130 interrupt-controller;
133 its: gic-its@6020000 {
134 compatible = "arm,gic-v3-its";
135 msi-controller;
140 thermal-zones {
141 ddr-controller {
142 polling-delay-passive = <1000>;
143 polling-delay = <5000>;
144 thermal-sensors = <&tmu 0>;
147 ddr-ctrler-alert {
153 ddr-ctrler-crit {
161 core-cluster {
162 polling-delay-passive = <1000>;
163 polling-delay = <5000>;
164 thermal-sensors = <&tmu 1>;
167 core_cluster_alert: core-cluster-alert {
173 core_cluster_crit: core-cluster-crit {
180 cooling-maps {
183 cooling-device =
192 compatible = "simple-bus";
193 #address-cells = <2>;
194 #size-cells = <2>;
197 ddr: memory-controller@1080000 {
198 compatible = "fsl,qoriq-memory-controller";
201 little-endian;
205 #address-cells = <1>;
206 #size-cells = <1>;
207 compatible = "fsl,ls1028a-dcfg", "syscon", "simple-mfd";
210 little-endian;
212 fspi_clk: clock-controller@900 {
213 compatible = "fsl,ls1028a-flexspi-clk";
215 #clock-cells = <0>;
217 clock-output-names = "fspi_clk";
224 little-endian;
228 compatible = "fsl,ls1028a-scfg", "syscon";
230 big-endian;
233 clockgen: clock-controller@1300000 {
234 compatible = "fsl,ls1028a-clockgen";
236 #clock-cells = <2>;
241 compatible = "fsl,vf610-i2c";
242 #address-cells = <1>;
243 #size-cells = <0>;
252 compatible = "fsl,vf610-i2c";
253 #address-cells = <1>;
254 #size-cells = <0>;
263 compatible = "fsl,vf610-i2c";
264 #address-cells = <1>;
265 #size-cells = <0>;
274 compatible = "fsl,vf610-i2c";
275 #address-cells = <1>;
276 #size-cells = <0>;
285 compatible = "fsl,vf610-i2c";
286 #address-cells = <1>;
287 #size-cells = <0>;
296 compatible = "fsl,vf610-i2c";
297 #address-cells = <1>;
298 #size-cells = <0>;
307 compatible = "fsl,vf610-i2c";
308 #address-cells = <1>;
309 #size-cells = <0>;
318 compatible = "fsl,vf610-i2c";
319 #address-cells = <1>;
320 #size-cells = <0>;
329 compatible = "nxp,lx2160a-fspi";
330 #address-cells = <1>;
331 #size-cells = <0>;
334 reg-names = "fspi_base", "fspi_mmap";
337 clock-names = "fspi_en", "fspi";
342 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
343 #address-cells = <1>;
344 #size-cells = <0>;
347 clock-names = "dspi";
351 dma-names = "tx", "rx";
352 spi-num-chipselects = <4>;
353 little-endian;
358 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
359 #address-cells = <1>;
360 #size-cells = <0>;
363 clock-names = "dspi";
367 dma-names = "tx", "rx";
368 spi-num-chipselects = <4>;
369 little-endian;
374 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
375 #address-cells = <1>;
376 #size-cells = <0>;
379 clock-names = "dspi";
383 dma-names = "tx", "rx";
384 spi-num-chipselects = <3>;
385 little-endian;
390 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
393 clock-frequency = <0>; /* fixed up by bootloader */
395 voltage-ranges = <1800 1800 3300 3300>;
396 sdhci,auto-cmd12;
397 little-endian;
398 bus-width = <4>;
403 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
406 clock-frequency = <0>; /* fixed up by bootloader */
408 voltage-ranges = <1800 1800>;
409 sdhci,auto-cmd12;
410 non-removable;
411 little-endian;
412 bus-width = <4>;
417 compatible = "fsl,lx2160ar1-flexcan";
424 clock-names = "ipg", "per";
429 compatible = "fsl,lx2160ar1-flexcan";
436 clock-names = "ipg", "per";
460 compatible = "fsl,ls1028a-lpuart";
465 clock-names = "ipg";
466 dma-names = "rx","tx";
473 compatible = "fsl,ls1028a-lpuart";
478 clock-names = "ipg";
479 dma-names = "rx","tx";
486 compatible = "fsl,ls1028a-lpuart";
491 clock-names = "ipg";
492 dma-names = "rx","tx";
499 compatible = "fsl,ls1028a-lpuart";
504 clock-names = "ipg";
505 dma-names = "rx","tx";
512 compatible = "fsl,ls1028a-lpuart";
517 clock-names = "ipg";
518 dma-names = "rx","tx";
525 compatible = "fsl,ls1028a-lpuart";
530 clock-names = "ipg";
531 dma-names = "rx","tx";
537 edma0: dma-controller@22c0000 {
538 #dma-cells = <2>;
539 compatible = "fsl,ls1028a-edma", "fsl,vf610-edma";
545 interrupt-names = "edma-tx", "edma-err";
546 dma-channels = <32>;
547 clock-names = "dmamux0", "dmamux1";
555 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
558 gpio-controller;
559 #gpio-cells = <2>;
560 interrupt-controller;
561 #interrupt-cells = <2>;
562 little-endian;
566 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
569 gpio-controller;
570 #gpio-cells = <2>;
571 interrupt-controller;
572 #interrupt-cells = <2>;
573 little-endian;
577 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
580 gpio-controller;
581 #gpio-cells = <2>;
582 interrupt-controller;
583 #interrupt-cells = <2>;
584 little-endian;
588 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
593 snps,quirk-frame-length-adjustment = <0x20>;
594 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
598 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
603 snps,quirk-frame-length-adjustment = <0x20>;
604 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
608 compatible = "fsl,ls1028a-ahci";
611 reg-names = "ahci", "sata-ecc";
619 compatible = "fsl,ls1028a-pcie";
622 reg-names = "regs", "config";
625 interrupt-names = "pme", "aer";
626 #address-cells = <3>;
627 #size-cells = <2>;
629 dma-coherent;
630 num-viewport = <8>;
631 bus-range = <0x0 0xff>;
633 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
634 msi-parent = <&its>;
635 #interrupt-cells = <1>;
636 interrupt-map-mask = <0 0 0 7>;
637 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
641 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
646 compatible = "fsl,ls1028a-pcie";
649 reg-names = "regs", "config";
652 interrupt-names = "pme", "aer";
653 #address-cells = <3>;
654 #size-cells = <2>;
656 dma-coherent;
657 num-viewport = <8>;
658 bus-range = <0x0 0xff>;
660 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
661 msi-parent = <&its>;
662 #interrupt-cells = <1>;
663 interrupt-map-mask = <0 0 0 7>;
664 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
668 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
673 compatible = "arm,mmu-500";
675 #global-interrupts = <8>;
676 #iommu-cells = <1>;
677 stream-match-mask = <0x7c00>;
682 /* global non-secure fault */
684 /* combined non-secure interrupt */
686 /* performance counter interrupts 0-7 */
725 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
726 fsl,sec-era = <10>;
727 #address-cells = <1>;
728 #size-cells = <1>;
732 dma-coherent;
735 compatible = "fsl,sec-v5.0-job-ring",
736 "fsl,sec-v4.0-job-ring";
742 compatible = "fsl,sec-v5.0-job-ring",
743 "fsl,sec-v4.0-job-ring";
749 compatible = "fsl,sec-v5.0-job-ring",
750 "fsl,sec-v4.0-job-ring";
756 compatible = "fsl,sec-v5.0-job-ring",
757 "fsl,sec-v4.0-job-ring";
763 qdma: dma-controller@8380000 {
764 compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
773 interrupt-names = "qdma-error", "qdma-queue0",
774 "qdma-queue1", "qdma-queue2", "qdma-queue3";
775 dma-channels = <8>;
776 block-number = <1>;
777 block-offset = <0x10000>;
778 fsl,dma-queues = <2>;
779 status-sizes = <64>;
780 queue-sizes = <64 64>;
790 clock-names = "wdog_clk", "apb_pclk";
800 clock-names = "wdog_clk", "apb_pclk";
803 sai1: audio-controller@f100000 {
804 #sound-dai-cells = <0>;
805 compatible = "fsl,vf610-sai";
816 clock-names = "bus", "mclk1", "mclk2", "mclk3";
817 dma-names = "tx", "rx";
820 fsl,sai-asynchronous;
824 sai2: audio-controller@f110000 {
825 #sound-dai-cells = <0>;
826 compatible = "fsl,vf610-sai";
837 clock-names = "bus", "mclk1", "mclk2", "mclk3";
838 dma-names = "tx", "rx";
841 fsl,sai-asynchronous;
845 sai3: audio-controller@f120000 {
846 #sound-dai-cells = <0>;
847 compatible = "fsl,vf610-sai";
858 clock-names = "bus", "mclk1", "mclk2", "mclk3";
859 dma-names = "tx", "rx";
862 fsl,sai-asynchronous;
866 sai4: audio-controller@f130000 {
867 #sound-dai-cells = <0>;
868 compatible = "fsl,vf610-sai";
879 clock-names = "bus", "mclk1", "mclk2", "mclk3";
880 dma-names = "tx", "rx";
883 fsl,sai-asynchronous;
887 sai5: audio-controller@f140000 {
888 #sound-dai-cells = <0>;
889 compatible = "fsl,vf610-sai";
900 clock-names = "bus", "mclk1", "mclk2", "mclk3";
901 dma-names = "tx", "rx";
904 fsl,sai-asynchronous;
908 sai6: audio-controller@f150000 {
909 #sound-dai-cells = <0>;
910 compatible = "fsl,vf610-sai";
921 clock-names = "bus", "mclk1", "mclk2", "mclk3";
922 dma-names = "tx", "rx";
925 fsl,sai-asynchronous;
930 compatible = "fsl,qoriq-tmu";
933 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
934 fsl,tmu-calibration = <0x00000000 0x00000024
977 little-endian;
978 #thermal-sensor-cells = <1>;
982 compatible = "pci-host-ecam-generic";
984 #address-cells = <3>;
985 #size-cells = <2>;
986 msi-parent = <&its>;
988 bus-range = <0x0 0x0>;
989 dma-coherent;
990 msi-map = <0 &its 0x17 0xe>;
991 iommu-map = <0 &smmu 0x17 0xe>;
992 /* PF0-6 BAR0 - non-prefetchable memory */
994 /* PF0-6 BAR2 - prefetchable memory */
996 /* PF0: VF0-1 BAR0 - non-prefetchable memory */
998 /* PF0: VF0-1 BAR2 - prefetchable memory */
1000 /* PF1: VF0-1 BAR0 - non-prefetchable memory */
1002 /* PF1: VF0-1 BAR2 - prefetchable memory */
1004 /* BAR4 (PF5) - non-prefetchable memory */
1022 phy-mode = "internal";
1025 fixed-link {
1027 full-duplex;
1032 compatible = "fsl,enetc-mdio";
1034 #address-cells = <1>;
1035 #size-cells = <0>;
1039 compatible = "fsl,enetc-ptp";
1042 little-endian;
1043 fsl,extts-fifo;
1046 mscc_felix: ethernet-switch@0,5 {
1053 #address-cells = <1>;
1054 #size-cells = <0>;
1080 phy-mode = "internal";
1083 fixed-link {
1085 full-duplex;
1091 phy-mode = "internal";
1094 fixed-link {
1096 full-duplex;
1105 phy-mode = "internal";
1108 fixed-link {
1110 full-duplex;
1123 compatible = "fsl,ls1028a-enetc-ierb";
1127 rcpm: power-controller@1e34040 {
1128 compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
1130 #fsl,rcpm-wakeup-cells = <7>;
1131 little-endian;
1135 compatible = "fsl,ls1028a-ftm-alarm";
1137 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1143 compatible = "arm,mali-dp500";
1147 interrupt-names = "DE", "SE";
1152 clock-names = "pxlclk", "mclk", "aclk", "pclk";
1153 arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
1154 arm,malidp-arqos-value = <0xd000d000>;