Lines Matching +full:polling +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
30 #mbox-cells = <1>;
32 clock-names = "apb_pclk";
36 compatible = "arm,mmu-400", "arm,smmu-v1";
40 #iommu-cells = <1>;
41 #global-interrupts = <1>;
42 power-domains = <&scpi_devpd 1>;
43 dma-coherent;
48 compatible = "arm,mmu-401", "arm,smmu-v1";
52 #iommu-cells = <1>;
53 #global-interrupts = <1>;
54 dma-coherent;
59 compatible = "arm,mmu-401", "arm,smmu-v1";
63 #iommu-cells = <1>;
64 #global-interrupts = <1>;
65 dma-coherent;
66 power-domains = <&scpi_devpd 0>;
69 gic: interrupt-controller@2c010000 {
70 compatible = "arm,gic-400", "arm,cortex-a15-gic";
75 #address-cells = <1>;
76 #interrupt-cells = <3>;
77 #size-cells = <1>;
78 interrupt-controller;
83 compatible = "arm,gic-v2m-frame";
84 msi-controller;
89 compatible = "arm,gic-v2m-frame";
90 msi-controller;
95 compatible = "arm,gic-v2m-frame";
96 msi-controller;
101 compatible = "arm,gic-v2m-frame";
102 msi-controller;
108 compatible = "arm,armv8-timer";
121 compatible = "arm,coresight-tmc", "arm,primecell";
125 clock-names = "apb_pclk";
126 power-domains = <&scpi_devpd 0>;
128 in-ports {
131 remote-endpoint = <&main_funnel_out_port>;
136 out-ports {
145 compatible = "arm,coresight-tpiu", "arm,primecell";
149 clock-names = "apb_pclk";
150 power-domains = <&scpi_devpd 0>;
151 in-ports {
154 remote-endpoint = <&replicator_out_port0>;
162 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
166 clock-names = "apb_pclk";
167 power-domains = <&scpi_devpd 0>;
169 out-ports {
172 remote-endpoint = <&etf0_in_port>;
177 main_funnel_in_ports: in-ports {
178 #address-cells = <1>;
179 #size-cells = <0>;
184 remote-endpoint = <&cluster0_funnel_out_port>;
191 remote-endpoint = <&cluster1_funnel_out_port>;
198 compatible = "arm,coresight-tmc", "arm,primecell";
203 clock-names = "apb_pclk";
204 power-domains = <&scpi_devpd 0>;
205 arm,scatter-gather;
206 in-ports {
209 remote-endpoint = <&replicator_out_port1>;
216 compatible = "arm,coresight-stm", "arm,primecell";
219 reg-names = "stm-base", "stm-stimulus-base";
222 clock-names = "apb_pclk";
223 power-domains = <&scpi_devpd 0>;
224 out-ports {
233 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
237 clock-names = "apb_pclk";
238 power-domains = <&scpi_devpd 0>;
240 out-ports {
241 #address-cells = <1>;
242 #size-cells = <0>;
248 remote-endpoint = <&tpiu_in_port>;
255 remote-endpoint = <&etr_in_port>;
259 in-ports {
267 cpu_debug0: cpu-debug@22010000 {
268 compatible = "arm,coresight-cpu-debug", "arm,primecell";
272 clock-names = "apb_pclk";
273 power-domains = <&scpi_devpd 0>;
277 compatible = "arm,coresight-etm4x", "arm,primecell";
281 clock-names = "apb_pclk";
282 power-domains = <&scpi_devpd 0>;
283 out-ports {
286 remote-endpoint = <&cluster0_funnel_in_port0>;
293 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
297 clock-names = "apb_pclk";
298 power-domains = <&scpi_devpd 0>;
299 out-ports {
302 remote-endpoint = <&main_funnel_in_port0>;
307 in-ports {
308 #address-cells = <1>;
309 #size-cells = <0>;
314 remote-endpoint = <&cluster0_etm0_out_port>;
321 remote-endpoint = <&cluster0_etm1_out_port>;
327 cpu_debug1: cpu-debug@22110000 {
328 compatible = "arm,coresight-cpu-debug", "arm,primecell";
332 clock-names = "apb_pclk";
333 power-domains = <&scpi_devpd 0>;
337 compatible = "arm,coresight-etm4x", "arm,primecell";
341 clock-names = "apb_pclk";
342 power-domains = <&scpi_devpd 0>;
343 out-ports {
346 remote-endpoint = <&cluster0_funnel_in_port1>;
352 cpu_debug2: cpu-debug@23010000 {
353 compatible = "arm,coresight-cpu-debug", "arm,primecell";
357 clock-names = "apb_pclk";
358 power-domains = <&scpi_devpd 0>;
362 compatible = "arm,coresight-etm4x", "arm,primecell";
366 clock-names = "apb_pclk";
367 power-domains = <&scpi_devpd 0>;
368 out-ports {
371 remote-endpoint = <&cluster1_funnel_in_port0>;
378 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
382 clock-names = "apb_pclk";
383 power-domains = <&scpi_devpd 0>;
384 out-ports {
387 remote-endpoint = <&main_funnel_in_port1>;
392 in-ports {
393 #address-cells = <1>;
394 #size-cells = <0>;
399 remote-endpoint = <&cluster1_etm0_out_port>;
406 remote-endpoint = <&cluster1_etm1_out_port>;
412 remote-endpoint = <&cluster1_etm2_out_port>;
418 remote-endpoint = <&cluster1_etm3_out_port>;
424 cpu_debug3: cpu-debug@23110000 {
425 compatible = "arm,coresight-cpu-debug", "arm,primecell";
429 clock-names = "apb_pclk";
430 power-domains = <&scpi_devpd 0>;
434 compatible = "arm,coresight-etm4x", "arm,primecell";
438 clock-names = "apb_pclk";
439 power-domains = <&scpi_devpd 0>;
440 out-ports {
443 remote-endpoint = <&cluster1_funnel_in_port1>;
449 cpu_debug4: cpu-debug@23210000 {
450 compatible = "arm,coresight-cpu-debug", "arm,primecell";
454 clock-names = "apb_pclk";
455 power-domains = <&scpi_devpd 0>;
459 compatible = "arm,coresight-etm4x", "arm,primecell";
463 clock-names = "apb_pclk";
464 power-domains = <&scpi_devpd 0>;
465 out-ports {
468 remote-endpoint = <&cluster1_funnel_in_port2>;
474 cpu_debug5: cpu-debug@23310000 {
475 compatible = "arm,coresight-cpu-debug", "arm,primecell";
479 clock-names = "apb_pclk";
480 power-domains = <&scpi_devpd 0>;
484 compatible = "arm,coresight-etm4x", "arm,primecell";
488 clock-names = "apb_pclk";
489 power-domains = <&scpi_devpd 0>;
490 out-ports {
493 remote-endpoint = <&cluster1_funnel_in_port3>;
500 compatible = "arm,juno-mali", "arm,mali-t624";
505 interrupt-names = "job", "mmu", "gpu";
507 power-domains = <&scpi_devpd 1>;
508 dma-coherent;
509 /* The SMMU is only really of interest to bare-metal hypervisors */
515 compatible = "arm,juno-sram-ns", "mmio-sram";
518 #address-cells = <1>;
519 #size-cells = <1>;
522 cpu_scp_lpri: scp-sram@0 {
523 compatible = "arm,juno-scp-shmem";
527 cpu_scp_hpri: scp-sram@200 {
528 compatible = "arm,juno-scp-shmem";
534 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
537 bus-range = <0 255>;
538 linux,pci-domain = <0>;
539 #address-cells = <3>;
540 #size-cells = <2>;
541 dma-coherent;
546 dma-ranges = <0x02000000 0x0 0x2c1c0000 0x0 0x2c1c0000 0x0 0x00040000>,
549 #interrupt-cells = <1>;
550 interrupt-map-mask = <0 0 0 7>;
551 interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
555 msi-parent = <&v2m_0>;
557 iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
558 iommu-map = <0x0 &smmu_pcie 0x0 0x1>;
567 compatible = "arm,scpi-clocks";
569 scpi_dvfs: clocks-0 {
570 compatible = "arm,scpi-dvfs-clocks";
571 #clock-cells = <1>;
572 clock-indices = <0>, <1>, <2>;
573 clock-output-names = "atlclk", "aplclk","gpuclk";
575 scpi_clk: clocks-1 {
576 compatible = "arm,scpi-variable-clocks";
577 #clock-cells = <1>;
578 clock-indices = <3>;
579 clock-output-names = "pxlclk";
583 scpi_devpd: power-controller {
584 compatible = "arm,scpi-power-domains";
585 num-domains = <2>;
586 #power-domain-cells = <1>;
590 compatible = "arm,scpi-sensors";
591 #thermal-sensor-cells = <1>;
595 thermal-zones {
597 polling-delay = <1000>;
598 polling-delay-passive = <100>;
599 thermal-sensors = <&scpi_sensors0 0>;
603 polling-delay = <1000>;
604 polling-delay-passive = <100>;
605 thermal-sensors = <&scpi_sensors0 3>;
608 big_cluster_thermal_zone: big-cluster {
609 polling-delay = <1000>;
610 polling-delay-passive = <100>;
611 thermal-sensors = <&scpi_sensors0 21>;
615 little_cluster_thermal_zone: little-cluster {
616 polling-delay = <1000>;
617 polling-delay-passive = <100>;
618 thermal-sensors = <&scpi_sensors0 22>;
623 polling-delay = <1000>;
624 polling-delay-passive = <100>;
625 thermal-sensors = <&scpi_sensors0 23>;
630 polling-delay = <1000>;
631 polling-delay-passive = <100>;
632 thermal-sensors = <&scpi_sensors0 24>;
638 compatible = "arm,mmu-401", "arm,smmu-v1";
642 #iommu-cells = <1>;
643 #global-interrupts = <1>;
644 dma-coherent;
648 compatible = "arm,mmu-401", "arm,smmu-v1";
652 #iommu-cells = <1>;
653 #global-interrupts = <1>;
657 compatible = "arm,mmu-401", "arm,smmu-v1";
661 #iommu-cells = <1>;
662 #global-interrupts = <1>;
666 compatible = "arm,mmu-401", "arm,smmu-v1";
670 #iommu-cells = <1>;
671 #global-interrupts = <1>;
672 dma-coherent;
678 #dma-cells = <1>;
679 #dma-channels = <8>;
680 #dma-requests = <32>;
700 clock-names = "apb_pclk";
709 clock-names = "pxlclk";
713 remote-endpoint = <&tda998x_1_input>;
724 clock-names = "pxlclk";
728 remote-endpoint = <&tda998x_0_input>;
738 clock-names = "uartclk", "apb_pclk";
742 compatible = "snps,designware-i2c";
744 #address-cells = <1>;
745 #size-cells = <0>;
747 clock-frequency = <400000>;
748 i2c-sda-hold-time-ns = <500>;
751 hdmi-transmitter@70 {
756 remote-endpoint = <&hdlcd0_output>;
761 hdmi-transmitter@71 {
766 remote-endpoint = <&hdlcd1_output>;
773 compatible = "generic-ohci";
781 compatible = "generic-ehci";
788 memory-controller@7ffd0000 {
794 clock-names = "apb_pclk";
805 #interrupt-cells = <1>;
806 interrupt-map-mask = <0 0 15>;
807 interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
822 site2: tlx-bus@60000000 {
823 compatible = "simple-bus";
824 #address-cells = <1>;
825 #size-cells = <1>;
827 #interrupt-cells = <1>;
828 interrupt-map-mask = <0 0>;
829 interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;