Lines Matching full:clkc
8 #include <dt-bindings/clock/g12a-clkc.h>
35 clocks = <&clkc CLKID_HDMI>,
36 <&clkc CLKID_HTX_PCLK>,
37 <&clkc CLKID_VPU_INTR>;
45 clocks = <&clkc CLKID_HDMI>,
46 <&clkc CLKID_HTX_PCLK>,
47 <&clkc CLKID_VPU_INTR>;
54 clocks = <&clkc CLKID_EFUSE>;
146 clocks = <&clkc CLKID_PCIE_PHY
147 &clkc CLKID_PCIE_COMB
148 &clkc CLKID_PCIE_PLL>;
225 clocks = <&clkc CLKID_ETH>,
226 <&clkc CLKID_FCLK_DIV2>,
227 <&clkc CLKID_MPLL2>,
228 <&clkc CLKID_FCLK_DIV2>;
257 clocks = <&clkc CLKID_HDMI>,
258 <&clkc CLKID_HTX_PCLK>,
259 <&clkc CLKID_VPU_INTR>;
291 clocks = <&clkc CLKID_RNG0>;
301 clocks = <&clkc CLKID_AUDIO_CODEC>;
1580 clocks = <&clkc CLKID_TS>;
1590 clocks = <&clkc CLKID_TS>;
1640 clkc: clock-controller { label
1641 compatible = "amlogic,g12a-clkc";
1665 clocks = <&clkc CLKID_VPU>,
1666 <&clkc CLKID_VAPB>;
1674 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1675 <&clkc CLKID_VPU_0>,
1676 <&clkc CLKID_VPU>, /* Glitch free mux */
1677 <&clkc CLKID_VAPB_0_SEL>,
1678 <&clkc CLKID_VAPB_0>,
1679 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1680 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1682 <&clkc CLKID_VPU_0>,
1683 <&clkc CLKID_FCLK_DIV4>,
1685 <&clkc CLKID_VAPB_0>;
1699 clocks = <&clkc CLKID_PCIE_PLL>;
1703 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1711 clocks = <&clkc CLKID_ETH_PHY>,
1713 <&clkc CLKID_MPLL_50M>;
1760 clocks = <&xtal>, <&clkc CLKID_CLK81>;
2075 clocks = <&clkc CLKID_I2C>;
2119 clocks = <&clkc CLKID_PARSER>,
2120 <&clkc CLKID_DOS>,
2121 <&clkc CLKID_VDEC_1>,
2122 <&clkc CLKID_VDEC_HEVC>,
2123 <&clkc CLKID_VDEC_HEVCF>;
2200 clocks = <&clkc CLKID_SPICC0>,
2201 <&clkc CLKID_SPICC0_SCLK>;
2212 clocks = <&clkc CLKID_SPICC1>,
2213 <&clkc CLKID_SPICC1_SCLK>;
2226 clocks = <&clkc CLKID_CLK81>;
2257 clocks = <&clkc CLKID_I2C>;
2267 clocks = <&clkc CLKID_I2C>;
2277 clocks = <&clkc CLKID_I2C>;
2287 clocks = <&clkc CLKID_I2C>;
2299 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2308 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2317 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2329 clocks = <&clkc CLKID_SD_EMMC_A>,
2330 <&clkc CLKID_SD_EMMC_A_CLK0>,
2331 <&clkc CLKID_FCLK_DIV2>;
2341 clocks = <&clkc CLKID_SD_EMMC_B>,
2342 <&clkc CLKID_SD_EMMC_B_CLK0>,
2343 <&clkc CLKID_FCLK_DIV2>;
2353 clocks = <&clkc CLKID_SD_EMMC_C>,
2354 <&clkc CLKID_SD_EMMC_C_CLK0>,
2355 <&clkc CLKID_FCLK_DIV2>;
2369 clocks = <&clkc CLKID_USB>;
2382 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2411 clocks = <&clkc CLKID_MALI>;