Lines Matching +full:0 +full:xff900000
106 reg = <0x0 0x05000000 0x0 0x300000>;
113 size = <0x0 0x10000000>;
114 alignment = <0x0 0x400000>;
131 reg = <0x0 0xfc000000 0x0 0x400000>,
132 <0x0 0xff648000 0x0 0x2000>,
133 <0x0 0xfc400000 0x0 0x200000>;
137 interrupt-map-mask = <0 0 0 0>;
138 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
139 bus-range = <0x0 0xff>;
143 ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>,
144 <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
221 reg = <0x0 0xff3f0000 0x0 0x10000>,
222 <0x0 0xff634540 0x0 0x8>;
237 #size-cells = <0>;
244 reg = <0x0 0xff600000 0x0 0x200000>;
247 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
249 hdmi_tx: hdmi-tx@0 {
251 reg = <0x0 0x0 0x0 0x10000>;
262 #size-cells = <0>;
263 #sound-dai-cells = <0>;
267 hdmi_tx_venc_port: port@0 {
268 reg = <0>;
283 reg = <0x0 0x30000 0x0 0x2000>;
286 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
290 reg = <0x0 0x218 0x0 0x4>;
298 reg = <0x0 0x32000 0x0 0x14>;
299 #sound-dai-cells = <0>;
309 reg = <0x0 0x34400 0x0 0x400>;
312 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
321 reg = <0x0 0x40 0x0 0x4c>,
322 <0x0 0xe8 0x0 0x18>,
323 <0x0 0x120 0x0 0x18>,
324 <0x0 0x2c0 0x0 0x40>,
325 <0x0 0x340 0x0 0x1c>;
333 gpio-ranges = <&periphs_pinctrl 0 0 86>;
353 mux-0 {
369 mux-0 {
381 mux-0 {
914 mux-0 {
943 mux-0 {
1578 reg = <0x0 0x34800 0x0 0x50>;
1581 #thermal-sensor-cells = <0>;
1588 reg = <0x0 0x34c00 0x0 0x50>;
1591 #thermal-sensor-cells = <0>;
1597 reg = <0x0 0x36000 0x0 0x2000>;
1602 #phy-cells = <0>;
1607 reg = <0x0 0x38000 0x0 0x400>;
1610 ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
1614 reg = <0x0 0x48 0x0 0x14>;
1620 reg = <0x0 0x3a000 0x0 0x2000>;
1625 #phy-cells = <0>;
1630 reg = <0x0 0x3c000 0x0 0x1400>;
1633 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1635 hhi: system-controller@0 {
1638 reg = <0 0 0 0x400>;
1681 <0>, /* Do Nothing */
1684 <0>, /* Do Nothing */
1686 assigned-clock-rates = <0>, /* Do Nothing */
1688 <0>, /* Do Nothing */
1689 <0>, /* Do Nothing */
1691 <0>; /* Do Nothing */
1698 reg = <0x0 0x46000 0x0 0x2000>;
1710 reg = <0x0 0x4c000 0x0 0xa4>;
1717 #size-cells = <0>;
1719 ext_mdio: mdio@0 {
1720 reg = <0>;
1722 #size-cells = <0>;
1728 #size-cells = <0>;
1743 reg = <0x0 0xff800000 0x0 0x100000>;
1746 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1748 rti: sys-ctrl@0 {
1751 reg = <0x0 0x0 0x0 0x100>;
1754 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1771 reg = <0x0 0x14 0x0 0x8>,
1772 <0x0 0x1c 0x0 0x8>,
1773 <0x0 0x24 0x0 0x14>;
1779 gpio-ranges = <&ao_pinctrl 0 0 15>;
2014 reg = <0x0 0x000a8 0x0 0x4>;
2019 reg = <0x0 0x00100 0x0 0x14>;
2028 reg = <0x0 0x140 0x0 0x140>;
2034 reg = <0x0 0x00280 0x0 0x1c>;
2043 reg = <0x0 0x2000 0x0 0x20>;
2051 reg = <0x0 0x3000 0x0 0x18>;
2061 reg = <0x0 0x4000 0x0 0x18>;
2071 reg = <0x0 0x05000 0x0 0x20>;
2074 #size-cells = <0>;
2080 reg = <0x0 0x7000 0x0 0x20>;
2087 reg = <0x0 0x8000 0x0 0x20>;
2095 reg = <0x0 0x9000 0x0 0x48>;
2109 reg = <0x0 0xff620000 0x0 0x10000>,
2110 <0x0 0xffd0e180 0x0 0xe4>;
2132 reg = <0x0 0xff900000 0x0 0x100000>,
2133 <0x0 0xff63c000 0x0 0x1000>;
2137 #size-cells = <0>;
2141 cvbs_vdac_port: port@0 {
2142 reg = <0>;
2157 reg = <0x0 0xffc01000 0 0x1000>,
2158 <0x0 0xffc02000 0 0x2000>,
2159 <0x0 0xffc04000 0 0x2000>,
2160 <0x0 0xffc06000 0 0x2000>;
2165 #address-cells = <0>;
2170 reg = <0x0 0xffd00000 0x0 0x100000>;
2173 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2177 reg = <0x0 0x1004 0x0 0x9c>;
2184 reg = <0x0 0xf080 0x0 0x10>;
2192 reg = <0x0 0xf0d0 0x0 0x10>;
2198 reg = <0x0 0x13000 0x0 0x44>;
2204 #size-cells = <0>;
2210 reg = <0x0 0x15000 0x0 0x44>;
2216 #size-cells = <0>;
2223 reg = <0x0 0x14000 0x0 0x80>;
2225 #size-cells = <0>;
2231 reg = <0x0 0x19000 0x0 0x20>;
2238 reg = <0x0 0x1a000 0x0 0x20>;
2245 reg = <0x0 0x1b000 0x0 0x20>;
2253 reg = <0x0 0x1c000 0x0 0x20>;
2256 #size-cells = <0>;
2263 reg = <0x0 0x1d000 0x0 0x20>;
2266 #size-cells = <0>;
2273 reg = <0x0 0x1e000 0x0 0x20>;
2276 #size-cells = <0>;
2283 reg = <0x0 0x1f000 0x0 0x20>;
2286 #size-cells = <0>;
2292 reg = <0x0 0x18000 0x0 0x10>;
2297 reg = <0x0 0x22000 0x0 0x18>;
2306 reg = <0x0 0x23000 0x0 0x18>;
2315 reg = <0x0 0x24000 0x0 0x18>;
2326 reg = <0x0 0xffe03000 0x0 0x800>;
2338 reg = <0x0 0xffe05000 0x0 0x800>;
2350 reg = <0x0 0xffe07000 0x0 0x800>;
2363 reg = <0x0 0xffe09000 0x0 0xa0>;
2380 reg = <0x0 0xff400000 0x0 0x40000>;
2394 reg = <0x0 0xff500000 0x0 0x100000>;
2398 snps,quirk-frame-length-adjustment = <0x20>;
2405 reg = <0x0 0xffe40000 0x0 0x40000>;
2421 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2423 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2425 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2427 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2435 #clock-cells = <0>;