Lines Matching +full:simple +full:- +full:framebuffer
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/reset/sun50i-a64-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/reset/sun8i-r-ccu.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <1>;
25 simplefb_lcd: framebuffer-lcd {
26 compatible = "allwinner,simple-framebuffer",
27 "simple-framebuffer";
28 allwinner,pipeline = "mixer0-lcd0";
34 simplefb_hdmi: framebuffer-hdmi {
35 compatible = "allwinner,simple-framebuffer",
36 "simple-framebuffer";
37 allwinner,pipeline = "mixer1-lcd1-hdmi";
45 #address-cells = <1>;
46 #size-cells = <0>;
49 compatible = "arm,cortex-a53";
52 enable-method = "psci";
53 next-level-cache = <&L2>;
55 clock-names = "cpu";
56 #cooling-cells = <2>;
60 compatible = "arm,cortex-a53";
63 enable-method = "psci";
64 next-level-cache = <&L2>;
66 clock-names = "cpu";
67 #cooling-cells = <2>;
71 compatible = "arm,cortex-a53";
74 enable-method = "psci";
75 next-level-cache = <&L2>;
77 clock-names = "cpu";
78 #cooling-cells = <2>;
82 compatible = "arm,cortex-a53";
85 enable-method = "psci";
86 next-level-cache = <&L2>;
88 clock-names = "cpu";
89 #cooling-cells = <2>;
92 L2: l2-cache {
94 cache-level = <2>;
98 de: display-engine {
99 compatible = "allwinner,sun50i-a64-display-engine";
106 #clock-cells = <0>;
107 compatible = "fixed-clock";
108 clock-frequency = <24000000>;
109 clock-output-names = "osc24M";
113 #clock-cells = <0>;
114 compatible = "fixed-clock";
115 clock-frequency = <32768>;
116 clock-output-names = "ext-osc32k";
120 compatible = "arm,cortex-a53-pmu";
125 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
129 compatible = "arm,psci-0.2";
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "simple-audio-card";
137 simple-audio-card,name = "sun50i-a64-audio";
138 simple-audio-card,aux-devs = <&codec_analog>;
139 simple-audio-card,routing =
146 simple-audio-card,dai-link@0 {
148 frame-master = <&link0_cpu>;
149 bitclock-master = <&link0_cpu>;
150 mclk-fs = <128>;
153 sound-dai = <&dai>;
157 sound-dai = <&codec 0>;
163 compatible = "arm,armv8-timer";
164 allwinner,erratum-unknown1;
165 arm,no-tick-in-suspend;
176 thermal-zones {
177 cpu_thermal: cpu0-thermal {
179 polling-delay-passive = <0>;
180 polling-delay = <0>;
181 thermal-sensors = <&ths 0>;
183 cooling-maps {
186 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
193 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
224 gpu0_thermal: gpu0-thermal {
226 polling-delay-passive = <0>;
227 polling-delay = <0>;
228 thermal-sensors = <&ths 1>;
231 gpu1_thermal: gpu1-thermal {
233 polling-delay-passive = <0>;
234 polling-delay = <0>;
235 thermal-sensors = <&ths 2>;
240 compatible = "simple-bus";
241 #address-cells = <1>;
242 #size-cells = <1>;
246 compatible = "allwinner,sun50i-a64-de2";
249 #address-cells = <1>;
250 #size-cells = <1>;
254 compatible = "allwinner,sun50i-a64-de2-clk";
258 clock-names = "bus",
261 #clock-cells = <1>;
262 #reset-cells = <1>;
266 compatible = "allwinner,sun50i-a64-de2-rotate",
267 "allwinner,sun8i-a83t-de2-rotate";
272 clock-names = "bus",
278 compatible = "allwinner,sun50i-a64-de2-mixer-0";
282 clock-names = "bus",
287 #address-cells = <1>;
288 #size-cells = <0>;
291 #address-cells = <1>;
292 #size-cells = <0>;
297 remote-endpoint = <&tcon0_in_mixer0>;
302 remote-endpoint = <&tcon1_in_mixer0>;
309 compatible = "allwinner,sun50i-a64-de2-mixer-1";
313 clock-names = "bus",
318 #address-cells = <1>;
319 #size-cells = <0>;
322 #address-cells = <1>;
323 #size-cells = <0>;
328 remote-endpoint = <&tcon0_in_mixer1>;
333 remote-endpoint = <&tcon1_in_mixer1>;
341 compatible = "allwinner,sun50i-a64-system-control";
343 #address-cells = <1>;
344 #size-cells = <1>;
348 compatible = "mmio-sram";
350 #address-cells = <1>;
351 #size-cells = <1>;
354 de2_sram: sram-section@0 {
355 compatible = "allwinner,sun50i-a64-sram-c";
361 compatible = "mmio-sram";
363 #address-cells = <1>;
364 #size-cells = <1>;
367 ve_sram: sram-section@0 {
368 compatible = "allwinner,sun50i-a64-sram-c1",
369 "allwinner,sun4i-a10-sram-c1";
375 dma: dma-controller@1c02000 {
376 compatible = "allwinner,sun50i-a64-dma";
380 dma-channels = <8>;
381 dma-requests = <27>;
383 #dma-cells = <1>;
386 tcon0: lcd-controller@1c0c000 {
387 compatible = "allwinner,sun50i-a64-tcon-lcd",
388 "allwinner,sun8i-a83t-tcon-lcd";
392 clock-names = "ahb", "tcon-ch0";
393 clock-output-names = "tcon-pixel-clock";
394 #clock-cells = <0>;
396 reset-names = "lcd", "lvds";
399 #address-cells = <1>;
400 #size-cells = <0>;
403 #address-cells = <1>;
404 #size-cells = <0>;
409 remote-endpoint = <&mixer0_out_tcon0>;
414 remote-endpoint = <&mixer1_out_tcon0>;
419 #address-cells = <1>;
420 #size-cells = <0>;
425 remote-endpoint = <&dsi_in_tcon0>;
426 allwinner,tcon-channel = <1>;
432 tcon1: lcd-controller@1c0d000 {
433 compatible = "allwinner,sun50i-a64-tcon-tv",
434 "allwinner,sun8i-a83t-tcon-tv";
438 clock-names = "ahb", "tcon-ch1";
440 reset-names = "lcd";
443 #address-cells = <1>;
444 #size-cells = <0>;
447 #address-cells = <1>;
448 #size-cells = <0>;
453 remote-endpoint = <&mixer0_out_tcon1>;
458 remote-endpoint = <&mixer1_out_tcon1>;
463 #address-cells = <1>;
464 #size-cells = <0>;
469 remote-endpoint = <&hdmi_in_tcon1>;
475 video-codec@1c0e000 {
476 compatible = "allwinner,sun50i-a64-video-engine";
480 clock-names = "ahb", "mod", "ram";
487 compatible = "allwinner,sun50i-a64-mmc";
490 clock-names = "ahb", "mmc";
492 reset-names = "ahb";
494 max-frequency = <150000000>;
496 #address-cells = <1>;
497 #size-cells = <0>;
501 compatible = "allwinner,sun50i-a64-mmc";
504 clock-names = "ahb", "mmc";
506 reset-names = "ahb";
508 max-frequency = <150000000>;
510 #address-cells = <1>;
511 #size-cells = <0>;
515 compatible = "allwinner,sun50i-a64-emmc";
518 clock-names = "ahb", "mmc";
520 reset-names = "ahb";
522 max-frequency = <150000000>;
524 #address-cells = <1>;
525 #size-cells = <0>;
529 compatible = "allwinner,sun50i-a64-sid";
531 #address-cells = <1>;
532 #size-cells = <1>;
534 ths_calibration: thermal-sensor-calibration@34 {
540 compatible = "allwinner,sun50i-a64-crypto";
544 clock-names = "bus", "mod";
549 compatible = "allwinner,sun50i-a64-msgbox",
550 "allwinner,sun6i-a31-msgbox";
555 #mbox-cells = <1>;
559 compatible = "allwinner,sun8i-a33-musb";
564 interrupt-names = "mc";
566 phy-names = "usb";
573 compatible = "allwinner,sun50i-a64-usb-phy";
577 reg-names = "phy_ctrl",
582 clock-names = "usb0_phy",
586 reset-names = "usb0_reset",
589 #phy-cells = <1>;
593 compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
602 phy-names = "usb";
607 compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
614 phy-names = "usb";
619 compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
628 phy-names = "usb";
633 compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
640 phy-names = "usb";
645 compatible = "allwinner,sun50i-a64-ccu";
648 clock-names = "hosc", "losc";
649 #clock-cells = <1>;
650 #reset-cells = <1>;
654 compatible = "allwinner,sun50i-a64-pinctrl";
656 interrupt-parent = <&r_intc>;
661 clock-names = "apb", "hosc", "losc";
662 gpio-controller;
663 #gpio-cells = <3>;
664 interrupt-controller;
665 #interrupt-cells = <3>;
667 /omit-if-no-ref/
668 aif2_pins: aif2-pins {
673 /omit-if-no-ref/
674 aif3_pins: aif3-pins {
679 csi_pins: csi-pins {
685 /omit-if-no-ref/
686 csi_mclk_pin: csi-mclk-pin {
691 i2c0_pins: i2c0-pins {
696 i2c1_pins: i2c1-pins {
701 i2c2_pins: i2c2-pins {
706 /omit-if-no-ref/
707 lcd_rgb666_pins: lcd-rgb666-pins {
716 mmc0_pins: mmc0-pins {
720 drive-strength = <30>;
721 bias-pull-up;
724 mmc1_pins: mmc1-pins {
728 drive-strength = <30>;
729 bias-pull-up;
732 mmc2_pins: mmc2-pins {
737 drive-strength = <30>;
738 bias-pull-up;
741 mmc2_ds_pin: mmc2-ds-pin {
744 drive-strength = <30>;
745 bias-pull-up;
748 pwm_pin: pwm-pin {
753 rmii_pins: rmii-pins {
757 drive-strength = <40>;
760 rgmii_pins: rgmii-pins {
765 drive-strength = <40>;
768 spdif_tx_pin: spdif-tx-pin {
773 spi0_pins: spi0-pins {
778 spi1_pins: spi1-pins {
783 uart0_pb_pins: uart0-pb-pins {
788 uart1_pins: uart1-pins {
793 uart1_rts_cts_pins: uart1-rts-cts-pins {
798 uart2_pins: uart2-pins {
803 uart3_pins: uart3-pins {
808 uart4_pins: uart4-pins {
813 uart4_rts_cts_pins: uart4-rts-cts-pins {
820 compatible = "allwinner,sun50i-a64-timer",
821 "allwinner,sun8i-a23-timer";
829 compatible = "allwinner,sun50i-a64-wdt",
830 "allwinner,sun6i-a31-wdt";
837 #sound-dai-cells = <0>;
838 compatible = "allwinner,sun50i-a64-spdif",
839 "allwinner,sun8i-h3-spdif";
844 clock-names = "apb", "spdif";
846 dma-names = "tx";
847 pinctrl-names = "default";
848 pinctrl-0 = <&spdif_tx_pin>;
853 compatible = "allwinner,sun50i-a64-lradc",
854 "allwinner,sun8i-a83t-r-lradc";
856 interrupt-parent = <&r_intc>;
862 #sound-dai-cells = <0>;
863 compatible = "allwinner,sun50i-a64-i2s",
864 "allwinner,sun8i-h3-i2s";
868 clock-names = "apb", "mod";
870 dma-names = "rx", "tx";
876 #sound-dai-cells = <0>;
877 compatible = "allwinner,sun50i-a64-i2s",
878 "allwinner,sun8i-h3-i2s";
882 clock-names = "apb", "mod";
884 dma-names = "rx", "tx";
890 #sound-dai-cells = <0>;
891 compatible = "allwinner,sun50i-a64-i2s",
892 "allwinner,sun8i-h3-i2s";
896 clock-names = "apb", "mod";
898 dma-names = "rx", "tx";
904 #sound-dai-cells = <0>;
905 compatible = "allwinner,sun50i-a64-codec-i2s";
909 clock-names = "apb", "mod";
912 dma-names = "rx", "tx";
917 #sound-dai-cells = <1>;
918 compatible = "allwinner,sun50i-a64-codec",
919 "allwinner,sun8i-a33-codec";
923 clock-names = "bus", "mod";
927 ths: thermal-sensor@1c25000 {
928 compatible = "allwinner,sun50i-a64-ths";
931 clock-names = "bus", "mod";
934 nvmem-cells = <&ths_calibration>;
935 nvmem-cell-names = "calibration";
936 #thermal-sensor-cells = <1>;
940 compatible = "snps,dw-apb-uart";
943 reg-shift = <2>;
944 reg-io-width = <4>;
951 compatible = "snps,dw-apb-uart";
954 reg-shift = <2>;
955 reg-io-width = <4>;
962 compatible = "snps,dw-apb-uart";
965 reg-shift = <2>;
966 reg-io-width = <4>;
973 compatible = "snps,dw-apb-uart";
976 reg-shift = <2>;
977 reg-io-width = <4>;
984 compatible = "snps,dw-apb-uart";
987 reg-shift = <2>;
988 reg-io-width = <4>;
995 compatible = "allwinner,sun6i-a31-i2c";
1000 pinctrl-names = "default";
1001 pinctrl-0 = <&i2c0_pins>;
1003 #address-cells = <1>;
1004 #size-cells = <0>;
1008 compatible = "allwinner,sun6i-a31-i2c";
1013 pinctrl-names = "default";
1014 pinctrl-0 = <&i2c1_pins>;
1016 #address-cells = <1>;
1017 #size-cells = <0>;
1021 compatible = "allwinner,sun6i-a31-i2c";
1026 pinctrl-names = "default";
1027 pinctrl-0 = <&i2c2_pins>;
1029 #address-cells = <1>;
1030 #size-cells = <0>;
1034 compatible = "allwinner,sun8i-h3-spi";
1038 clock-names = "ahb", "mod";
1040 dma-names = "rx", "tx";
1041 pinctrl-names = "default";
1042 pinctrl-0 = <&spi0_pins>;
1045 num-cs = <1>;
1046 #address-cells = <1>;
1047 #size-cells = <0>;
1051 compatible = "allwinner,sun8i-h3-spi";
1055 clock-names = "ahb", "mod";
1057 dma-names = "rx", "tx";
1058 pinctrl-names = "default";
1059 pinctrl-0 = <&spi1_pins>;
1062 num-cs = <1>;
1063 #address-cells = <1>;
1064 #size-cells = <0>;
1068 compatible = "allwinner,sun50i-a64-emac";
1072 interrupt-names = "macirq";
1074 reset-names = "stmmaceth";
1076 clock-names = "stmmaceth";
1080 compatible = "snps,dwmac-mdio";
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1087 compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
1096 interrupt-names = "gp",
1104 clock-names = "bus", "core";
1108 gic: interrupt-controller@1c81000 {
1109 compatible = "arm,gic-400";
1115 interrupt-controller;
1116 #interrupt-cells = <3>;
1120 compatible = "allwinner,sun50i-a64-pwm",
1121 "allwinner,sun5i-a13-pwm";
1124 pinctrl-names = "default";
1125 pinctrl-0 = <&pwm_pin>;
1126 #pwm-cells = <3>;
1130 mbus: dram-controller@1c62000 {
1131 compatible = "allwinner,sun50i-a64-mbus";
1134 #address-cells = <1>;
1135 #size-cells = <1>;
1136 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
1137 #interconnect-cells = <1>;
1141 compatible = "allwinner,sun50i-a64-csi";
1147 clock-names = "bus", "mod", "ram";
1149 pinctrl-names = "default";
1150 pinctrl-0 = <&csi_pins>;
1155 compatible = "allwinner,sun50i-a64-mipi-dsi";
1161 phy-names = "dphy";
1163 #address-cells = <1>;
1164 #size-cells = <0>;
1168 remote-endpoint = <&tcon0_out_dsi>;
1173 dphy: d-phy@1ca1000 {
1174 compatible = "allwinner,sun50i-a64-mipi-dphy",
1175 "allwinner,sun6i-a31-mipi-dphy";
1179 clock-names = "bus", "mod";
1182 #phy-cells = <0>;
1186 compatible = "allwinner,sun50i-a64-deinterlace",
1187 "allwinner,sun8i-h3-deinterlace";
1192 clock-names = "bus", "mod", "ram";
1196 interconnect-names = "dma-mem";
1200 compatible = "allwinner,sun50i-a64-dw-hdmi",
1201 "allwinner,sun8i-a83t-dw-hdmi";
1203 reg-io-width = <1>;
1207 clock-names = "iahb", "isfr", "tmds";
1209 reset-names = "ctrl";
1211 phy-names = "phy";
1215 #address-cells = <1>;
1216 #size-cells = <0>;
1222 remote-endpoint = <&tcon1_out_hdmi>;
1232 hdmi_phy: hdmi-phy@1ef0000 {
1233 compatible = "allwinner,sun50i-a64-hdmi-phy";
1237 clock-names = "bus", "mod", "pll-0";
1239 reset-names = "phy";
1240 #phy-cells = <0>;
1244 compatible = "allwinner,sun50i-a64-rtc",
1245 "allwinner,sun8i-h3-rtc";
1247 interrupt-parent = <&r_intc>;
1250 clock-output-names = "osc32k", "osc32k-out", "iosc";
1252 #clock-cells = <1>;
1255 r_intc: interrupt-controller@1f00c00 {
1256 compatible = "allwinner,sun50i-a64-r-intc",
1257 "allwinner,sun6i-a31-r-intc";
1258 interrupt-controller;
1259 #interrupt-cells = <3>;
1265 compatible = "allwinner,sun50i-a64-r-ccu";
1269 clock-names = "hosc", "losc", "iosc", "pll-periph";
1270 #clock-cells = <1>;
1271 #reset-cells = <1>;
1274 codec_analog: codec-analog@1f015c0 {
1275 compatible = "allwinner,sun50i-a64-codec-analog";
1281 compatible = "allwinner,sun50i-a64-i2c",
1282 "allwinner,sun6i-a31-i2c";
1288 #address-cells = <1>;
1289 #size-cells = <0>;
1293 compatible = "allwinner,sun50i-a64-ir",
1294 "allwinner,sun6i-a31-ir";
1297 clock-names = "apb", "ir";
1300 pinctrl-names = "default";
1301 pinctrl-0 = <&r_ir_rx_pin>;
1306 compatible = "allwinner,sun50i-a64-pwm",
1307 "allwinner,sun5i-a13-pwm";
1310 pinctrl-names = "default";
1311 pinctrl-0 = <&r_pwm_pin>;
1312 #pwm-cells = <3>;
1317 compatible = "allwinner,sun50i-a64-r-pinctrl";
1319 interrupt-parent = <&r_intc>;
1322 clock-names = "apb", "hosc", "losc";
1323 gpio-controller;
1324 #gpio-cells = <3>;
1325 interrupt-controller;
1326 #interrupt-cells = <3>;
1328 r_i2c_pl89_pins: r-i2c-pl89-pins {
1333 r_ir_rx_pin: r-ir-rx-pin {
1338 r_pwm_pin: r-pwm-pin {
1343 r_rsb_pins: r-rsb-pins {
1350 compatible = "allwinner,sun8i-a23-rsb";
1354 clock-frequency = <3000000>;
1356 pinctrl-names = "default";
1357 pinctrl-0 = <&r_rsb_pins>;
1359 #address-cells = <1>;
1360 #size-cells = <0>;