Lines Matching refs:erratum
368 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
390 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
393 Under certain conditions this erratum can cause a clean line eviction
412 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
418 address, then this erratum might cause a clean cache line to be
435 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
440 maintenance operation to the same address, then this erratum might
456 erratum 832075 on Cortex-A57 parts up to r1p2.
475 erratum 834220 on Cortex-A57 parts up to r1p2.
496 erratum 845719 on Cortex-A53 parts up to r0p4.
536 this erratum will continue to use the feature.
562 This option adds a workaround for ARM Cortex-A76 erratum 1165522.
575 This option adds work arounds for ARM Cortex-A57 erratum 1319537
576 and A72 erratum 1319367
588 This option adds a workaround for ARM Cortex-A55 erratum 1530923.
604 This option adds a workaround for ARM Cortex-A76 erratum 1286807.
619 This option adds a workaround for Arm Cortex-A76 erratum 1463225.
627 Work around the erratum by triggering a dummy step exception
637 This option adds a workaround for ARM Neoverse-N1 erratum
653 This option adds a workaround for Arm Cortex-A77 erratum 1508412.
670 bool "Cavium erratum 22375, 24313"
678 erratum 22375: only alloc 8MB table size
679 erratum 24313: ignore memory access type
687 bool "Cavium erratum 23144: ITS SYNC hang on dual socket system"
696 bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed"
706 bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption"
717 bool "Cavium erratum 30115: Guest may disable interrupts in host"
728 bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails"
745 bool "Fujitsu-A64FX erratum E#010001: Undefined fault may occur wrongly"
748 This option adds a workaround for Fujitsu-A64FX erratum E#010001.
781 is unchanged. Work around the erratum by invalidating the walk cache