Lines Matching +full:d +full:- +full:cache +full:- +full:size
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-fa.S
6 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
8 * Based on cache-v4wb.S:
9 * Copyright (C) 1997-2002 Russell king
19 #include "proc-macros.S"
22 * The size of one data cache line.
27 * The total size of the data cache.
45 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
52 * Clean and invalidate all cache entries in a particular address
60 * Clean and invalidate the entire cache.
66 mcr p15, 0, ip, c7, c14, 0 @ clean/invalidate D cache
68 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
77 * Invalidate a range of cache entries in the specified
80 * - start - start address (inclusive, page aligned)
81 * - end - end address (exclusive, page aligned)
82 * - flags - vma_area_struct flags describing address space
86 sub r3, r1, r0 @ calculate total size
87 cmp r3, #CACHE_DLIMIT @ total size >= limit?
88 bhs __flush_whole_cache @ flush whole D cache
92 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
106 * region described by start. If you have non-snooping
109 * - start - virtual start address
110 * - end - virtual end address
119 * region described by start. If you have non-snooping
122 * - start - virtual start address
123 * - end - virtual end address
126 bic r0, r0, #CACHE_DLINESIZE - 1
127 1: mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
139 * flush_kern_dcache_area(void *addr, size_t size)
144 * - addr - kernel address
145 * - size - size of region
149 1: mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
154 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
163 * are not cache line aligned, those lines must be written
166 * - start - virtual start address
167 * - end - virtual end address
170 tst r0, #CACHE_DLINESIZE - 1
171 bic r0, r0, #CACHE_DLINESIZE - 1
172 mcrne p15, 0, r0, c7, c14, 1 @ clean & invalidate D entry
173 tst r1, #CACHE_DLINESIZE - 1
174 bic r1, r1, #CACHE_DLINESIZE - 1
175 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D entry
176 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
189 * - start - virtual start address
190 * - end - virtual end address
193 bic r0, r0, #CACHE_DLINESIZE - 1
194 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
204 * - start - virtual start address of region
205 * - end - virtual end address of region
208 bic r0, r0, #CACHE_DLINESIZE - 1
209 1: mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D entry
218 * dma_map_area(start, size, dir)
219 * - start - kernel virtual start address
220 * - size - size of region
221 * - dir - DMA direction
232 * dma_unmap_area(start, size, dir)
233 * - start - kernel virtual start address
234 * - size - size of region
235 * - dir - DMA direction
246 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)