Lines Matching +full:ixp4xx +full:- +full:crypto
2 * arch/arm/mach-ixp4xx/common.c
4 * Generic code shared across all IXP4XX platforms
9 * Copyright 2003-2004 (c) MontaVista, Software, Inc.
30 #include <linux/soc/ixp4xx/cpu.h>
31 #include <linux/irqchip/irq-ixp4xx.h>
32 #include <linux/platform_data/timer-ixp4xx.h>
33 #include <linux/dma-map-ops.h>
71 * IXP4xx chipset I/O mapping
100 * ixp4xx does not implement the XScale PWRMODE register in ixp4xx_init_irq()
145 .name = "ixp4xx-gpio",
146 .id = -1,
155 * USB device controller. The IXP4xx uses the same controller as PXA25X,
159 .name = "pxa25x-udc",
160 .id = -1,
188 .name = "ixp4xx-npe",
189 .id = -1,
213 .name = "ixp4xx-qmgr",
214 .id = -1,
239 /* A single 32-bit register on IXP46x */
251 .name = "ixp4xx-hwrandom",
252 .id = -1,
265 .name = "IOP3xx-I2C",
278 .name = "ptp-ixp46x",
279 .id = -1,
305 printk(KERN_ERR "ixp_crypto: No HW crypto available\n"); in ixp_crypto_register()
306 return -ENODEV; in ixp_crypto_register()
339 printk("IXP4xx: Using %luMiB expansion bus window size\n", in ixp4xx_sys_init()
352 /* Use on-chip reset capability */ in ixp4xx_restart()
386 dev->dma_mask = &dev->coherent_dma_mask; in ixp4xx_platform_notify()
390 dev->coherent_dma_mask = DMA_BIT_MASK(28); /* 64 MB */ in ixp4xx_platform_notify()
396 dev->coherent_dma_mask = DMA_BIT_MASK(32); in ixp4xx_platform_notify()
406 dev->coherent_dma_mask = mask; in dma_set_coherent_mask()
410 return -EIO; /* device wanted sub-64MB mask */ in dma_set_coherent_mask()