Lines Matching full:lr
43 badr lr, 9997f
55 mov lr, pc
76 mov lr, pc
90 ARM( stmib sp, {r1 - lr} )
93 THUMB( str lr, [sp, #S_LR] )
169 mov r3, lr
224 mov r8, lr
313 mov r1, lr @ Save lr_abt
327 mov lr, r1 @ Restore lr_abt, abort is unsafe
376 ARM( stmdb r0, {sp, lr}^ )
451 @ instruction, or the more conventional lr if we are to treat
463 sub r4, r2, #4 @ ARM instr at LR - 4
472 @ lr = 32-bit undefined instruction function
473 badr lr, __und_usr_fault_32
478 sub r4, r2, #2 @ First half of thumb instr at LR - 2
510 badr lr, __und_usr_fault_32
514 @ lr = 32bit undefined instruction function
568 * lr = unrecognised instruction return address
598 reteq lr
617 ret.w lr @ CP#0
620 ret.w lr @ CP#3
621 ret.w lr @ CP#4
622 ret.w lr @ CP#5
623 ret.w lr @ CP#6
624 ret.w lr @ CP#7
625 ret.w lr @ CP#8
626 ret.w lr @ CP#9
631 ret.w lr @ CP#10 (VFP)
632 ret.w lr @ CP#11 (VFP)
634 ret.w lr @ CP#12
635 ret.w lr @ CP#13
636 ret.w lr @ CP#14 (Debug)
637 ret.w lr @ CP#15 (Control)
680 * lr = unrecognised FP instruction return address
690 ret lr
701 badr lr, ret_from_exception
746 ARM( stmia ip!, {r4 - sl, fp, sp, lr} ) @ Store most regs on stack
749 THUMB( str lr, [ip], #4 )
846 usr_ret lr
858 stmfd sp!, {r4, r5, r6, lr}
860 ldmia r1, {r6, lr} @ load new val
864 2: stmiaeq r2, {r6, lr} @ store newval if eq
883 ret lr
890 usr_ret lr
901 usr_ret lr
924 usr_ret lr
938 ret lr
945 usr_ret lr
959 ALT_UP(usr_ret lr)
967 usr_ret lr
992 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
1002 sub lr, lr, #\correction
1009 stmia sp, {r0, lr} @ save r0, lr
1010 mrs lr, spsr
1011 str lr, [sp, #8] @ save spsr
1023 and lr, lr, #0x0f
1025 THUMB( ldr lr, [r0, lr, lsl #2] )
1027 ARM( ldr lr, [pc, lr, lsl #2] )
1028 movs pc, lr @ branch to handler in SVC mode
1070 * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
1093 * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
1116 * Enter in UND mode, spsr = SVC/USR CPSR, lr = SVC/USR PC