Lines Matching +full:led +full:- +full:controller
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
6 compatible = "arm,versatile-ab";
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
19 stdout-path = &uart0;
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
30 clock-frequency = <24000000>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 #address-cells = <1>;
40 #size-cells = <0>;
46 remote-endpoint = <&clcd_pads_vga_dac>;
54 remote-endpoint = <&vga_con_in>;
61 compatible = "vga-connector";
65 remote-endpoint = <&vga_bridge_out>;
70 core-module@10000000 {
71 compatible = "arm,core-module-versatile", "syscon", "simple-mfd";
74 led@08.0 {
75 compatible = "register-bit-led";
79 linux,default-trigger = "heartbeat";
80 default-state = "on";
82 led@08.1 {
83 compatible = "register-bit-led";
87 linux,default-trigger = "mmc0";
88 default-state = "off";
90 led@08.2 {
91 compatible = "register-bit-led";
95 linux,default-trigger = "cpu0";
96 default-state = "off";
98 led@08.3 {
99 compatible = "register-bit-led";
103 default-state = "off";
105 led@08.4 {
106 compatible = "register-bit-led";
110 default-state = "off";
112 led@08.5 {
113 compatible = "register-bit-led";
117 default-state = "off";
119 led@08.6 {
120 compatible = "register-bit-led";
124 default-state = "off";
126 led@08.7 {
127 compatible = "register-bit-led";
131 default-state = "off";
136 #clock-cells = <0>;
137 compatible = "arm,versatile-cm-auxosc";
143 #clock-cells = <0>;
144 compatible = "fixed-factor-clock";
145 clock-div = <24>;
146 clock-mult = <1>;
151 #clock-cells = <0>;
152 compatible = "fixed-factor-clock";
153 clock-div = <1>;
154 clock-mult = <1>;
160 /* 64 MiB NOR flash in non-interleaved chips */
161 compatible = "arm,versatile-flash", "cfi-flash";
163 bank-width = <4>;
165 compatible = "arm,arm-firmware-suite";
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "arm,versatile-i2c";
188 compatible = "arm,versatile-lcd";
193 compatible = "simple-bus";
194 #address-cells = <1>;
195 #size-cells = <1>;
198 vic: interrupt-controller@10140000 {
199 compatible = "arm,versatile-vic";
200 interrupt-controller;
201 #interrupt-cells = <1>;
203 valid-mask = <0xffffffff>;
206 sic: interrupt-controller@10003000 {
207 compatible = "arm,versatile-sic";
208 interrupt-controller;
209 #interrupt-cells = <1>;
211 interrupt-parent = <&vic>;
213 clear-mask = <0xffffffff>;
216 * table 4-36 page 4-50 of ARM DUI 0225D
218 valid-mask = <0x0760031b>;
226 clock-names = "apb_pclk";
234 clock-names = "uartclk", "apb_pclk";
242 clock-names = "uartclk", "apb_pclk";
250 clock-names = "uartclk", "apb_pclk";
257 clock-names = "apb_pclk";
264 clock-names = "apb_pclk";
272 clock-names = "clcdclk", "apb_pclk";
274 max-memory-bandwidth = <54000000>;
288 * ARM DUI 0225D, page 3-41, figure 3-19.
291 #address-cells = <1>;
292 #size-cells = <0>;
296 remote-endpoint = <&panel_in>;
297 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
301 remote-endpoint = <&vga_bridge_in>;
302 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
311 clock-names = "apb_pclk";
319 clock-names = "apb_pclk";
327 clock-names = "timer0", "timer1", "apb_pclk";
335 clock-names = "timer0", "timer1", "apb_pclk";
341 gpio-controller;
343 #gpio-cells = <2>;
344 interrupt-controller;
345 #interrupt-cells = <2>;
347 clock-names = "apb_pclk";
354 gpio-controller;
355 #gpio-cells = <2>;
356 interrupt-controller;
357 #interrupt-cells = <2>;
359 clock-names = "apb_pclk";
367 clock-names = "apb_pclk";
375 clock-names = "apb_pclk";
383 clock-names = "SSPCLK", "apb_pclk";
387 compatible = "arm,versatile-fpga", "simple-bus";
388 #address-cells = <1>;
389 #size-cells = <1>;
393 compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
397 compatible = "arm,versatile-tft-panel";
401 remote-endpoint = <&clcd_pads_panel>;
412 clock-names = "apb_pclk";
417 interrupts-extended = <&vic 22 &sic 1>;
419 clock-names = "mclk", "apb_pclk";
424 interrupt-parent = <&sic>;
427 clock-names = "KMIREFCLK", "apb_pclk";
432 interrupt-parent = <&sic>;
435 clock-names = "KMIREFCLK", "apb_pclk";