Lines Matching +full:0 +full:x10008000
24 reg = <0x0 0x08000000>;
28 #clock-cells = <0>;
36 #size-cells = <0>;
40 #size-cells = <0>;
42 port@0 {
43 reg = <0>;
72 reg = <0x10000000 0x200>;
76 offset = <0x08>;
77 mask = <0x01>;
78 label = "versatile:0";
84 offset = <0x08>;
85 mask = <0x02>;
92 offset = <0x08>;
93 mask = <0x04>;
100 offset = <0x08>;
101 mask = <0x08>;
107 offset = <0x08>;
108 mask = <0x10>;
114 offset = <0x08>;
115 mask = <0x20>;
121 offset = <0x08>;
122 mask = <0x40>;
128 offset = <0x08>;
129 mask = <0x80>;
136 #clock-cells = <0>;
143 #clock-cells = <0>;
151 #clock-cells = <0>;
162 reg = <0x34000000 0x04000000>;
171 #size-cells = <0>;
173 reg = <0x10002000 0x1000>;
177 reg = <0x68>;
183 reg = <0x10010000 0x10000>;
189 reg = <0x10008000 0x1000>;
202 reg = <0x10140000 0x1000>;
203 valid-mask = <0xffffffff>;
210 reg = <0x10003000 0x1000>;
213 clear-mask = <0xffffffff>;
218 valid-mask = <0x0760031b>;
223 reg = <0x10130000 0x1000>;
231 reg = <0x101f1000 0x1000>;
239 reg = <0x101f2000 0x1000>;
247 reg = <0x101f3000 0x1000>;
255 reg = <0x10100000 0x1000>;
262 reg = <0x10110000 0x1000>;
269 reg = <0x10120000 0x1000>;
290 port@0 {
292 #size-cells = <0>;
294 clcd_pads_panel: endpoint@0 {
295 reg = <0>;
297 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
302 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
309 reg = <0x101e0000 0x1000>;
316 reg = <0x101e1000 0x1000>;
317 interrupts = <0>;
324 reg = <0x101e2000 0x1000>;
332 reg = <0x101e3000 0x1000>;
340 reg = <0x101e4000 0x1000>;
352 reg = <0x101e5000 0x1000>;
364 reg = <0x101e8000 0x1000>;
372 reg = <0x101f0000 0x1000>;
380 reg = <0x101f4000 0x1000>;
390 ranges = <0 0x10000000 0x10000>;
392 sysreg@0 {
394 reg = <0x00000 0x1000>;
396 panel: display@0 {
409 reg = <0x4000 0x1000>;
416 reg = <0x5000 0x1000>;
423 reg = <0x6000 0x1000>;
431 reg = <0x7000 0x1000>;