Lines Matching +full:lcd +full:- +full:rst
1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <®_1v8_avdd_hdmi_pll>;
19 vdd-supply = <®_3v3_avdd_hdmi>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
28 /* Analogue Audio (On-module) */
29 clk1-out-pw4 {
34 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 dap3-fs-pp0 {
47 gmi-ad0-pg0 {
91 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94 dap4-din-pp5 {
111 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
113 lcd-d18-pm2 {
125 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
127 lcd-cs0-n-pn4 {
142 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
144 lcd-pwr0-pb2 {
152 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
161 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
164 lcd-cs1-n-pw0 {
169 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
177 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
179 /* Tri-stating GMI_WR_N on nPWE SODIMM pin 99 */
180 sdmmc3-dat4-pd1 {
185 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
187 /* Not tri-stating GMI_WR_N on RDnWR SODIMM pin 93 */
188 sdmmc3-dat5-pd0 {
193 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
205 sdmmc3-dat3-pb4 {
213 kb-row8-ps0 {
218 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
222 ddc-scl-pv4 {
228 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
232 gen2-i2c-scl-pt5 {
236 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
239 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
241 spdif-in-pk6 {
246 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
250 clk2-out-pw5 {
258 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260 lcd-pwr1-pc1 {
267 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
280 hdmi-int-pn7 {
285 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
289 gen1-i2c-scl-pc4 {
295 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
296 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
299 /* Colibri LCD (L_* resp. LDD<*>) */
300 lcd-d0-pe0 {
326 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332 lcd-m1-pw1 {
337 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
341 kb-row10-ps2 {
347 kb-row11-ps3 {
358 gmi-wp-n-pc7 {
363 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
366 cam-mclk-pcc0 {
371 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
373 cam-i2c-scl-pbb1 {
379 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
380 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
388 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
395 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
399 gmi-rst-n-pi4 {
410 vi-vsync-pd6 {
430 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
434 sdmmc3-dat2-pb5 {
442 sdmmc3-clk-pa6 {
450 sdmmc3-cmd-pa7 {
458 ulpi-clk-py0 {
468 sdmmc3-dat6-pd3 {
474 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
477 /* Colibri UART-A */
478 ulpi-data0 {
492 /* Colibri UART-B */
493 gmi-a16-pj7 {
503 /* Colibri UART-C */
504 uart2-rxd {
513 spdif-out-pk5 {
518 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522 spi2-cs1-n-pw2 {
530 spi2-cs2-n-pw3 {
535 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
539 crt-hsync-pv6 {
545 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
548 /* eMMC (On-module) */
549 sdmmc4-clk-pcc4 {
556 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
558 sdmmc4-dat0-paa0 {
570 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
573 /* LAN_EXT_WAKEUP#, LAN_PME (On-module) */
574 pex-l0-rst-n-pdd1 {
580 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
582 /* LAN_V_BUS, LAN_RESET# (On-module) */
583 pex-l0-clkreq-n-pdd2 {
589 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
593 pex-l2-rst-n-pcc6 {
599 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
603 clk1-req-pee2 {
609 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
611 clk2-req-pcc5 {
621 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
623 gmi-dqs-pi2 {
633 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
635 kb-col0-pq0 {
647 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
649 kb-row0-pr0 {
657 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
659 lcd-pwr2-pc6 {
664 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
667 /* Power I2C (On-module) */
668 pwr-i2c-scl-pz6 {
674 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
675 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
683 lcd-dc1-pd2 {
688 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
691 /* TOUCH_PEN_INT# (On-module) */
697 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
703 compatible = "nvidia,tegra30-hsuart";
707 compatible = "nvidia,tegra30-hsuart";
711 clock-frequency = <10000>;
716 * touch screen controller (On-module)
720 clock-frequency = <100000>;
726 #sound-dai-cells = <0>;
727 VDDA-supply = <®_module_3v3_audio>;
728 VDDD-supply = <®_1v8_vio>;
729 VDDIO-supply = <®_module_3v3>;
738 #interrupt-cells = <2>;
739 interrupt-controller;
740 wakeup-source;
742 ti,system-power-controller;
744 #gpio-cells = <2>;
745 gpio-controller;
747 vcc1-supply = <®_module_3v3>;
748 vcc2-supply = <®_module_3v3>;
749 vcc3-supply = <®_1v8_vio>;
750 vcc4-supply = <®_module_3v3>;
751 vcc5-supply = <®_module_3v3>;
752 vcc6-supply = <®_1v8_vio>;
753 vcc7-supply = <®_5v0_charge_pump>;
754 vccio-supply = <®_module_3v3>;
758 regulator-name = "+V1.35_VDDIO_DDR";
759 regulator-min-microvolt = <1350000>;
760 regulator-max-microvolt = <1350000>;
761 regulator-always-on;
767 regulator-name = "+V1.0_VDD_CPU";
768 regulator-min-microvolt = <1150000>;
769 regulator-max-microvolt = <1150000>;
770 regulator-always-on;
774 regulator-name = "+V1.8";
775 regulator-min-microvolt = <1800000>;
776 regulator-max-microvolt = <1800000>;
777 regulator-always-on;
788 regulator-name = "EN_+V3.3";
789 regulator-min-microvolt = <3300000>;
790 regulator-max-microvolt = <3300000>;
791 regulator-always-on;
797 regulator-name = "+V1.2_VDD_RTC";
798 regulator-min-microvolt = <1200000>;
799 regulator-max-microvolt = <1200000>;
800 regulator-always-on;
808 regulator-name = "+V2.8_AVDD_VDAC";
809 regulator-min-microvolt = <2800000>;
810 regulator-max-microvolt = <2800000>;
811 regulator-always-on;
820 regulator-name = "+V1.05_AVDD_PLLE";
821 regulator-min-microvolt = <1100000>;
822 regulator-max-microvolt = <1100000>;
826 regulator-name = "+V1.2_AVDD_PLL";
827 regulator-min-microvolt = <1200000>;
828 regulator-max-microvolt = <1200000>;
829 regulator-always-on;
833 regulator-name = "+V1.0_VDD_DDR_HS";
834 regulator-min-microvolt = <1000000>;
835 regulator-max-microvolt = <1000000>;
836 regulator-always-on;
845 irq-gpio = <&gpio TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
846 interrupt-controller;
849 irq-trigger = <0x1>;
851 st,adc-freq = <1>;
852 /* 12-bit ADC */
853 st,mod-12b = <1>;
855 st,ref-sel = <0>;
857 st,sample-time = <4>;
858 /* forbid to use ADC channels 3-0 (touch) */
861 compatible = "st,stmpe-ts";
863 st,ave-ctrl = <3>;
865 st,fraction-z = <7>;
870 st,i-drive = <1>;
874 st,touch-det-delay = <5>;
878 compatible = "st,stmpe-adc";
879 st,norequest-mask = <0x0F>;
887 temp-sensor@4c {
897 regulator-name = "tps62362-vout";
898 regulator-min-microvolt = <900000>;
899 regulator-max-microvolt = <1400000>;
900 regulator-boot-on;
901 regulator-always-on;
902 ti,vsel0-state-low;
904 ti,vsel1-state-low;
909 nvidia,invert-interrupt;
910 nvidia,suspend-mode = <1>;
911 nvidia,cpu-pwr-good-time = <5000>;
912 nvidia,cpu-pwr-off-time = <5000>;
913 nvidia,core-pwr-good-time = <3845 3845>;
914 nvidia,core-pwr-off-time = <0>;
915 nvidia,core-power-req-active-high;
916 nvidia,sys-clock-req-active-high;
919 i2c-thermtrip {
920 nvidia,i2c-controller-id = <4>;
921 nvidia,bus-addr = <0x2d>;
922 nvidia,reg-addr = <0x3f>;
923 nvidia,reg-data = <0x1>;
940 bus-width = <8>;
941 non-removable;
942 vmmc-supply = <®_module_3v3>; /* VCC */
943 vqmmc-supply = <®_1v8_vio>; /* VCCQ */
944 mmc-ddr-1_8v;
947 /* EHCI instance 1: USB2_DP/N -> AX88772B (On-module) */
950 #address-cells = <1>;
951 #size-cells = <0>;
955 local-mac-address = [00 00 00 00 00 00];
959 usb-phy@7d004000 {
961 vbus-supply = <®_lan_v_bus>;
965 compatible = "fixed-clock";
966 #clock-cells = <0>;
967 clock-frequency = <32768>;
970 reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {
971 compatible = "regulator-fixed";
972 regulator-name = "+V1.8_AVDD_HDMI_PLL";
973 regulator-min-microvolt = <1800000>;
974 regulator-max-microvolt = <1800000>;
975 enable-active-high;
977 vin-supply = <®_1v8_vio>;
980 reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
981 compatible = "regulator-fixed";
982 regulator-name = "+V3.3_AVDD_HDMI";
983 regulator-min-microvolt = <3300000>;
984 regulator-max-microvolt = <3300000>;
985 enable-active-high;
987 vin-supply = <®_module_3v3>;
990 reg_5v0_charge_pump: regulator-5v0-charge-pump {
991 compatible = "regulator-fixed";
992 regulator-name = "+V5.0";
993 regulator-min-microvolt = <5000000>;
994 regulator-max-microvolt = <5000000>;
995 regulator-always-on;
998 reg_lan_v_bus: regulator-lan-v-bus {
999 compatible = "regulator-fixed";
1000 regulator-name = "LAN_V_BUS";
1001 regulator-min-microvolt = <5000000>;
1002 regulator-max-microvolt = <5000000>;
1003 enable-active-high;
1007 reg_module_3v3: regulator-module-3v3 {
1008 compatible = "regulator-fixed";
1009 regulator-name = "+V3.3";
1010 regulator-min-microvolt = <3300000>;
1011 regulator-max-microvolt = <3300000>;
1012 regulator-always-on;
1015 reg_module_3v3_audio: regulator-module-3v3-audio {
1016 compatible = "regulator-fixed";
1017 regulator-name = "+V3.3_AUDIO_AVDD_S";
1018 regulator-min-microvolt = <3300000>;
1019 regulator-max-microvolt = <3300000>;
1020 regulator-always-on;
1024 compatible = "toradex,tegra-audio-sgtl5000-colibri_t30",
1025 "nvidia,tegra-audio-sgtl5000";
1027 nvidia,audio-routing =
1031 nvidia,i2s-controller = <&tegra_i2s2>;
1032 nvidia,audio-codec = <&sgtl5000>;
1036 clock-names = "pll_a", "pll_a_out0", "mclk";
1038 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1041 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1047 lan-reset-n {
1048 gpio-hog;
1050 output-high;
1051 line-name = "LAN_RESET#";