Lines Matching +full:simple +full:- +full:framebuffer
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun8i-de2.h>
44 #include <dt-bindings/clock/sun8i-h3-ccu.h>
45 #include <dt-bindings/clock/sun8i-r-ccu.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/reset/sun8i-de2.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
49 #include <dt-bindings/reset/sun8i-r-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
57 #address-cells = <1>;
58 #size-cells = <1>;
61 framebuffer-hdmi {
62 compatible = "allwinner,simple-framebuffer",
63 "simple-framebuffer";
64 allwinner,pipeline = "mixer0-lcd0-hdmi";
70 framebuffer-tve {
71 compatible = "allwinner,simple-framebuffer",
72 "simple-framebuffer";
73 allwinner,pipeline = "mixer1-lcd1-tve";
81 #address-cells = <1>;
82 #size-cells = <1>;
86 #clock-cells = <0>;
87 compatible = "fixed-clock";
88 clock-frequency = <24000000>;
89 clock-accuracy = <50000>;
90 clock-output-names = "osc24M";
94 #clock-cells = <0>;
95 compatible = "fixed-clock";
96 clock-frequency = <32768>;
97 clock-accuracy = <50000>;
98 clock-output-names = "ext_osc32k";
102 de: display-engine {
103 compatible = "allwinner,sun8i-h3-display-engine";
109 compatible = "simple-bus";
110 #address-cells = <1>;
111 #size-cells = <1>;
112 dma-ranges;
120 clock-names = "bus",
123 #clock-cells = <1>;
124 #reset-cells = <1>;
128 compatible = "allwinner,sun8i-h3-de2-mixer-0";
132 clock-names = "bus",
137 #address-cells = <1>;
138 #size-cells = <0>;
144 remote-endpoint = <&tcon0_in_mixer0>;
150 dma: dma-controller@1c02000 {
151 compatible = "allwinner,sun8i-h3-dma";
156 #dma-cells = <1>;
159 tcon0: lcd-controller@1c0c000 {
160 compatible = "allwinner,sun8i-h3-tcon-tv",
161 "allwinner,sun8i-a83t-tcon-tv";
165 clock-names = "ahb", "tcon-ch1";
167 reset-names = "lcd";
170 #address-cells = <1>;
171 #size-cells = <0>;
177 remote-endpoint = <&mixer0_out_tcon0>;
182 #address-cells = <1>;
183 #size-cells = <0>;
188 remote-endpoint = <&hdmi_in_tcon0>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&mmc0_pins>;
200 reset-names = "ahb";
203 #address-cells = <1>;
204 #size-cells = <0>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&mmc1_pins>;
213 reset-names = "ahb";
216 #address-cells = <1>;
217 #size-cells = <0>;
224 reset-names = "ahb";
227 #address-cells = <1>;
228 #size-cells = <0>;
234 #address-cells = <1>;
235 #size-cells = <1>;
237 ths_calibration: thermal-sensor-calibration@34 {
243 compatible = "allwinner,sun8i-h3-msgbox",
244 "allwinner,sun6i-a31-msgbox";
249 #mbox-cells = <1>;
253 compatible = "allwinner,sun8i-h3-musb";
258 interrupt-names = "mc";
260 phy-names = "usb";
267 compatible = "allwinner,sun8i-h3-usb-phy";
273 reg-names = "phy_ctrl",
282 clock-names = "usb0_phy",
290 reset-names = "usb0_reset",
295 #phy-cells = <1>;
299 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
308 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
318 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
324 phy-names = "usb";
329 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
336 phy-names = "usb";
341 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
347 phy-names = "usb";
352 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
359 phy-names = "usb";
364 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
370 phy-names = "usb";
375 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
382 phy-names = "usb";
390 clock-names = "hosc", "losc";
391 #clock-cells = <1>;
392 #reset-cells = <1>;
398 interrupt-parent = <&r_intc>;
402 clock-names = "apb", "hosc", "losc";
403 gpio-controller;
404 #gpio-cells = <3>;
405 interrupt-controller;
406 #interrupt-cells = <3>;
408 csi_pins: csi-pins {
415 emac_rgmii_pins: emac-rgmii-pins {
420 drive-strength = <40>;
423 i2c0_pins: i2c0-pins {
428 i2c1_pins: i2c1-pins {
433 i2c2_pins: i2c2-pins {
438 mmc0_pins: mmc0-pins {
442 drive-strength = <30>;
443 bias-pull-up;
446 mmc1_pins: mmc1-pins {
450 drive-strength = <30>;
451 bias-pull-up;
454 mmc2_8bit_pins: mmc2-8bit-pins {
460 drive-strength = <30>;
461 bias-pull-up;
464 spdif_tx_pin: spdif-tx-pin {
469 spi0_pins: spi0-pins {
474 spi1_pins: spi1-pins {
479 uart0_pa_pins: uart0-pa-pins {
484 uart1_pins: uart1-pins {
489 uart1_rts_cts_pins: uart1-rts-cts-pins {
494 uart2_pins: uart2-pins {
499 uart2_rts_cts_pins: uart2-rts-cts-pins {
504 uart3_pins: uart3-pins {
509 uart3_rts_cts_pins: uart3-rts-cts-pins {
516 compatible = "allwinner,sun8i-a23-timer";
524 compatible = "allwinner,sun8i-h3-emac";
528 interrupt-names = "macirq";
530 reset-names = "stmmaceth";
532 clock-names = "stmmaceth";
536 #address-cells = <1>;
537 #size-cells = <0>;
538 compatible = "snps,dwmac-mdio";
541 mdio-mux {
542 compatible = "allwinner,sun8i-h3-mdio-mux";
543 #address-cells = <1>;
544 #size-cells = <0>;
546 mdio-parent-bus = <&mdio>;
549 compatible = "allwinner,sun8i-h3-mdio-internal";
551 #address-cells = <1>;
552 #size-cells = <0>;
554 int_mii_phy: ethernet-phy@1 {
555 compatible = "ethernet-phy-ieee802.3-c22";
564 #address-cells = <1>;
565 #size-cells = <0>;
570 mbus: dram-controller@1c62000 {
571 compatible = "allwinner,sun8i-h3-mbus";
574 #address-cells = <1>;
575 #size-cells = <1>;
576 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
577 #interconnect-cells = <1>;
581 compatible = "allwinner,sun8i-h3-spi";
585 clock-names = "ahb", "mod";
587 dma-names = "rx", "tx";
588 pinctrl-names = "default";
589 pinctrl-0 = <&spi0_pins>;
592 #address-cells = <1>;
593 #size-cells = <0>;
597 compatible = "allwinner,sun8i-h3-spi";
601 clock-names = "ahb", "mod";
603 dma-names = "rx", "tx";
604 pinctrl-names = "default";
605 pinctrl-0 = <&spi1_pins>;
608 #address-cells = <1>;
609 #size-cells = <0>;
613 compatible = "allwinner,sun6i-a31-wdt";
620 #sound-dai-cells = <0>;
621 compatible = "allwinner,sun8i-h3-spdif";
626 clock-names = "apb", "spdif";
628 dma-names = "tx";
633 compatible = "allwinner,sun8i-h3-pwm";
636 #pwm-cells = <3>;
641 #sound-dai-cells = <0>;
642 compatible = "allwinner,sun8i-h3-i2s";
646 clock-names = "apb", "mod";
649 dma-names = "rx", "tx";
654 #sound-dai-cells = <0>;
655 compatible = "allwinner,sun8i-h3-i2s";
659 clock-names = "apb", "mod";
662 dma-names = "rx", "tx";
667 #sound-dai-cells = <0>;
668 compatible = "allwinner,sun8i-h3-i2s";
672 clock-names = "apb", "mod";
675 dma-names = "tx";
680 #sound-dai-cells = <0>;
681 compatible = "allwinner,sun8i-h3-codec";
685 clock-names = "apb", "codec";
688 dma-names = "rx", "tx";
689 allwinner,codec-analog-controls = <&codec_analog>;
694 compatible = "snps,dw-apb-uart";
697 reg-shift = <2>;
698 reg-io-width = <4>;
702 dma-names = "rx", "tx";
707 compatible = "snps,dw-apb-uart";
710 reg-shift = <2>;
711 reg-io-width = <4>;
715 dma-names = "rx", "tx";
720 compatible = "snps,dw-apb-uart";
723 reg-shift = <2>;
724 reg-io-width = <4>;
728 dma-names = "rx", "tx";
733 compatible = "snps,dw-apb-uart";
736 reg-shift = <2>;
737 reg-io-width = <4>;
741 dma-names = "rx", "tx";
746 compatible = "allwinner,sun6i-a31-i2c";
751 pinctrl-names = "default";
752 pinctrl-0 = <&i2c0_pins>;
754 #address-cells = <1>;
755 #size-cells = <0>;
759 compatible = "allwinner,sun6i-a31-i2c";
764 pinctrl-names = "default";
765 pinctrl-0 = <&i2c1_pins>;
767 #address-cells = <1>;
768 #size-cells = <0>;
772 compatible = "allwinner,sun6i-a31-i2c";
777 pinctrl-names = "default";
778 pinctrl-0 = <&i2c2_pins>;
780 #address-cells = <1>;
781 #size-cells = <0>;
784 gic: interrupt-controller@1c81000 {
785 compatible = "arm,gic-400";
790 interrupt-controller;
791 #interrupt-cells = <3>;
796 compatible = "allwinner,sun8i-h3-csi";
802 clock-names = "bus", "mod", "ram";
804 pinctrl-names = "default";
805 pinctrl-0 = <&csi_pins>;
810 compatible = "allwinner,sun8i-h3-dw-hdmi",
811 "allwinner,sun8i-a83t-dw-hdmi";
813 reg-io-width = <1>;
817 clock-names = "iahb", "isfr", "tmds";
819 reset-names = "ctrl";
821 phy-names = "phy";
825 #address-cells = <1>;
826 #size-cells = <0>;
832 remote-endpoint = <&tcon0_out_hdmi>;
842 hdmi_phy: hdmi-phy@1ef0000 {
843 compatible = "allwinner,sun8i-h3-hdmi-phy";
847 clock-names = "bus", "mod", "pll-0";
849 reset-names = "phy";
850 #phy-cells = <0>;
856 interrupt-parent = <&r_intc>;
859 clock-output-names = "osc32k", "osc32k-out", "iosc";
861 #clock-cells = <1>;
864 r_intc: interrupt-controller@1f00c00 {
865 compatible = "allwinner,sun8i-h3-r-intc",
866 "allwinner,sun6i-a31-r-intc";
867 interrupt-controller;
868 #interrupt-cells = <3>;
874 compatible = "allwinner,sun8i-h3-r-ccu";
878 clock-names = "hosc", "losc", "iosc", "pll-periph";
879 #clock-cells = <1>;
880 #reset-cells = <1>;
883 codec_analog: codec-analog@1f015c0 {
884 compatible = "allwinner,sun8i-h3-codec-analog";
889 compatible = "allwinner,sun6i-a31-ir";
891 clock-names = "apb", "ir";
899 compatible = "allwinner,sun6i-a31-i2c";
902 pinctrl-names = "default";
903 pinctrl-0 = <&r_i2c_pins>;
907 #address-cells = <1>;
908 #size-cells = <0>;
912 compatible = "allwinner,sun8i-h3-r-pinctrl";
914 interrupt-parent = <&r_intc>;
917 clock-names = "apb", "hosc", "losc";
918 gpio-controller;
919 #gpio-cells = <3>;
920 interrupt-controller;
921 #interrupt-cells = <3>;
923 r_ir_rx_pin: r-ir-rx-pin {
928 r_i2c_pins: r-i2c-pins {
933 r_pwm_pin: r-pwm-pin {
940 compatible = "allwinner,sun8i-h3-pwm";
942 pinctrl-names = "default";
943 pinctrl-0 = <&r_pwm_pin>;
945 #pwm-cells = <3>;