Lines Matching +full:0 +full:x01c69000

86 			#clock-cells = <0>;
94 #clock-cells = <0>;
117 reg = <0x01000000 0x10000>;
128 compatible = "allwinner,sun8i-h3-de2-mixer-0";
129 reg = <0x01100000 0x100000>;
138 #size-cells = <0>;
152 reg = <0x01c02000 0x1000>;
162 reg = <0x01c0c000 0x1000>;
171 #size-cells = <0>;
173 tcon0_in: port@0 {
174 reg = <0>;
183 #size-cells = <0>;
196 reg = <0x01c0f000 0x1000>;
198 pinctrl-0 = <&mmc0_pins>;
204 #size-cells = <0>;
209 reg = <0x01c10000 0x1000>;
211 pinctrl-0 = <&mmc1_pins>;
217 #size-cells = <0>;
222 reg = <0x01c11000 0x1000>;
228 #size-cells = <0>;
233 reg = <0x1c14000 0x400>;
238 reg = <0x34 4>;
245 reg = <0x01c17000 0x1000>;
254 reg = <0x01c19000 0x400>;
259 phys = <&usbphy 0>;
261 extcon = <&usbphy 0>;
268 reg = <0x01c19400 0x2c>,
269 <0x01c1a800 0x4>,
270 <0x01c1b800 0x4>,
271 <0x01c1c800 0x4>,
272 <0x01c1d800 0x4>;
300 reg = <0x01c1a000 0x100>;
309 reg = <0x01c1a400 0x100>;
319 reg = <0x01c1b000 0x100>;
330 reg = <0x01c1b400 0x100>;
342 reg = <0x01c1c000 0x100>;
353 reg = <0x01c1c400 0x100>;
365 reg = <0x01c1d000 0x100>;
376 reg = <0x01c1d400 0x100>;
388 reg = <0x01c20000 0x400>;
389 clocks = <&osc24M>, <&rtc 0>;
397 reg = <0x01c20800 0x400>;
401 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
517 reg = <0x01c20c00 0xa0>;
526 reg = <0x01c30000 0x10000>;
537 #size-cells = <0>;
544 #size-cells = <0>;
552 #size-cells = <0>;
565 #size-cells = <0>;
572 reg = <0x01c62000 0x1000>;
576 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
582 reg = <0x01c68000 0x1000>;
589 pinctrl-0 = <&spi0_pins>;
593 #size-cells = <0>;
598 reg = <0x01c69000 0x1000>;
605 pinctrl-0 = <&spi1_pins>;
609 #size-cells = <0>;
614 reg = <0x01c20ca0 0x20>;
620 #sound-dai-cells = <0>;
622 reg = <0x01c21000 0x400>;
634 reg = <0x01c21400 0x8>;
641 #sound-dai-cells = <0>;
643 reg = <0x01c22000 0x400>;
654 #sound-dai-cells = <0>;
656 reg = <0x01c22400 0x400>;
667 #sound-dai-cells = <0>;
669 reg = <0x01c22800 0x400>;
680 #sound-dai-cells = <0>;
682 reg = <0x01c22c00 0x400>;
695 reg = <0x01c28000 0x400>;
696 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
708 reg = <0x01c28400 0x400>;
721 reg = <0x01c28800 0x400>;
734 reg = <0x01c28c00 0x400>;
747 reg = <0x01c2ac00 0x400>;
752 pinctrl-0 = <&i2c0_pins>;
755 #size-cells = <0>;
760 reg = <0x01c2b000 0x400>;
765 pinctrl-0 = <&i2c1_pins>;
768 #size-cells = <0>;
773 reg = <0x01c2b400 0x400>;
778 pinctrl-0 = <&i2c2_pins>;
781 #size-cells = <0>;
786 reg = <0x01c81000 0x1000>,
787 <0x01c82000 0x2000>,
788 <0x01c84000 0x2000>,
789 <0x01c86000 0x2000>;
797 reg = <0x01cb0000 0x1000>;
805 pinctrl-0 = <&csi_pins>;
812 reg = <0x01ee0000 0x10000>;
826 #size-cells = <0>;
828 hdmi_in: port@0 {
829 reg = <0>;
844 reg = <0x01ef0000 0x10000>;
847 clock-names = "bus", "mod", "pll-0";
850 #phy-cells = <0>;
855 reg = <0x01f00000 0x400>;
869 reg = <0x01f00c00 0x400>;
875 reg = <0x01f01400 0x100>;
876 clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
885 reg = <0x01f015c0 0x4>;
894 reg = <0x01f02000 0x400>;
900 reg = <0x01f02400 0x400>;
903 pinctrl-0 = <&r_i2c_pins>;
908 #size-cells = <0>;
913 reg = <0x01f02c00 0x400>;
916 clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
941 reg = <0x01f03800 0x8>;
943 pinctrl-0 = <&r_pwm_pin>;