Lines Matching +full:sun8i +full:- +full:h3 +full:- +full:system +full:- +full:controller
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun8i-de2.h>
46 #include <dt-bindings/clock/sun8i-r40-ccu.h>
47 #include <dt-bindings/clock/sun8i-tcon-top.h>
48 #include <dt-bindings/reset/sun8i-r40-ccu.h>
49 #include <dt-bindings/reset/sun8i-de2.h>
50 #include <dt-bindings/thermal/thermal.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
55 interrupt-parent = <&gic>;
58 #address-cells = <1>;
59 #size-cells = <1>;
63 #clock-cells = <0>;
64 compatible = "fixed-clock";
65 clock-frequency = <24000000>;
66 clock-accuracy = <50000>;
67 clock-output-names = "osc24M";
71 #clock-cells = <0>;
72 compatible = "fixed-clock";
73 clock-frequency = <32768>;
74 clock-accuracy = <20000>;
75 clock-output-names = "ext-osc32k";
80 #address-cells = <1>;
81 #size-cells = <0>;
84 compatible = "arm,cortex-a7";
90 compatible = "arm,cortex-a7";
96 compatible = "arm,cortex-a7";
102 compatible = "arm,cortex-a7";
108 de: display-engine {
109 compatible = "allwinner,sun8i-r40-display-engine";
114 thermal-zones {
115 cpu_thermal: cpu0-thermal {
117 polling-delay-passive = <0>;
118 polling-delay = <0>;
119 thermal-sensors = <&ths 0>;
122 gpu_thermal: gpu-thermal {
124 polling-delay-passive = <0>;
125 polling-delay = <0>;
126 thermal-sensors = <&ths 1>;
131 compatible = "simple-bus";
132 #address-cells = <1>;
133 #size-cells = <1>;
137 compatible = "allwinner,sun8i-r40-de2-clk",
138 "allwinner,sun8i-h3-de2-clk";
142 clock-names = "bus",
145 #clock-cells = <1>;
146 #reset-cells = <1>;
150 compatible = "allwinner,sun8i-r40-de2-mixer-0";
154 clock-names = "bus",
159 #address-cells = <1>;
160 #size-cells = <0>;
165 remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
172 compatible = "allwinner,sun8i-r40-de2-mixer-1";
176 clock-names = "bus",
181 #address-cells = <1>;
182 #size-cells = <0>;
187 remote-endpoint = <&tcon_top_mixer1_in_mixer1>;
194 compatible = "allwinner,sun8i-r40-deinterlace",
195 "allwinner,sun8i-h3-deinterlace";
205 clock-names = "bus", "mod", "ram";
209 interconnect-names = "dma-mem";
212 syscon: system-control@1c00000 {
213 compatible = "allwinner,sun8i-r40-system-control",
214 "allwinner,sun4i-a10-system-control";
216 #address-cells = <1>;
217 #size-cells = <1>;
221 compatible = "mmio-sram";
223 #address-cells = <1>;
224 #size-cells = <1>;
227 ve_sram: sram-section@0 {
228 compatible = "allwinner,sun8i-r40-sram-c1",
229 "allwinner,sun4i-a10-sram-c1";
235 nmi_intc: interrupt-controller@1c00030 {
236 compatible = "allwinner,sun7i-a20-sc-nmi";
237 interrupt-controller;
238 #interrupt-cells = <2>;
243 dma: dma-controller@1c02000 {
244 compatible = "allwinner,sun8i-r40-dma",
245 "allwinner,sun50i-a64-dma";
249 dma-channels = <16>;
250 dma-requests = <31>;
252 #dma-cells = <1>;
256 compatible = "allwinner,sun8i-r40-spi",
257 "allwinner,sun8i-h3-spi";
261 clock-names = "ahb", "mod";
264 #address-cells = <1>;
265 #size-cells = <0>;
269 compatible = "allwinner,sun8i-r40-spi",
270 "allwinner,sun8i-h3-spi";
274 clock-names = "ahb", "mod";
277 #address-cells = <1>;
278 #size-cells = <0>;
282 compatible = "allwinner,sun8i-r40-csi0",
283 "allwinner,sun7i-a20-csi0";
288 clock-names = "bus", "isp", "ram";
291 interconnect-names = "dma-mem";
295 video-codec@1c0e000 {
296 compatible = "allwinner,sun8i-r40-video-engine";
300 clock-names = "ahb", "mod", "ram";
307 compatible = "allwinner,sun8i-r40-mmc",
308 "allwinner,sun50i-a64-mmc";
311 clock-names = "ahb", "mmc";
313 reset-names = "ahb";
314 pinctrl-0 = <&mmc0_pins>;
315 pinctrl-names = "default";
318 #address-cells = <1>;
319 #size-cells = <0>;
323 compatible = "allwinner,sun8i-r40-mmc",
324 "allwinner,sun50i-a64-mmc";
327 clock-names = "ahb", "mmc";
329 reset-names = "ahb";
332 #address-cells = <1>;
333 #size-cells = <0>;
337 compatible = "allwinner,sun8i-r40-emmc",
338 "allwinner,sun50i-a64-emmc";
341 clock-names = "ahb", "mmc";
343 reset-names = "ahb";
344 pinctrl-0 = <&mmc2_pins>;
345 pinctrl-names = "default";
348 #address-cells = <1>;
349 #size-cells = <0>;
353 compatible = "allwinner,sun8i-r40-mmc",
354 "allwinner,sun50i-a64-mmc";
357 clock-names = "ahb", "mmc";
359 reset-names = "ahb";
360 pinctrl-0 = <&mmc3_pins>;
361 pinctrl-names = "default";
364 #address-cells = <1>;
365 #size-cells = <0>;
369 compatible = "allwinner,sun8i-r40-usb-phy";
374 reg-names = "phy_ctrl",
381 clock-names = "usb0_phy",
387 reset-names = "usb0_reset",
391 #phy-cells = <1>;
395 compatible = "allwinner,sun8i-r40-crypto";
399 clock-names = "bus", "mod";
404 compatible = "allwinner,sun8i-r40-spi",
405 "allwinner,sun8i-h3-spi";
409 clock-names = "ahb", "mod";
412 #address-cells = <1>;
413 #size-cells = <0>;
417 compatible = "allwinner,sun8i-r40-ahci";
422 reset-names = "ahci";
427 compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
433 phy-names = "usb";
438 compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
445 phy-names = "usb";
450 compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
456 phy-names = "usb";
461 compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
468 phy-names = "usb";
473 compatible = "allwinner,sun8i-r40-spi",
474 "allwinner,sun8i-h3-spi";
478 clock-names = "ahb", "mod";
481 #address-cells = <1>;
482 #size-cells = <0>;
486 compatible = "allwinner,sun8i-r40-ccu";
489 clock-names = "hosc", "losc";
490 #clock-cells = <1>;
491 #reset-cells = <1>;
495 compatible = "allwinner,sun8i-r40-rtc";
498 clock-output-names = "osc32k", "osc32k-out";
500 #clock-cells = <1>;
504 compatible = "allwinner,sun8i-r40-pinctrl";
508 clock-names = "apb", "hosc", "losc";
509 gpio-controller;
510 interrupt-controller;
511 #interrupt-cells = <3>;
512 #gpio-cells = <3>;
514 clk_out_a_pin: clk-out-a-pin {
519 /omit-if-no-ref/
520 csi0_8bits_pins: csi0-8bits-pins {
527 /omit-if-no-ref/
528 csi0_mclk_pin: csi0-mclk-pin {
533 gmac_rgmii_pins: gmac-rgmii-pins {
543 drive-strength = <40>;
546 i2c0_pins: i2c0-pins {
551 i2c1_pins: i2c1-pins {
556 i2c2_pins: i2c2-pins {
561 i2c3_pins: i2c3-pins {
566 i2c4_pins: i2c4-pins {
571 ir0_pins: ir0-pins {
576 ir1_pins: ir1-pins {
581 mmc0_pins: mmc0-pins {
585 drive-strength = <30>;
586 bias-pull-up;
589 mmc1_pg_pins: mmc1-pg-pins {
593 drive-strength = <30>;
594 bias-pull-up;
597 mmc2_pins: mmc2-pins {
602 drive-strength = <30>;
603 bias-pull-up;
606 /omit-if-no-ref/
607 mmc3_pins: mmc3-pins {
611 drive-strength = <30>;
612 bias-pull-up;
615 /omit-if-no-ref/
616 spi0_pc_pins: spi0-pc-pins {
621 /omit-if-no-ref/
622 spi0_cs0_pc_pin: spi0-cs0-pc-pin {
627 /omit-if-no-ref/
628 spi1_pi_pins: spi1-pi-pins {
633 /omit-if-no-ref/
634 spi1_cs0_pi_pin: spi1-cs0-pi-pin {
639 /omit-if-no-ref/
640 spi1_cs1_pi_pin: spi1-cs1-pi-pin {
645 /omit-if-no-ref/
646 uart0_pb_pins: uart0-pb-pins {
651 /omit-if-no-ref/
652 uart2_pi_pins: uart2-pi-pins {
657 /omit-if-no-ref/
658 uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
663 /omit-if-no-ref/
664 uart3_pg_pins: uart3-pg-pins {
669 /omit-if-no-ref/
670 uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
675 /omit-if-no-ref/
676 uart4_pg_pins: uart4-pg-pins {
681 /omit-if-no-ref/
682 uart5_ph_pins: uart5-ph-pins {
687 /omit-if-no-ref/
688 uart7_pi_pins: uart7-pi-pins {
695 compatible = "allwinner,sun4i-a10-timer";
707 compatible = "allwinner,sun4i-a10-wdt";
714 compatible = "allwinner,sun8i-r40-ir",
715 "allwinner,sun6i-a31-ir";
717 pinctrl-0 = <&ir0_pins>;
718 pinctrl-names = "default";
720 clock-names = "apb", "ir";
727 compatible = "allwinner,sun8i-r40-ir",
728 "allwinner,sun6i-a31-ir";
730 pinctrl-0 = <&ir1_pins>;
731 pinctrl-names = "default";
733 clock-names = "apb", "ir";
739 ths: thermal-sensor@1c24c00 {
740 compatible = "allwinner,sun8i-r40-ths";
743 clock-names = "bus", "mod";
746 /* TODO: add nvmem-cells for calibration */
747 #thermal-sensor-cells = <1>;
751 compatible = "snps,dw-apb-uart";
754 reg-shift = <2>;
755 reg-io-width = <4>;
762 compatible = "snps,dw-apb-uart";
765 reg-shift = <2>;
766 reg-io-width = <4>;
773 compatible = "snps,dw-apb-uart";
776 reg-shift = <2>;
777 reg-io-width = <4>;
784 compatible = "snps,dw-apb-uart";
787 reg-shift = <2>;
788 reg-io-width = <4>;
795 compatible = "snps,dw-apb-uart";
798 reg-shift = <2>;
799 reg-io-width = <4>;
806 compatible = "snps,dw-apb-uart";
809 reg-shift = <2>;
810 reg-io-width = <4>;
817 compatible = "snps,dw-apb-uart";
820 reg-shift = <2>;
821 reg-io-width = <4>;
828 compatible = "snps,dw-apb-uart";
831 reg-shift = <2>;
832 reg-io-width = <4>;
839 compatible = "allwinner,sun6i-a31-i2c";
844 pinctrl-0 = <&i2c0_pins>;
845 pinctrl-names = "default";
847 #address-cells = <1>;
848 #size-cells = <0>;
852 compatible = "allwinner,sun6i-a31-i2c";
857 pinctrl-0 = <&i2c1_pins>;
858 pinctrl-names = "default";
860 #address-cells = <1>;
861 #size-cells = <0>;
865 compatible = "allwinner,sun6i-a31-i2c";
870 pinctrl-0 = <&i2c2_pins>;
871 pinctrl-names = "default";
873 #address-cells = <1>;
874 #size-cells = <0>;
878 compatible = "allwinner,sun6i-a31-i2c";
883 pinctrl-0 = <&i2c3_pins>;
884 pinctrl-names = "default";
886 #address-cells = <1>;
887 #size-cells = <0>;
891 compatible = "allwinner,sun6i-a31-i2c";
896 pinctrl-0 = <&i2c4_pins>;
897 pinctrl-names = "default";
899 #address-cells = <1>;
900 #size-cells = <0>;
904 compatible = "allwinner,sun8i-r40-mali", "arm,mali-400";
913 interrupt-names = "gp",
921 clock-names = "bus", "core";
926 compatible = "allwinner,sun8i-r40-gmac";
930 interrupt-names = "macirq";
932 reset-names = "stmmaceth";
934 clock-names = "stmmaceth";
938 compatible = "snps,dwmac-mdio";
939 #address-cells = <1>;
940 #size-cells = <0>;
944 mbus: dram-controller@1c62000 {
945 compatible = "allwinner,sun8i-r40-mbus";
948 #address-cells = <1>;
949 #size-cells = <1>;
950 dma-ranges = <0x00000000 0x40000000 0x80000000>;
951 #interconnect-cells = <1>;
954 tcon_top: tcon-top@1c70000 {
955 compatible = "allwinner,sun8i-r40-tcon-top";
963 clock-names = "bus",
964 "tcon-tv0",
966 "tcon-tv1",
969 clock-output-names = "tcon-top-tv0",
970 "tcon-top-tv1",
971 "tcon-top-dsi";
973 #clock-cells = <1>;
976 #address-cells = <1>;
977 #size-cells = <0>;
983 remote-endpoint = <&mixer0_out_tcon_top>;
988 #address-cells = <1>;
989 #size-cells = <0>;
1002 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
1007 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>;
1012 #address-cells = <1>;
1013 #size-cells = <0>;
1018 remote-endpoint = <&mixer1_out_tcon_top>;
1023 #address-cells = <1>;
1024 #size-cells = <0>;
1037 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
1042 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>;
1047 #address-cells = <1>;
1048 #size-cells = <0>;
1053 remote-endpoint = <&tcon_tv0_out_tcon_top>;
1058 remote-endpoint = <&tcon_tv1_out_tcon_top>;
1066 remote-endpoint = <&hdmi_in_tcon_top>;
1072 tcon_tv0: lcd-controller@1c73000 {
1073 compatible = "allwinner,sun8i-r40-tcon-tv";
1077 clock-names = "ahb", "tcon-ch1";
1079 reset-names = "lcd";
1083 #address-cells = <1>;
1084 #size-cells = <0>;
1087 #address-cells = <1>;
1088 #size-cells = <0>;
1093 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
1098 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
1103 #address-cells = <1>;
1104 #size-cells = <0>;
1109 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
1115 tcon_tv1: lcd-controller@1c74000 {
1116 compatible = "allwinner,sun8i-r40-tcon-tv";
1120 clock-names = "ahb", "tcon-ch1";
1122 reset-names = "lcd";
1126 #address-cells = <1>;
1127 #size-cells = <0>;
1130 #address-cells = <1>;
1131 #size-cells = <0>;
1136 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv1>;
1141 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv1>;
1146 #address-cells = <1>;
1147 #size-cells = <0>;
1152 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv1>;
1158 gic: interrupt-controller@1c81000 {
1159 compatible = "arm,gic-400";
1164 interrupt-controller;
1165 #interrupt-cells = <3>;
1170 compatible = "allwinner,sun8i-r40-dw-hdmi",
1171 "allwinner,sun8i-a83t-dw-hdmi";
1173 reg-io-width = <1>;
1177 clock-names = "iahb", "isfr", "tmds";
1179 reset-names = "ctrl";
1181 phy-names = "phy";
1185 #address-cells = <1>;
1186 #size-cells = <0>;
1192 remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
1202 hdmi_phy: hdmi-phy@1ef0000 {
1203 compatible = "allwinner,sun8i-r40-hdmi-phy";
1207 clock-names = "bus", "mod", "pll-0", "pll-1";
1209 reset-names = "phy";
1210 #phy-cells = <0>;
1215 compatible = "arm,cortex-a7-pmu";
1220 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
1224 compatible = "arm,armv7-timer";