Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:ehci

4  * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
62 #size-cells = <1>;
65 simplefb_hdmi: framebuffer-lcd0-hdmi {
66 compatible = "allwinner,simple-framebuffer",
67 "simple-framebuffer";
68 allwinner,pipeline = "de_be0-lcd0-hdmi";
76 simplefb_lcd: framebuffer-lcd0 {
77 compatible = "allwinner,simple-framebuffer",
78 "simple-framebuffer";
79 allwinner,pipeline = "de_be0-lcd0";
88 compatible = "arm,armv7-timer";
93 clock-frequency = <24000000>;
94 arm,cpu-registers-not-fw-configured;
98 enable-method = "allwinner,sun6i-a31";
99 #address-cells = <1>;
100 #size-cells = <0>;
103 compatible = "arm,cortex-a7";
107 clock-latency = <244144>; /* 8 32k periods */
108 operating-points = <
115 #cooling-cells = <2>;
119 compatible = "arm,cortex-a7";
123 clock-latency = <244144>; /* 8 32k periods */
124 operating-points = <
131 #cooling-cells = <2>;
135 compatible = "arm,cortex-a7";
139 clock-latency = <244144>; /* 8 32k periods */
140 operating-points = <
147 #cooling-cells = <2>;
151 compatible = "arm,cortex-a7";
155 clock-latency = <244144>; /* 8 32k periods */
156 operating-points = <
163 #cooling-cells = <2>;
167 thermal-zones {
168 cpu-thermal {
170 polling-delay-passive = <250>;
171 polling-delay = <1000>;
172 thermal-sensors = <&rtp>;
174 cooling-maps {
177 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
203 compatible = "arm,cortex-a7-pmu";
211 #address-cells = <1>;
212 #size-cells = <1>;
215 osc24M: clk-24M {
216 #clock-cells = <0>;
217 compatible = "fixed-clock";
218 clock-frequency = <24000000>;
219 clock-accuracy = <50000>;
220 clock-output-names = "osc24M";
223 osc32k: clk-32k {
224 #clock-cells = <0>;
225 compatible = "fixed-clock";
226 clock-frequency = <32768>;
227 clock-accuracy = <50000>;
228 clock-output-names = "ext_osc32k";
235 * mode, using clk_set_rate auto-reparenting.
240 mii_phy_tx_clk: clk-mii-phy-tx {
241 #clock-cells = <0>;
242 compatible = "fixed-clock";
243 clock-frequency = <25000000>;
244 clock-output-names = "mii_phy_tx";
247 gmac_int_tx_clk: clk-gmac-int-tx {
248 #clock-cells = <0>;
249 compatible = "fixed-clock";
250 clock-frequency = <125000000>;
251 clock-output-names = "gmac_int_tx";
255 #clock-cells = <0>;
256 compatible = "allwinner,sun7i-a20-gmac-clk";
259 clock-output-names = "gmac_tx";
263 de: display-engine {
264 compatible = "allwinner,sun6i-a31-display-engine";
270 compatible = "simple-bus";
271 #address-cells = <1>;
272 #size-cells = <1>;
275 dma: dma-controller@1c02000 {
276 compatible = "allwinner,sun6i-a31-dma";
281 #dma-cells = <1>;
284 tcon0: lcd-controller@1c0c000 {
285 compatible = "allwinner,sun6i-a31-tcon";
291 reset-names = "lcd",
297 clock-names = "ahb",
298 "tcon-ch0",
299 "tcon-ch1",
300 "lvds-alt";
301 clock-output-names = "tcon0-pixel-clock";
302 #clock-cells = <0>;
305 #address-cells = <1>;
306 #size-cells = <0>;
309 #address-cells = <1>;
310 #size-cells = <0>;
315 remote-endpoint = <&drc0_out_tcon0>;
320 remote-endpoint = <&drc1_out_tcon0>;
325 #address-cells = <1>;
326 #size-cells = <0>;
331 remote-endpoint = <&hdmi_in_tcon0>;
332 allwinner,tcon-channel = <1>;
338 tcon1: lcd-controller@1c0d000 {
339 compatible = "allwinner,sun6i-a31-tcon";
345 reset-names = "lcd", "lvds";
350 clock-names = "ahb",
351 "tcon-ch0",
352 "tcon-ch1",
353 "lvds-alt";
354 clock-output-names = "tcon1-pixel-clock";
355 #clock-cells = <0>;
358 #address-cells = <1>;
359 #size-cells = <0>;
362 #address-cells = <1>;
363 #size-cells = <0>;
368 remote-endpoint = <&drc0_out_tcon1>;
373 remote-endpoint = <&drc1_out_tcon1>;
378 #address-cells = <1>;
379 #size-cells = <0>;
384 remote-endpoint = <&hdmi_in_tcon1>;
385 allwinner,tcon-channel = <1>;
392 compatible = "allwinner,sun7i-a20-mmc";
398 clock-names = "ahb",
403 reset-names = "ahb";
405 pinctrl-names = "default";
406 pinctrl-0 = <&mmc0_pins>;
408 #address-cells = <1>;
409 #size-cells = <0>;
413 compatible = "allwinner,sun7i-a20-mmc";
419 clock-names = "ahb",
424 reset-names = "ahb";
426 pinctrl-names = "default";
427 pinctrl-0 = <&mmc1_pins>;
429 #address-cells = <1>;
430 #size-cells = <0>;
434 compatible = "allwinner,sun7i-a20-mmc";
440 clock-names = "ahb",
445 reset-names = "ahb";
448 #address-cells = <1>;
449 #size-cells = <0>;
453 compatible = "allwinner,sun7i-a20-mmc";
459 clock-names = "ahb",
464 reset-names = "ahb";
467 #address-cells = <1>;
468 #size-cells = <0>;
472 compatible = "allwinner,sun6i-a31-hdmi";
479 clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1";
481 dma-names = "ddc-tx", "ddc-rx", "audio-tx";
486 #address-cells = <1>;
487 #size-cells = <0>;
490 #address-cells = <1>;
491 #size-cells = <0>;
496 remote-endpoint = <&tcon0_out_hdmi>;
501 remote-endpoint = <&tcon1_out_hdmi>;
512 compatible = "allwinner,sun6i-a31-musb";
517 interrupt-names = "mc";
519 phy-names = "usb";
526 compatible = "allwinner,sun6i-a31-usb-phy";
530 reg-names = "phy_ctrl",
536 clock-names = "usb0_phy",
542 reset-names = "usb0_reset",
546 #phy-cells = <1>;
550 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
556 phy-names = "usb";
561 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
567 phy-names = "usb";
572 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
578 phy-names = "usb";
583 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
589 phy-names = "usb";
594 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
603 compatible = "allwinner,sun6i-a31-ccu";
606 clock-names = "hosc", "losc";
607 #clock-cells = <1>;
608 #reset-cells = <1>;
612 compatible = "allwinner,sun6i-a31-pinctrl";
614 interrupt-parent = <&r_intc>;
620 clock-names = "apb", "hosc", "losc";
621 gpio-controller;
622 interrupt-controller;
623 #interrupt-cells = <3>;
624 #gpio-cells = <3>;
626 gmac_gmii_pins: gmac-gmii-pins {
639 drive-strength = <30>;
642 gmac_mii_pins: gmac-mii-pins {
651 gmac_rgmii_pins: gmac-rgmii-pins {
661 drive-strength = <40>;
664 i2c0_pins: i2c0-pins {
669 i2c1_pins: i2c1-pins {
674 i2c2_pins: i2c2-pins {
679 lcd0_rgb888_pins: lcd0-rgb888-pins {
690 mmc0_pins: mmc0-pins {
694 drive-strength = <30>;
695 bias-pull-up;
698 mmc1_pins: mmc1-pins {
702 drive-strength = <30>;
703 bias-pull-up;
706 mmc2_4bit_pins: mmc2-4bit-pins {
710 drive-strength = <30>;
711 bias-pull-up;
714 mmc2_8bit_emmc_pins: mmc2-8bit-emmc-pins {
720 drive-strength = <30>;
721 bias-pull-up;
724 mmc3_8bit_emmc_pins: mmc3-8bit-emmc-pins {
730 drive-strength = <40>;
731 bias-pull-up;
734 spdif_tx_pin: spdif-tx-pin {
739 uart0_ph_pins: uart0-ph-pins {
746 compatible = "allwinner,sun4i-a10-timer";
758 compatible = "allwinner,sun6i-a31-wdt";
765 #sound-dai-cells = <0>;
766 compatible = "allwinner,sun6i-a31-spdif";
771 clock-names = "apb", "spdif";
773 dma-names = "rx", "tx";
778 #sound-dai-cells = <0>;
779 compatible = "allwinner,sun6i-a31-i2s";
784 clock-names = "apb", "mod";
786 dma-names = "rx", "tx";
791 #sound-dai-cells = <0>;
792 compatible = "allwinner,sun6i-a31-i2s";
797 clock-names = "apb", "mod";
799 dma-names = "rx", "tx";
804 compatible = "allwinner,sun4i-a10-lradc-keys";
806 interrupt-parent = <&r_intc>;
812 compatible = "allwinner,sun6i-a31-ts";
815 #thermal-sensor-cells = <0>;
819 compatible = "snps,dw-apb-uart";
822 reg-shift = <2>;
823 reg-io-width = <4>;
827 dma-names = "rx", "tx";
832 compatible = "snps,dw-apb-uart";
835 reg-shift = <2>;
836 reg-io-width = <4>;
840 dma-names = "rx", "tx";
845 compatible = "snps,dw-apb-uart";
848 reg-shift = <2>;
849 reg-io-width = <4>;
853 dma-names = "rx", "tx";
858 compatible = "snps,dw-apb-uart";
861 reg-shift = <2>;
862 reg-io-width = <4>;
866 dma-names = "rx", "tx";
871 compatible = "snps,dw-apb-uart";
874 reg-shift = <2>;
875 reg-io-width = <4>;
879 dma-names = "rx", "tx";
884 compatible = "snps,dw-apb-uart";
887 reg-shift = <2>;
888 reg-io-width = <4>;
892 dma-names = "rx", "tx";
897 compatible = "allwinner,sun6i-a31-i2c";
902 pinctrl-names = "default";
903 pinctrl-0 = <&i2c0_pins>;
905 #address-cells = <1>;
906 #size-cells = <0>;
910 compatible = "allwinner,sun6i-a31-i2c";
915 pinctrl-names = "default";
916 pinctrl-0 = <&i2c1_pins>;
918 #address-cells = <1>;
919 #size-cells = <0>;
923 compatible = "allwinner,sun6i-a31-i2c";
928 pinctrl-names = "default";
929 pinctrl-0 = <&i2c2_pins>;
931 #address-cells = <1>;
932 #size-cells = <0>;
936 compatible = "allwinner,sun6i-a31-i2c";
942 #address-cells = <1>;
943 #size-cells = <0>;
947 compatible = "allwinner,sun7i-a20-gmac";
950 interrupt-names = "macirq";
952 clock-names = "stmmaceth", "allwinner_gmac_tx";
954 reset-names = "stmmaceth";
956 snps,fixed-burst;
961 compatible = "snps,dwmac-mdio";
962 #address-cells = <1>;
963 #size-cells = <0>;
967 crypto: crypto-engine@1c15000 {
968 compatible = "allwinner,sun6i-a31-crypto",
969 "allwinner,sun4i-a10-crypto";
973 clock-names = "ahb", "mod";
975 reset-names = "ahb";
979 #sound-dai-cells = <0>;
980 compatible = "allwinner,sun6i-a31-codec";
984 clock-names = "apb", "codec";
987 dma-names = "rx", "tx";
992 compatible = "allwinner,sun6i-a31-hstimer",
993 "allwinner,sun7i-a20-hstimer";
1004 compatible = "allwinner,sun6i-a31-spi";
1008 clock-names = "ahb", "mod";
1010 dma-names = "rx", "tx";
1013 #address-cells = <1>;
1014 #size-cells = <0>;
1018 compatible = "allwinner,sun6i-a31-spi";
1022 clock-names = "ahb", "mod";
1024 dma-names = "rx", "tx";
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1032 compatible = "allwinner,sun6i-a31-spi";
1036 clock-names = "ahb", "mod";
1038 dma-names = "rx", "tx";
1041 #address-cells = <1>;
1042 #size-cells = <0>;
1046 compatible = "allwinner,sun6i-a31-spi";
1050 clock-names = "ahb", "mod";
1052 dma-names = "rx", "tx";
1055 #address-cells = <1>;
1056 #size-cells = <0>;
1059 gic: interrupt-controller@1c81000 {
1060 compatible = "arm,gic-400";
1065 interrupt-controller;
1066 #interrupt-cells = <3>;
1070 fe0: display-frontend@1e00000 {
1071 compatible = "allwinner,sun6i-a31-display-frontend";
1076 clock-names = "ahb", "mod",
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1085 #address-cells = <1>;
1086 #size-cells = <0>;
1091 remote-endpoint = <&be0_in_fe0>;
1096 remote-endpoint = <&be1_in_fe0>;
1102 fe1: display-frontend@1e20000 {
1103 compatible = "allwinner,sun6i-a31-display-frontend";
1108 clock-names = "ahb", "mod",
1113 #address-cells = <1>;
1114 #size-cells = <0>;
1117 #address-cells = <1>;
1118 #size-cells = <0>;
1123 remote-endpoint = <&be0_in_fe1>;
1128 remote-endpoint = <&be1_in_fe1>;
1134 be1: display-backend@1e40000 {
1135 compatible = "allwinner,sun6i-a31-display-backend";
1140 clock-names = "ahb", "mod",
1145 #address-cells = <1>;
1146 #size-cells = <0>;
1149 #address-cells = <1>;
1150 #size-cells = <0>;
1155 remote-endpoint = <&fe0_out_be1>;
1160 remote-endpoint = <&fe1_out_be1>;
1165 #address-cells = <1>;
1166 #size-cells = <0>;
1171 remote-endpoint = <&drc1_in_be1>;
1178 compatible = "allwinner,sun6i-a31-drc";
1183 clock-names = "ahb", "mod",
1188 #address-cells = <1>;
1189 #size-cells = <0>;
1192 #address-cells = <1>;
1193 #size-cells = <0>;
1198 remote-endpoint = <&be1_out_drc1>;
1203 #address-cells = <1>;
1204 #size-cells = <0>;
1209 remote-endpoint = <&tcon0_in_drc1>;
1214 remote-endpoint = <&tcon1_in_drc1>;
1220 be0: display-backend@1e60000 {
1221 compatible = "allwinner,sun6i-a31-display-backend";
1226 clock-names = "ahb", "mod",
1231 #address-cells = <1>;
1232 #size-cells = <0>;
1235 #address-cells = <1>;
1236 #size-cells = <0>;
1241 remote-endpoint = <&fe0_out_be0>;
1246 remote-endpoint = <&fe1_out_be0>;
1254 remote-endpoint = <&drc0_in_be0>;
1261 compatible = "allwinner,sun6i-a31-drc";
1266 clock-names = "ahb", "mod",
1271 #address-cells = <1>;
1272 #size-cells = <0>;
1278 remote-endpoint = <&be0_out_drc0>;
1283 #address-cells = <1>;
1284 #size-cells = <0>;
1289 remote-endpoint = <&tcon0_in_drc0>;
1294 remote-endpoint = <&tcon1_in_drc0>;
1301 #clock-cells = <1>;
1302 compatible = "allwinner,sun6i-a31-rtc";
1304 interrupt-parent = <&r_intc>;
1308 clock-output-names = "osc32k";
1311 r_intc: interrupt-controller@1f00c00 {
1312 compatible = "allwinner,sun6i-a31-r-intc";
1313 interrupt-controller;
1314 #interrupt-cells = <3>;
1320 compatible = "allwinner,sun6i-a31-prcm";
1324 compatible = "allwinner,sun6i-a31-ar100-clk";
1325 #clock-cells = <0>;
1329 clock-output-names = "ar100";
1333 compatible = "fixed-factor-clock";
1334 #clock-cells = <0>;
1335 clock-div = <1>;
1336 clock-mult = <1>;
1338 clock-output-names = "ahb0";
1342 compatible = "allwinner,sun6i-a31-apb0-clk";
1343 #clock-cells = <0>;
1345 clock-output-names = "apb0";
1349 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
1350 #clock-cells = <1>;
1352 clock-output-names = "apb0_pio", "apb0_ir",
1359 #clock-cells = <0>;
1360 compatible = "allwinner,sun4i-a10-mod0-clk";
1362 clock-output-names = "ir";
1366 compatible = "allwinner,sun6i-a31-clock-reset";
1367 #reset-cells = <1>;
1372 compatible = "allwinner,sun6i-a31-cpuconfig";
1377 compatible = "allwinner,sun6i-a31-ir";
1379 clock-names = "apb", "ir";
1387 compatible = "allwinner,sun6i-a31-r-pinctrl";
1389 interrupt-parent = <&r_intc>;
1393 clock-names = "apb", "hosc", "losc";
1395 gpio-controller;
1396 interrupt-controller;
1397 #interrupt-cells = <3>;
1398 #gpio-cells = <3>;
1400 s_ir_rx_pin: s-ir-rx-pin {
1405 s_p2wi_pins: s-p2wi-pins {
1412 compatible = "allwinner,sun6i-a31-p2wi";
1416 clock-frequency = <100000>;
1418 pinctrl-names = "default";
1419 pinctrl-0 = <&s_p2wi_pins>;
1421 #address-cells = <1>;
1422 #size-cells = <0>;