Lines Matching full:rcc
130 clocks = <&rcc TIM2_K>;
163 clocks = <&rcc TIM3_K>;
197 clocks = <&rcc TIM4_K>;
229 clocks = <&rcc TIM5_K>;
263 clocks = <&rcc TIM6_K>;
281 clocks = <&rcc TIM7_K>;
299 clocks = <&rcc TIM12_K>;
321 clocks = <&rcc TIM13_K>;
343 clocks = <&rcc TIM14_K>;
366 clocks = <&rcc LPTIM1_K>;
395 clocks = <&rcc SPI2_K>;
396 resets = <&rcc SPI2_R>;
420 clocks = <&rcc SPI3_K>;
421 resets = <&rcc SPI3_R>;
443 clocks = <&rcc SPDIF_K>;
456 clocks = <&rcc USART2_K>;
465 clocks = <&rcc USART3_K>;
474 clocks = <&rcc UART4_K>;
483 clocks = <&rcc UART5_K>;
494 clocks = <&rcc I2C1_K>;
495 resets = <&rcc I2C1_R>;
510 clocks = <&rcc I2C2_K>;
511 resets = <&rcc I2C2_R>;
526 clocks = <&rcc I2C3_K>;
527 resets = <&rcc I2C3_R>;
542 clocks = <&rcc I2C5_K>;
543 resets = <&rcc I2C5_R>;
556 clocks = <&rcc CEC_K>, <&clk_lse>;
564 clocks = <&rcc DAC12>;
589 clocks = <&rcc UART7_K>;
598 clocks = <&rcc UART8_K>;
608 clocks = <&rcc TIM1_K>;
644 clocks = <&rcc TIM8_K>;
679 clocks = <&rcc USART6_K>;
690 clocks = <&rcc SPI1_K>;
691 resets = <&rcc SPI1_R>;
715 clocks = <&rcc SPI4_K>;
716 resets = <&rcc SPI4_R>;
728 clocks = <&rcc TIM15_K>;
755 clocks = <&rcc TIM16_K>;
779 clocks = <&rcc TIM17_K>;
805 clocks = <&rcc SPI5_K>;
806 resets = <&rcc SPI5_R>;
820 resets = <&rcc SAI1_R>;
828 clocks = <&rcc SAI1_K>;
838 clocks = <&rcc SAI1_K>;
852 resets = <&rcc SAI2_R>;
859 clocks = <&rcc SAI2_K>;
869 clocks = <&rcc SAI2_K>;
883 resets = <&rcc SAI3_R>;
890 clocks = <&rcc SAI3_K>;
900 clocks = <&rcc SAI3_K>;
910 clocks = <&rcc DFSDM_K>;
988 clocks = <&rcc DMA1>;
989 resets = <&rcc DMA1_R>;
1006 clocks = <&rcc DMA2>;
1007 resets = <&rcc DMA2_R>;
1020 clocks = <&rcc DMAMUX>;
1021 resets = <&rcc DMAMUX_R>;
1029 clocks = <&rcc ADC12>, <&rcc ADC12_K>;
1067 clocks = <&rcc SDMMC3_K>;
1069 resets = <&rcc SDMMC3_R>;
1079 clocks = <&rcc USBO_K>;
1081 resets = <&rcc USBO_R>;
1102 clocks = <&rcc IPCC>;
1111 resets = <&rcc CAMITF_R>;
1112 clocks = <&rcc DCMI>;
1119 rcc: rcc@50000000 { label
1120 compatible = "st,stm32mp1-rcc", "syscon";
1164 clocks = <&rcc SYSCFG>;
1173 clocks = <&rcc LPTIM2_K>;
1202 clocks = <&rcc LPTIM3_K>;
1224 clocks = <&rcc LPTIM4_K>;
1240 clocks = <&rcc LPTIM5_K>;
1257 clocks = <&rcc VREF>;
1268 resets = <&rcc SAI4_R>;
1275 clocks = <&rcc SAI4_K>;
1285 clocks = <&rcc SAI4_K>;
1296 clocks = <&rcc TMPSENS>;
1306 clocks = <&rcc HASH1>;
1307 resets = <&rcc HASH1_R>;
1317 clocks = <&rcc RNG1_K>;
1318 resets = <&rcc RNG1_R>;
1326 clocks = <&rcc MDMA>;
1327 resets = <&rcc MDMA_R>;
1338 clocks = <&rcc FMC_K>;
1339 resets = <&rcc FMC_R>;
1375 clocks = <&rcc QSPI_K>;
1376 resets = <&rcc QSPI_R>;
1388 clocks = <&rcc SDMMC1_K>;
1390 resets = <&rcc SDMMC1_R>;
1403 clocks = <&rcc SDMMC2_K>;
1405 resets = <&rcc SDMMC2_R>;
1415 clocks = <&rcc CRC1>;
1431 clocks = <&rcc ETHMAC>,
1432 <&rcc ETHTX>,
1433 <&rcc ETHRX>,
1434 <&rcc ETHCK_K>,
1435 <&rcc ETHPTP_K>,
1436 <&rcc ETHSTP>;
1455 clocks = <&rcc USBH>;
1456 resets = <&rcc USBH_R>;
1464 clocks = <&rcc USBH>;
1465 resets = <&rcc USBH_R>;
1476 clocks = <&rcc LTDC_PX>;
1478 resets = <&rcc LTDC_R>;
1490 clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
1501 clocks = <&rcc USBPHY_K>;
1502 resets = <&rcc USBPHY_R>;
1522 clocks = <&rcc USART1_K>;
1533 clocks = <&rcc SPI6_K>;
1534 resets = <&rcc SPI6_R>;
1547 clocks = <&rcc I2C4_K>;
1548 resets = <&rcc I2C4_R>;
1560 clocks = <&rcc RTCAPB>, <&rcc RTC>;
1585 clocks = <&rcc I2C6_K>;
1586 resets = <&rcc I2C6_R>;
1619 clocks = <&rcc GPIOA>;
1630 clocks = <&rcc GPIOB>;
1641 clocks = <&rcc GPIOC>;
1652 clocks = <&rcc GPIOD>;
1663 clocks = <&rcc GPIOE>;
1674 clocks = <&rcc GPIOF>;
1685 clocks = <&rcc GPIOG>;
1696 clocks = <&rcc GPIOH>;
1707 clocks = <&rcc GPIOI>;
1718 clocks = <&rcc GPIOJ>;
1729 clocks = <&rcc GPIOK>;
1750 clocks = <&rcc GPIOZ>;
1772 resets = <&rcc MCU_R>;
1773 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1774 st,syscfg-tz = <&rcc 0x000 0x1>;