Lines Matching full:rcc
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
82 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
91 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
112 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
121 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
142 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
151 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
172 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
180 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
201 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
210 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
225 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
234 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
250 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM12)>;
270 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
284 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
298 clocks = <&rcc 1 CLK_RTC>;
299 assigned-clocks = <&rcc 1 CLK_RTC>;
300 assigned-clock-parents = <&rcc 1 CLK_LSE>;
311 clocks = <&rcc 1 CLK_USART2>;
319 clocks = <&rcc 1 CLK_USART3>;
327 clocks = <&rcc 1 CLK_UART4>;
335 clocks = <&rcc 1 CLK_UART5>;
344 resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
345 clocks = <&rcc 1 CLK_I2C1>;
356 resets = <&rcc STM32F7_APB1_RESET(I2C2)>;
357 clocks = <&rcc 1 CLK_I2C2>;
368 resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
369 clocks = <&rcc 1 CLK_I2C3>;
380 resets = <&rcc STM32F7_APB1_RESET(I2C4)>;
381 clocks = <&rcc 1 CLK_I2C4>;
391 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
400 clocks = <&rcc 1 CLK_UART7>;
408 clocks = <&rcc 1 CLK_UART8>;
417 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM1)>;
439 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM8)>;
460 clocks = <&rcc 1 CLK_USART1>;
468 clocks = <&rcc 1 CLK_USART6>;
476 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
487 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC1)>;
512 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM9)>;
532 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
546 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
565 clocks = <&rcc 0 12>;
569 rcc: rcc@40023800 { label
572 compatible = "st,stm32f746-rcc", "st,stm32-rcc";
576 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
591 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA1)>;
607 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA2)>;
617 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
629 clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
637 clocks = <&rcc 1 0>;