Lines Matching full:rst
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
80 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
445 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
465 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
485 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
496 resets = <&rst GPIO0_RESET>;
516 resets = <&rst GPIO1_RESET>;
536 resets = <&rst GPIO2_RESET>;
556 resets = <&rst FPGAMGR_RESET>;
567 resets = <&rst I2C0_RESET>;
578 resets = <&rst I2C1_RESET>;
589 resets = <&rst I2C2_RESET>;
600 resets = <&rst I2C3_RESET>;
611 resets = <&rst I2C4_RESET>;
624 resets = <&rst SPIM0_RESET>;
640 resets = <&rst SPIM1_RESET>;
670 resets = <&rst SDMMC_RESET>;
684 resets = <&rst NAND_RESET>;
769 resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;
774 rst: rstmgr@ffd05000 { label
776 compatible = "altr,rst-mgr";
806 resets = <&rst SPTIMER0_RESET>;
816 resets = <&rst SPTIMER1_RESET>;
826 resets = <&rst L4SYSTIMER0_RESET>;
836 resets = <&rst L4SYSTIMER1_RESET>;
847 resets = <&rst UART0_RESET>;
858 resets = <&rst UART1_RESET>;
874 resets = <&rst USB0_RESET>;
887 resets = <&rst USB1_RESET>;
899 resets = <&rst L4WD0_RESET>;
908 resets = <&rst L4WD1_RESET>;