Lines Matching +full:dma +full:- +full:ranges
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/dma/at91.h>
16 #include <dt-bindings/gpio/gpio.h>
21 #address-cells = <1>;
22 #size-cells = <1>;
23 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-a7";
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <48000000>;
54 vddout25: fixed-regulator-vddout25 {
55 compatible = "regulator-fixed";
57 regulator-name = "VDDOUT25";
58 regulator-min-microvolt = <2500000>;
59 regulator-max-microvolt = <2500000>;
60 regulator-boot-on;
65 compatible = "mmio-sram";
66 #address-cells = <1>;
67 #size-cells = <1>;
69 ranges;
73 compatible = "simple-bus";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 ranges;
79 compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
82 #address-cells = <1>;
83 #size-cells = <1>;
84 ranges = <0 0xe0000000 0x4000>;
85 no-memory-wc;
90 compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
92 gpio-controller;
93 #gpio-cells = <2>;
97 compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
102 compatible = "microchip,sama7g5-pinctrl";
109 interrupt-controller;
110 #interrupt-cells = <2>;
111 gpio-controller;
112 #gpio-cells = <2>;
117 compatible = "microchip,sama7g5-pmc", "syscon";
120 #clock-cells = <2>;
122 clock-names = "td_slck", "md_slck", "main_xtal";
126 compatible = "microchip,sama7g5-shdwc", "syscon";
129 #address-cells = <1>;
130 #size-cells = <0>;
131 atmel,wakeup-rtc-timer;
132 atmel,wakeup-rtt-timer;
137 compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
143 clk32k: clock-controller@e001d050 {
144 compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
147 #clock-cells = <1>;
151 compatible = "microchip,sama7g5-gpbr", "syscon";
156 compatible = "microchip,sama7g5-wdt";
163 compatible = "microchip,sama7g5-chipid";
168 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
172 clock-names = "hclock", "multclk";
173 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
174 assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
175 assigned-clock-rates = <200000000>;
176 microchip,sdcal-inverted;
181 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
185 clock-names = "hclock", "multclk";
186 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
187 assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
188 assigned-clock-rates = <200000000>;
189 microchip,sdcal-inverted;
194 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
198 clock-names = "hclock", "multclk";
199 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
200 assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
201 assigned-clock-rates = <200000000>;
202 microchip,sdcal-inverted;
207 compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
210 #pwm-cells = <3>;
216 #sound-dai-cells = <0>;
217 compatible = "microchip,sama7g5-spdifrx";
221 dma-names = "rx";
223 clock-names = "pclk", "gclk";
228 #sound-dai-cells = <0>;
229 compatible = "microchip,sama7g5-spdiftx";
233 dma-names = "tx";
235 clock-names = "pclk", "gclk";
239 compatible = "microchip,sama7g5-i2smcc";
240 #sound-dai-cells = <0>;
244 dma-names = "tx", "rx";
246 clock-names = "pclk", "gclk";
251 compatible = "microchip,sama7g5-i2smcc";
252 #sound-dai-cells = <0>;
256 dma-names = "tx", "rx";
258 clock-names = "pclk", "gclk";
263 compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
267 clock-names = "pclk", "gclk";
271 compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
275 clock-names = "pclk", "gclk";
279 compatible = "atmel,sama5d2-flexcom";
282 #address-cells = <1>;
283 #size-cells = <1>;
284 ranges = <0x0 0xe1818000 0x800>;
288 compatible = "atmel,at91sam9260-usart";
292 clock-names = "usart";
295 dma-names = "tx", "rx";
296 atmel,use-dma-rx;
297 atmel,use-dma-tx;
303 compatible = "atmel,sama5d2-flexcom";
306 #address-cells = <1>;
307 #size-cells = <1>;
308 ranges = <0x0 0xe181c000 0x800>;
312 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
315 #address-cells = <1>;
316 #size-cells = <0>;
318 atmel,fifo-size = <32>;
321 dma-names = "rx", "tx";
322 atmel,use-dma-rx;
323 atmel,use-dma-tx;
329 compatible = "atmel,sama5d2-flexcom";
332 #address-cells = <1>;
333 #size-cells = <1>;
334 ranges = <0x0 0xe1824000 0x800>;
338 compatible = "atmel,at91sam9260-usart";
342 clock-names = "usart";
345 dma-names = "tx", "rx";
346 atmel,use-dma-rx;
347 atmel,use-dma-tx;
353 compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng";
361 compatible = "atmel,sama5d2-flexcom";
364 #address-cells = <1>;
365 #size-cells = <1>;
366 ranges = <0x0 0xe2018000 0x800>;
370 compatible = "atmel,at91sam9260-usart";
374 clock-names = "usart";
377 dma-names = "tx", "rx";
378 atmel,use-dma-rx;
379 atmel,use-dma-tx;
380 atmel,fifo-size = <16>;
386 compatible = "atmel,sama5d2-flexcom";
389 #address-cells = <1>;
390 #size-cells = <1>;
391 ranges = <0x0 0xe2024000 0x800>;
395 compatible = "atmel,at91sam9260-usart";
399 clock-names = "usart";
402 dma-names = "tx", "rx";
403 atmel,use-dma-rx;
404 atmel,use-dma-tx;
405 atmel,fifo-size = <16>;
411 compatible = "microchip,sama7g5-gem";
420 clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
421 assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
422 assigned-clock-rates = <125000000>;
427 compatible = "microchip,sama7g5-emac";
432 clock-names = "pclk", "hclk";
436 dma0: dma-controller@e2808000 {
437 compatible = "microchip,sama7g5-dma";
440 #dma-cells = <1>;
442 clock-names = "dma_clk";
446 dma1: dma-controller@e280c000 {
447 compatible = "microchip,sama7g5-dma";
450 #dma-cells = <1>;
452 clock-names = "dma_clk";
457 dma2: dma-controller@e1200000 {
458 compatible = "microchip,sama7g5-dma";
461 #dma-cells = <1>;
463 clock-names = "dma_clk";
464 dma-requests = <0>;
469 compatible = "atmel,sama5d2-flexcom";
472 #address-cells = <1>;
473 #size-cells = <1>;
474 ranges = <0x0 0xe2818000 0x800>;
478 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
481 #address-cells = <1>;
482 #size-cells = <0>;
484 atmel,fifo-size = <32>;
487 dma-names = "rx", "tx";
488 atmel,use-dma-rx;
489 atmel,use-dma-tx;
495 compatible = "atmel,sama5d2-flexcom";
498 #address-cells = <1>;
499 #size-cells = <1>;
500 ranges = <0x0 0xe281c000 0x800>;
504 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
507 #address-cells = <1>;
508 #size-cells = <0>;
510 atmel,fifo-size = <32>;
513 dma-names = "rx", "tx";
514 atmel,use-dma-rx;
515 atmel,use-dma-tx;
521 compatible = "atmel,sama5d2-flexcom";
524 #address-cells = <1>;
525 #size-cells = <1>;
526 ranges = <0x0 0xe2824000 0x800>;
530 compatible = "atmel,at91rm9200-spi";
534 clock-names = "spi_clk";
535 #address-cells = <1>;
536 #size-cells = <0>;
537 atmel,fifo-size = <32>;
540 dma-names = "rx", "tx";
546 compatible = "microchip,sama7g5-uddrc";
552 compatible = "microchip,sama7g5-ddr3phy";
557 gic: interrupt-controller@e8c11000 {
558 compatible = "arm,cortex-a7-gic";
559 #interrupt-cells = <3>;
560 #address-cells = <0>;
561 interrupt-controller;
562 interrupt-parent;