Lines Matching +full:0 +full:x20030000
29 #size-cells = <0>;
34 reg = <0xf00>;
85 #clock-cells = <0>;
96 reg = <0x102a0000 0x4000>;
97 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
108 reg = <0x10080000 0x2000>;
111 ranges = <0 0x10080000 0x2000>;
116 reg = <0x10210000 0x100>;
125 pinctrl-0 = <&uart2m0_xfer>;
131 reg = <0x10220000 0x100>;
140 pinctrl-0 = <&uart1_xfer>;
146 reg = <0x10230000 0x100>;
155 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
161 reg = <0x10240000 0x1000>;
164 #size-cells = <0>;
168 pinctrl-0 = <&i2c1_xfer>;
175 reg = <0x10250000 0x1000>;
178 #size-cells = <0>;
182 pinctrl-0 = <&i2c2m1_xfer>;
189 reg = <0x10260000 0x1000>;
192 #size-cells = <0>;
196 pinctrl-0 = <&i2c3_xfer>;
203 reg = <0x10270000 0x1000>;
210 #size-cells = <0>;
216 reg = <0x10280000 0x10>;
221 pinctrl-0 = <&pwm4_pin>;
228 reg = <0x10280010 0x10>;
233 pinctrl-0 = <&pwm5_pin>;
240 reg = <0x10280020 0x10>;
245 pinctrl-0 = <&pwm6_pin>;
252 reg = <0x10280030 0x10>;
257 pinctrl-0 = <&pwm7_pin>;
264 reg = <0x10300000 0x1000>;
275 reg = <0x100 0x0c>;
278 #clock-cells = <0>;
286 #phy-cells = <0>;
293 #phy-cells = <0>;
301 reg = <0x10350000 0x20>;
309 reg = <0x10360000 0x100>;
320 thermal-sensors = <&tsadc 0>;
352 reg = <0x10370000 0x100>;
359 pinctrl-0 = <&otp_pin>;
371 reg = <0x1038c000 0x100>;
381 reg = <0x20000000 0x1000>;
384 #size-cells = <0>;
388 pinctrl-0 = <&i2c0_xfer>;
395 reg = <0x20040000 0x10>;
400 pinctrl-0 = <&pwm0_pin>;
407 reg = <0x20040010 0x10>;
412 pinctrl-0 = <&pwm1_pin>;
419 reg = <0x20040020 0x10>;
424 pinctrl-0 = <&pwm2_pin>;
431 reg = <0x20040030 0x10>;
436 pinctrl-0 = <&pwm3_pin>;
443 reg = <0x20060000 0x1000>;
453 reg = <0x202a0000 0x1000>;
458 reg = <0x20200000 0x1000>;
466 reg = <0x30100000 0x1000>;
477 reg = <0x30110000 0x4000>;
482 fifo-depth = <0x100>;
489 reg = <0x30120000 0x4000>;
494 fifo-depth = <0x100>;
501 reg = <0x30130000 0x4000>;
506 fifo-depth = <0x100>;
509 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
515 reg = <0x30140000 0x20000>;
525 reg = <0x30160000 0x20000>;
536 reg = <0x30180000 0x40000>;
551 reg = <0x301c0000 0x4000>;
555 pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
562 reg = <0x30200000 0x10000>;
577 pinctrl-0 = <&rmii_pins>;
586 #address-cells = <0>;
588 reg = <0x32011000 0x1000>,
589 <0x32012000 0x2000>,
590 <0x32014000 0x2000>,
591 <0x32016000 0x2000>;
605 reg = <0x20030000 0x100>;
618 reg = <0x10310000 0x100>;
631 reg = <0x10320000 0x100>;
644 reg = <0x10330000 0x100>;
771 rockchip,pins = <0 RK_PB1 1 &pcfg_pull_none_smt>,
772 <0 RK_PB2 1 &pcfg_pull_none_smt>;
785 rockchip,pins = <0 RK_PC2 2 &pcfg_pull_none>,
786 <0 RK_PC6 3 &pcfg_pull_none>;
790 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
791 <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
809 rockchip,pins = <0 RK_PB6 1 &pcfg_pull_none>,
810 <0 RK_PC4 2 &pcfg_pull_none>;
816 rockchip,pins = <0 RK_PC5 1 &pcfg_pull_none>;
822 rockchip,pins = <0 RK_PC4 1 &pcfg_pull_none>;
828 rockchip,pins = <0 RK_PC6 1 &pcfg_pull_none>;
834 rockchip,pins = <0 RK_PC0 1 &pcfg_pull_none>;
872 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_up_drv_4ma>;
907 rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
911 rockchip,pins = <0 RK_PA4 1 &pcfg_pull_up>;
915 rockchip,pins = <0 RK_PB0 1 &pcfg_pull_up>;
919 rockchip,pins = <0 RK_PA7 1 &pcfg_pull_up>;
925 rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>;
929 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;